The semiconductor industry scaling has mainly been driven by Moore's law, which states that the number of transistors on a single chip should double every year and a half to two years. Beyond 2011, when the channel length of the Metal Oxide Field effect transistor (MOSFET) approaches 16 nm, the scaling of the planar MOSFET is predicted to reach its limit. Consequently, a departure from the current planar MOSFET on bulk silicon substrate is required to push the scaling limit further while maintaining electrostatic control of the gate over the channel. Alternative device structures that allow better control of the gate over the channel such as reducing short channel effects, and minimizing second order effects are currently being investigated. Such novel device architectures such as Fully-Depleted (FD) planar Silicon On Insulator (SOI) MOSFETS, Triple gate SOI MOSFET and Gate-All-Around Nanowire (NW) MOSFET utilize Silicon on Insulator (SOI) substrates to benefit from the bulk isolation and reduce second order effects due to parasitic effects from the bulk. The doping of the source and drain regions and the redistribution of the dopants in the channel greatly impact the electrical characteristics of the fabricated device. Thus, in nano-scale and reduced dimension transistors, a tight control of doping levels and formation of pn junctions is required. Therefore, deeper understanding of the lateral component of the diffusion mechanisms and interface effects in these lower dimensional structures compared to the bulk is necessary. This work focuses on studying the dopant diffusion mechanisms in Silicon nanomembranes (2D), nanoribbons (â 1.Xâ D), and nanowires (1D). This study also attempts to benchmark the 1D and 2D diffusion against the well-known bulk (3D) diffusion mechanisms. / Master of Science

The thesis contains two separate projects: Part A and Part B. / Part A: No abstract provided. Part B: A method for measuring the complex permittivity of insulator materials at microwave frequencies is described in detail. Results of dielectric measurements using this technique are in good agreement with data from other sources. MKS units are used in this report. / Thesis / Master of Engineering (MEngr)

Computing as a service is rapidly becoming the new normal for many sectors of the economy. The widespread availability of broadband internet has allowed an extensive range of services to be delivered on-demand from centralized computing systems known as ‘data centers’. These systems have evolved to be enormously complex. Optical-based communication is desired to increase data center capability and efficiency, however traditional optical technologies are not feasible due to cost and size. Silicon photonics aims to deliver optical communications on an integrated and affordable platform for use in data centers by leveraging the existing capabilities of complementary metal-oxide semiconductor manufacturing. This thesis contains a description of the development of monolithic silicon photodiodes for use in photonic integrated circuits in, and beyond, the current telecommunications wavelength windows. The focus is on methods which are compatible with standard silicon processing techniques. This is in contrast to the current approaches which rely on hybrid material systems that increase fabrication complexity. Chapter 1 and 2 provide background information to place this work into context. Chapter 3 presents an experimental study of resonant devices with lattice defects which determines the refractive index change in silicon-on-insulator waveguides. High-speed operation of resonant photodiodes is demonstrated and is found to be limited by resonance instability. Chapter 4 demonstrates high responsivity avalanche photodetectors using lattice defects. The detectors are shown to operate error-free at 10 Gbit/s, thus confirming their capability for optical interconnects. Chapter 5 presents photodiodes operating with absorption through surface-state defects. These detectors show fast operation (10 Gbit/s) and have an extremely simple fabrication process. Chapter 6 demonstrates photodiodes operating beyond the traditional telecommunications window. Operation at 20 Gbit/s, at a wavelength of 1.96 µm is demonstrated, offering potential for their use in the next generation of optical communication systems which will exploit the thulium doped fiber amplifier. / Thesis / Doctor of Philosophy (PhD) / This thesis describes photodiodes constructed on silicon optical waveguides. The photodiodes are notable for their high-speed performance and simple fabrication methods. Such devices may find use within chip-integrated optical transceivers, which are desired for optical interconnects within large-scale computing systems such as data centers.

In this dissertation, we utilized a wide range of complementary synchrotron-based X-ray spectroscopic and scattering techniques, notably X-ray absorption spectroscopy (XAS), hard X-ray photoelectron spectroscopy (HAXPES), standing-wave X-ray photoelectron spectroscopy (SW-XPS), and X-ray resonant magnetic reflectometry (XRMR), to understand and control the phenomenon of emergent interfacial ferromagnetism in strongly-correlated oxide heterostructures. This field holds great promise for the development of next-generation spintronic devices. In the heterostructures we investigated, neither of the parent oxide layers exhibits inherent ferromagnetism. Yet, when these layers are combined in an epitaxial film stack, charge-transfer phenomena give rise to an emergent ferromagnetic state at the interface. Throughout my graduate studies, I focused on studying such charge-transfer phenomena as the driving force for stabilizing interfacial ferromagnetism. This dissertation is structured around two main projects. The first project delves into the intriguing possibility of tuning the emergent interfacial ferromagnetism. More specifically, we investigated the mechanisms for suppressing interfacial charge transfer to gain control over and manipulate this magnetic phenomenon. In our second project, we explored a different facet of interfacial ferromagnetism, focusing on the origins of the imbalance in the magnitudes of the magnetic moment between the top and bottom interfaces in the same layer. Our investigation aimed to uncover the possible causes of this imbalance, ultimately leading us to scrutinize the role of defect states in this magnetic asymmetry. In the first part of this dissertation, we investigated the thickness-dependent metal-insulator transition within LaNiO3 and how it impacts the electronic and magnetic states at the interface between LaNiO3 and CaMnO3. We present a direct observation of a reduced effective valence state in the interfacial Mn cations. This reduction is most pronounced in the metallic LaNiO3/CaMnO3 superlattice, where the above-critical LaNiO3 thickness of 6-unit cells triggers this phenomenon, facilitated by the charge transfer of the itinerant Ni 3d eg electrons into the interfacial CaMnO3 layer. In contrast, when we examine the insulating superlattice with a LaNiO3 thickness below the critical value (2-unit cells), we observe a homogeneous effective valence state of Mn throughout the CaMnO3 layers. This homogeneity is attributed to the suppression of charge transfer across the interface. The second part of this dissertation delves deeply into the complexities of interfacial magnetism within the CaMnO3/CaRuO3 superlattices. Our experimental investigation unveiled an unexpected asymmetry in the strength of magnetism at these interfaces. Our findings suggest that within the superlattice CaMnO3/CaRuO3, the lower interface (CaRuO3/CaMnO3) exhibits a weaker magnetic moment when compared to the upper interface (CaMnO3/CaRuO3). This observation, supported by XRMR and XAS experimental data, was further clarified by first-principles density functional theory (DFT) calculations. Our calculations suggest that the observed magnetic asymmetry may be linked to the presence of oxygen vacancies at the interfaces. Our study significantly contributes to our understanding of interfacial ferromagnetism, potentially paving the way for controlling and manipulating this emergent property. This may be achieved by utilizing engineered defect states, offering exciting prospects for applications in the field of spintronics devices. / Physics

The scaling of semiconductor transistors has led to a decrease in thickness of the silicon dioxide layer used as gate dielectric. The thickness of the silicon dioxide layer is reduced to increase the gate capacitance, thus increasing the drain current. If the thickness of the gate dielectric decreases below 2nm, the leakage current due to the tunneling increases drastically. Hence it is necessary to replace the gate dielectric, silicon dioxide, with a physically thicker oxide layer of high-k materials like Hafnium oxide and Titanium oxide. High-k dielectric materials allow the capacitance to increase without a huge leakage current. Hafnium oxide and Titanium oxide films are deposited by reactive magnetron sputtering from Hafnium and Titanium targets respectively. These oxide layers are used to create metal-insulator-metal (MIM) structures using aluminum as the top and bottom electrodes. The films are deposited at various O2/Ar gas flow ratios, substrate temperatures, and process pressures. After attaining an exact recipe for these oxide layers that exhibit the desired parameters, MOS capacitors are fabricated with n-Si and p-Si substrates having aluminum electrodes at the top and bottom of each. Comparing the parameters of Hafnium oxide- and Titanium oxide- based MOS capacitors, MOSFET devices are designed with Hafnium oxide as gate dielectric.

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