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Realizing a 32-bit Normally-Off Microprocessor With State Retention Flip Flops Using Crystalline Oxide Semiconductor TechnologySjökvist, Niclas January 2013 (has links)
Power consumption is one of the most important design factors in modern electronic design. With a large market increase in portable battery-operated devices and push for environmental focus, it is of interest for the industry to decrease the power consumption of modern chips as much as possible. However, as circuits scale down in size the leakage current increases. This increases the static power consumption, and in future technologies the static power is expected to make up most of the overall power consumption. Power gating can decrease static power by isolating a circuit block from the power supply. In large chips, this requires state-retention flip flops and non-volatile memories in order to keep the circuit functioning continuously between power gating sequences. A design concept utilizing this is a Normally Off computer, which is in an off-state with no static power for the majority of the time. This is achieved by using non-volatile logic and memories. This concept has been realized by using a new semiconductor technology developed at Semiconductor Energy Laboratories Corporation Ltd., which is known as crystalline In-Ga-Zn oxide semiconductor material. This technology realizes transistors with an ultra-low off-state current, and enables several novel designs of state-retention circuits suitable for Normally-Off computers. This thesis presents two different architectures of state retention flip flops utilizing In-Ga-Zn oxide semiconductor transistors, which are produced and compared to determine their tradeoffs and effectiveness. These flip flops are then implemented in a 32-bit Normally-Off microprocessor to determine the performance of each implementation. This is evaluated by calculating the energy break-even time, which is the power gating time required to overcome the power overhead introduced by the state-retention flip flops. The resulting circuits and the work in this thesis has been presented at two conferences and submitted for publication in one scientific journal.
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Procesorinio komponento bendrinimo tyrimas: analizės aspektai / Research of processor component generalisation: analysis aspectsMikulis, Mindaugas 16 August 2007 (has links)
Mikroelektronikos technologinėms galimybėms stipriai lenkiant projektavimo galimybes, projektavimo etapas reikalauja naujų metodų. Vienas iš problemos sprendimų būdų yra atkartojimo technologija. Pirmoje dalyje yra analizuojama literatūra. Apžvelgiamas atkartojimo technologijos objektas. Remiantis literatūra, pateikiamas platus ir siauras atkartojimo technologijos apibrėžimas. Pateikiami komponento apibrėžimai, komponento pakartotinio panaudojimo sąvokos ir metodai. Taip pat apžvelgiami mikroprocesoriai, mikroprocesorių architektūros. Antroje dalyje išanalizuojamas pateiktas mikroprocesorius, jo komponentai. Pasirenkama procesorinių komponentų bendrinimo kryptis. Taip pat analizuojamas procesoriaus instrukcijų rinkinys, bei galimybė bendrinti instrukcijų dekodavimo ir valdymo įrenginius. Trečioje dalyje, suformuluotiems uždaviniams pateikiami tyrimo rezultatai. Pateikiami procesoriaus komponentų bendrinimo bei sintezės rezultatai. Taip pat įvertinami instrukcijų dekodavimo ir valdymo įrenginių bendrinimo bei sintezės rezultatai. Ketvirtoje dalyje pateikiamos išvados bei rekomendacijos. / The design process requires new methods, because technological abilities of microelectronics overtake design possibilities. One way of the solution is a reuse technology. In the first chapter the analysis of literature has been made. Also the reuse technology object has been reviewed. According to literature the wide and narrow definitions of reuse technology are presented. Definitions of component, methods and concepts of generic components have been delivered. Overlook through the microprocessors and their architectures have been made. In the second chapter a microprocessor and its components are analysed. The directions of generalisation for microprocessor components are proposed. Also analysis of instruction set, instruction decoder and control units generalisation possibility is discussed. The third chapter provides generalisation results for formulated tasks. Results of generalisation and synthesis of processor components are presented. Also results of instruction decoder, control units generalisation and synthesis are delivered. Conclusions and recommendations are formulated in the fourth part.
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ALL DIGITAL DESIGN AND IMPLEMENTAION OF PROPORTIONAL-INTEGRAL-DERIVATIVE (PID) CONTROLLERChin, Hui Hui 01 January 2006 (has links)
Due to the prevalence of pulse encoders for system state information, an all-digital proportional-integral-derivative (ADPID) is proposed as an alternative to traditional analog and digital PID controllers. The basic concept of an ADPID stems from the use of pulse-width-modulation (PWM) control signals for continuous-time dynamical systems, in that the controllers proportional, integral and derivative actions are converted into pulses by means of standard up-down digital counters and other digital logic devices. An ADPID eliminates the need for analog-digital and digital-analog conversion, which can be costly and may introduce error and delay into the system. In the proposed ADPID, the unaltered output from a pulse encoder attached to the systems output can be interpreted directly. After defining a pulse train to represent the desired output of the encoder, an error signal is formed then processed by the ADPID. The resulting ADPID output or control signal is in PWM format, and can be fed directly into the target system without digital-to-analog conversion. In addition to proposing an architecture for the ADPID, rules are presented to enable control engineers to design ADPIDs for a variety of applications.
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ENTREPRENEURSHIP ON THE FARM: KENTUCKY GROWERS’ PERCEPTIONS OF BENEFITS AND BARRIERSCamenisch, Amy L 01 January 2013 (has links)
This study analyzed the perceptions of Kentucky Homebased Processors and Microprocessors of the benefits of and barriers to developing and selling value-added products. The final sample consisted of 141 participants, 60.5% (n=72) of which were from Central KY, 26.9% (n=32) were from Western KY, and 12.6% (n=15) were from Eastern KY. Overall, participants seemed to feel that their value-added products were successful in many different benefit categories. The primary barriers to developing value-added products were lack of time, lack of funding, and lack of legal knowledge. The primary barriers to utilizing program resources for farmers were not having enough time, being unaware of the services offered, and programs being too far away. The information found by this study can be used to determine the addressable needs in different regions of Kentucky and assist programs in making their services more available and applicable to Kentucky farm entrepreneurs.
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HUMIDITY SENSOR CIRCUIT USING REAL TIME OPERATING SYSTEM (FREERTOS) KERNELChen, Bojie 01 January 2014 (has links)
A humidity sensor can be used to measure the moisture content of the environment. The physical change of the sensor expresses as the change of electrical property like capacitance, resistance, voltage, current, frequency, etc. In order to process these analog signals digitally, microprocessor is involved in the measurement. This thesis presents design of a circuit to measure low moisture levels. The 16-bit RISC mixed signal microcontroller MSP430F249 from Texas Instruments will be used. The circuit has good performance at extremely low humidity levels.
Meanwhile, a small real time operating system kernel FreeRTOS, a market leading RTOS from Real Time Engineer Ltd is ported to the microcontroller. The basic concept about FreeRTOS and how to port this RTOS to MSP430F249 microcontrollers will be the topics of this thesis as well.
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Programming the INTEL 8086 microprocessor for GRADS : a graphic real-time animation display systemHaag, Roger. January 1985 (has links)
No description available.
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Pipelined Design Approach To Microprocessor Architectures A Partial Implementation: MipsAltinigneli, Muzaffer Can 01 December 2005 (has links) (PDF)
This thesis demonstrate how pipelining in a RISC processor is achieved
by implementing a subset of MIPS R2000 instructions on FPGA.
Pipelining, which is one of the primary concepts to speed up a
microprocessor is emphasized throughout this thesis. Pipelining is
fundamentally invisible for high level programming language user and
this work reveals the internals of microprocessor pipelining and the
potential problems encountered while implementing pipelining. The
comparative and quantitative flow of this thesis allows to understand
why pipelining is preferred instead of other possible implementation
schemes. The methodology for programmable logic development and
the capabilities of programmable logic devices are also given as
background information. This thesis can be the starting point and
reference for programmers who are willing to get familiar with
microprocessors and pipelining.
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A New High Voltage Partial Discharge Indicator SystemGul, Ibrahim Oguz 01 June 2006 (has links) (PDF)
In this thesis work, a new partial discharge magnitude indicator with LCD display was designed. This system was implemented in high voltage partial discharge detection and measurement systems. AVRISP In-System programmer is used to program the microprocessors used inside the display unit. The time resolution of the system (one pixel of the display unit) is 4 microseconds. The unit is capable of counting the number of impulses of the input voltage that is coming from the high voltage system within user selectable time intervals. The changeable values of the time intervals are 2, 4, 6, 8 and 10 seconds. It is also capable of showing the maximum value of the impulses in a given time interval. This maximum value is a number changing between 0 and 256. By calibration of the system, it was possible to indicate the discharge magnitudes in picocoulombs.
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Παραμετρική σχεδίαση και βελτιστοποίηση δυναμικά επαναδιαμορφουμένων επεξεργαστών πρωτοκόλλων προσπέλασης μέσουΗλιόπουλος, Μάριος Γ. 15 July 2010 (has links)
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Neuromorphic Controller for Low Power Systems From Devices to CircuitsJanuary 2011 (has links)
abstract: A workload-aware low-power neuromorphic controller for dynamic power and thermal management in VLSI systems is presented. The neuromorphic controller predicts future workload and temperature values based on the past values and CPU performance counters and preemptively regulates supply voltage and frequency. System-level measurements from stateof-the-art commercial microprocessors are used to get workload, temperature and CPU performance counter values. The controller is designed and simulated using circuit-design and synthesis tools. At device-level, on-chip planar inductors suffer from low inductance occupying large chip area. On-chip inductors with integrated magnetic materials are designed, simulated and fabricated to explore performance-efficiency trade offs and explore potential applications such as resonant clocking and on-chip voltage regulation. A system level study is conducted to evaluate the effect of on-chip voltage regulator employing magnetic inductors as the output filter. It is concluded that neuromorphic power controller is beneficial for fine-grained per-core power management in conjunction with on-chip voltage regulators utilizing scaled magnetic inductors. / Dissertation/Thesis / Ph.D. Electrical Engineering 2011
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