Formålet med denne oppgaven er å oppsummere mye av kunnskapen som finnes om glidestabilitet av betongdammer, samt å anvende denne kunnskapen for å evaluere stabiliteten av en skråplatedam som ligger ved Målsetvannet i Sogn, Norge. Glidestabilitet av betongdammer er en svært kompleks og sammensatt mekanisme, som selv i dag ikke er fullstendig forstått. Erfaringer med betongdammer som har gått til brudd viser at årsakene ofte er sammensatte, og at det derfor kan være vanskelig å angi én enkelt bruddårsak. Dagens norske regelverk legger opp til at glidestabilitet av betongdammer skal beregnes ved bruk av skjærfriksjonsmetoden, en forenklet beregningsmetode hvor glidestabiliteten beregnes på bakgrunn av gjennomsnittsverdier av spenning, styrke og helling. Metoden overser en rekke faktorer som har stor betydning for glidestabiliteten, og gir derfor ikke noe inntrykk av hva den reelle sikkerheten mot glidning er. Denne oppgaven ser nærmere på hvilke faktorer som påvirker skjærstyrken, og hvilke alternativer til skjærfriksjonsmetoden som finnes for å beregne glidestabilitet av betongdammer. Alternative håndregningsmetoder er anvendt for glidning av Målsetvannets hoveddam. Det er også sett nærmere på bruk av numersike beregningsmetoder i glidestabilitetsberegninger.

Orientador: Jose Antonio Siqueira Dias / Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica / Made available in DSpace on 2018-07-21T10:43:13Z (GMT). No. of bitstreams: 1 Lopes_SilviaElisabethSauaia_M.pdf: 6529088 bytes, checksum: 94361c93b2fa30ab34622f13f5d2b5f3 (MD5) Previous issue date: 1996 / Resumo: Tanques para banho à temperatura constante necessitam de um sistema de controle para monitoração e controle de sua temperatura de operação e demais funções. O controle da temperatura deve ser rígido e preciso; condições de alarme e desligamento automático devem ser previstos. O presente trabalho pretende estudar, implementar e testar um protótipo de um sistema de controle microprocessado para tais tanques. Este trabalho apresenta um controlador digital do tipo PID, baseado na arquitetura do microcontrolador 8051 da Intel, com aIto desempenho, robusto, eficiente e simples, características estas comprovadas através de testes práticos realizados no final do projeto / Abstract: Tanks for constant temperature bath need a temperature and related functions moni toring and control system. Temperature control must be constant and precise; alarm and automatic switching off conditions must be provided. This work is to study, implement and test a microprocessor controller's prototype for such tanks. This work presents a digital controller with a PID control scheme, based in the architecture of the Intel' s 8051 microcontroller, with high performance, strong, efficient and simple, characteristics verified through practical tests made at the end of the project / Mestrado / Mestre em Engenharia Elétrica

In this thesis, an 8-bit microcontroller, 8051 core, is implemented using SystemC programming language. SystemC is a new generation co-design language which is capable of both programming software and describing hardware parts of a complete system. The benefit of this design environment appears while developing a System-on-Chip (SoC), that is a system consisting both custom hardware parts and embedded software parts. SystemC is not a completely new language, but based on C++ with some additional class libraries and extensions to handle hardware related concepts such as signals, multi-valued logic, clock and delay elements. 8051 is an 8 bit microcontroller which is widely used in industry for many years. The 8051 core is still being used as the main controller in today&rsquo / s highly complex chips, such as communication and bus controllers. During the development cycles of a System-on-Chip, instead of using separate design environments for hardware and software parts, the usage of a unified co-design environment provides a better design and simulation methodology which also decreases the number of iterations at hardware software integration. In this work, an 8-bit 8051 microcontroller core and external memory modules are developed using SystemC that can be re-used in future designs to achieve more complex System-on-Chip&rsquo / s. During the development of the 8051 core, simulation results are analyzed at each step to verify the design from the very beginning of the work, which makes the design processes more structured and controlled and faster as a result.

Thesis (MScEng)--Stellenbosch University, 2002. / ENGLISH ABSTRACT: This report describes the development of a Java Bytecode Compiler (JBC) for the 8051 micro-controller. Bytecodes are found in the class file generated when a Java source file is compiled with the java compiler (javac). On Java platforms, the Java Virtual Machine (JVM) interprets and executes the bytecodes. Currently existing Java platforms do not support programming the 8051 using Java. As an 8-bit micro-controller with only 64 KB of total memory, the 8051's word size and memory is too limited to implement a NM. Moreover, full applications of the 8051 require that it handles hardware interrupts and access 110 ports and special registers. This thesis proposes a JBC to compile the standard bytecodes found in the class file and generate equivalent assembly code that can run on the 8051. The JBC was tested on the 8051 compatible AT89C52*44 micro-controller with a program that simulates an irrigation controller. The code generated by the JBC executes correctly but is large in size and runs slower than code of a program written in assembly. Conclusions drawn are that the JBC can be used to compile Java programs intended for the 8051 and its family of micro-controllers. In particular, it is especially a good tool for people who prefer Java to other languages. The JBC is suitable for smaller programs that do not have efficiency as a major requirement. / AFRIKAANSE OPSOMMING: Hierdie tesis beskryf die ontwikkeling van 'n Java "Bytecode" samesteller (Java Bytecode Compiler, JBC) vir die 8051 mikro beheerder argitektuur. "Bytecodes" is die produk van die standaard Java samesteller "javac" en word deur 'n platform spesifieke Java Virtuele Masjien gelees en uitgevoer. Geen NM is huidig beskikbaar vir die 8051 argitektuur nie. Die gekose 8-bis 8051 mikro beheerder het 'n beperkte interne geheue van 64kB. Hierdie beperking maak dit nie geskik vir 'n IVM nie. Daar moet ook voorsiening gemaak word om hardeware onderbrekings te hantering en te kan kommunikeer met die poorte en spesiale registers van die mikro beheerder. JBC word ontwikkel wat die standaard "Bytecode" kompileer na geskikte masjien kode wat dan op die mikro beheerder gebruik kan word. Die JBC is ontwikkel en toets en 'n eenvoudige besproeiing program is geskryf om op 'n Atmel AT89C52*44 te loop. Die kode werk goed maar is nog nie geoptimeer nie en loop onnodig stadig. Optimerings metodes word aanbeveel en bespreek. Die gevolgtrekking is dat die huidige JBC kan gebruik word om Java kode te skryfvir die 8051 beheerder. Dit maak die hardeware platform nou beskikbaar aan Java programmeerders. Daar moet wel gelet word dat die JBC op die oomblik net geskik is vir klein programme en waar spoed nie die primêre vereiste is nie.

Neste trabalho foi elaborado um microcontrolador 8051 tolerante à radiação, usando para isso técnicas de recomputação de instruções. A base para este trabalho foi a descrição VHDL desse microcontrolador, sendo proposto o uso de sensores de radiação, Bulk-BICS, e códigos de proteção de erros para os elementos de memória, como forma de suporte à técnica apresentada. Inicialmente serão abordados sucintamente a origem e os efeitos prejudiciais da radiação nos dispositivos eletrônicos, motivando a realização deste trabalho. Serão mostrados em detalhes os passos para implementar a técnica de recomputação, que consiste em monitorar os sensores e, ao ser detectado um pulso transiente, fazer o processador reler a última instrução e executá-la novamente, a fim de mitigar o efeito do SET (Single Event Transient). Para isso a manipulação do contador de programa (PC) e o apontador de pilha (SP) são fundamentais. Durante esse processo também deve ser garantido que nenhum dado, potencialmente corrompido, seja armazenado na memória. Contra SEUs (Single Event Upsets) é pressuposto que todos os elementos de memória do microcontrolador estão protegidos através de algum código de correção de erros, assunto já pesquisado por outros autores. Na seqüência serão apresentadas várias simulações realizadas, onde é possível ver o processo de recomputação sendo iniciado a partir da incidência de partículas geradas através de um testbench. Por fim será feita uma comparação entre o 8051 original e o protegido, mostrando dados de área, freqüência de operação e potência de cada um. / This work presents a radiation hard 8051 microcontroller, designed using instruction recomputation techniques. The basis for this work was the VHDL description of the microcontroller. To make the microcontroller radiation hard, built in radiation sensors, called Bulk-BICS, were use to protect the combinational logic blocks. Codes for error detection and correction were used to protect the memory elements. Initially, this work discusses the sources of ionizing radiation and its harmful effects on digital integrated circuits, showing the motivation for this work. Next, the details of the implemented instruction re-computation technique are shown. It consists in monitoring the radiation sensors and, if the incidence of ionizing radiation is detected, the processor reads the last instruction and executes it again, in order to mitigate the effect of a single event transient (SET). In order to implement this re-computation, the manipulation of the program counter (PC) and stack pointer (SP) is essential. During this process it must be guaranteed that any data, potentially corrupted, will not be stored in memory. Regarding radiation effects on memory elements (Single Event Upsets-SEUs), it is assumed that all memory elements of the microcontroller are protected by some error detection and correction code, a topic previously studied by other authors. Finally, several simulations will be shown, where it is possible to see the evolution of the re-computation process, from the detection of the incidence of ionizing radiation (incidence generated by a testbench) to the full re-computation of the instruction. Finally, a comparison is made between the performance of the original 8051 and the radiation hardened version, showing overheads of area, frequency of operation and power.

Neste trabalho foi elaborado um microcontrolador 8051 tolerante à radiação, usando para isso técnicas de recomputação de instruções. A base para este trabalho foi a descrição VHDL desse microcontrolador, sendo proposto o uso de sensores de radiação, Bulk-BICS, e códigos de proteção de erros para os elementos de memória, como forma de suporte à técnica apresentada. Inicialmente serão abordados sucintamente a origem e os efeitos prejudiciais da radiação nos dispositivos eletrônicos, motivando a realização deste trabalho. Serão mostrados em detalhes os passos para implementar a técnica de recomputação, que consiste em monitorar os sensores e, ao ser detectado um pulso transiente, fazer o processador reler a última instrução e executá-la novamente, a fim de mitigar o efeito do SET (Single Event Transient). Para isso a manipulação do contador de programa (PC) e o apontador de pilha (SP) são fundamentais. Durante esse processo também deve ser garantido que nenhum dado, potencialmente corrompido, seja armazenado na memória. Contra SEUs (Single Event Upsets) é pressuposto que todos os elementos de memória do microcontrolador estão protegidos através de algum código de correção de erros, assunto já pesquisado por outros autores. Na seqüência serão apresentadas várias simulações realizadas, onde é possível ver o processo de recomputação sendo iniciado a partir da incidência de partículas geradas através de um testbench. Por fim será feita uma comparação entre o 8051 original e o protegido, mostrando dados de área, freqüência de operação e potência de cada um. / This work presents a radiation hard 8051 microcontroller, designed using instruction recomputation techniques. The basis for this work was the VHDL description of the microcontroller. To make the microcontroller radiation hard, built in radiation sensors, called Bulk-BICS, were use to protect the combinational logic blocks. Codes for error detection and correction were used to protect the memory elements. Initially, this work discusses the sources of ionizing radiation and its harmful effects on digital integrated circuits, showing the motivation for this work. Next, the details of the implemented instruction re-computation technique are shown. It consists in monitoring the radiation sensors and, if the incidence of ionizing radiation is detected, the processor reads the last instruction and executes it again, in order to mitigate the effect of a single event transient (SET). In order to implement this re-computation, the manipulation of the program counter (PC) and stack pointer (SP) is essential. During this process it must be guaranteed that any data, potentially corrupted, will not be stored in memory. Regarding radiation effects on memory elements (Single Event Upsets-SEUs), it is assumed that all memory elements of the microcontroller are protected by some error detection and correction code, a topic previously studied by other authors. Finally, several simulations will be shown, where it is possible to see the evolution of the re-computation process, from the detection of the incidence of ionizing radiation (incidence generated by a testbench) to the full re-computation of the instruction. Finally, a comparison is made between the performance of the original 8051 and the radiation hardened version, showing overheads of area, frequency of operation and power.

Thesis MTech(Electrical Engineering)--Cape Technikon, Cape Town, 1996 / The development of the 8051 Evaluation and Training Board was in response to fulfill a need to have a training board available for students at the start of a micro-controller course. This board must be used to get hands-on experience in the internal architecture, programming and operation of the controller through the testing of sample programs and exercises. It can act as an example of a practical micro-controller application board, and also as part of, or as an aid in the design and application of own projects. The board had to be cheap enough so that each student can be issued with a personal board for the duration of the course. It had to be adequately selfsufficient to be portable and to operate independent of a host PC. In addition, it had to contain adequate "intelligence" to guide the student in the use of the board: have a quick re-programming turn-around cycle; and it must be possible to use the board for user program testing and debugging. After drawing up an initial set of objectives and investigating the economic viability of similar systems in industry, an outline of the required design was made. This included the selection of suitable communication between the onboard Operating System and a user; the easiest way to load user programs into the board memory; and methods to test and debug this program. All the normal support circuitry required by a micro-controller to accommodate a minimum system for operation was included into a single Field Programmable Gate Array. The execution of the project was therefore divided into three distinct sections, the hardware, the firmware (Programmable Array configuration) and the software. In the design, the harmony between these sections had to be consolidated to yield a successful final product. The simplicity and ergonomics of the operation and application from a user's point of view, had to be accentuated and kept in mind throughout. In a design of the complexity such as this, careful planning and the investigation of various methods of approach were essential. The use of many computer-aided design and other relevant computer packages was incorporated. Interaction between the user and the Operating System on the board was done through a standard 16-character by 1-line LCD Display Module and a 32-key keyboard. The main feature of the Operating System was to enable the inspection and editing of all the memory locations on the micro-processor.

Neste trabalho foi elaborado um microcontrolador 8051 tolerante à radiação, usando para isso técnicas de recomputação de instruções. A base para este trabalho foi a descrição VHDL desse microcontrolador, sendo proposto o uso de sensores de radiação, Bulk-BICS, e códigos de proteção de erros para os elementos de memória, como forma de suporte à técnica apresentada. Inicialmente serão abordados sucintamente a origem e os efeitos prejudiciais da radiação nos dispositivos eletrônicos, motivando a realização deste trabalho. Serão mostrados em detalhes os passos para implementar a técnica de recomputação, que consiste em monitorar os sensores e, ao ser detectado um pulso transiente, fazer o processador reler a última instrução e executá-la novamente, a fim de mitigar o efeito do SET (Single Event Transient). Para isso a manipulação do contador de programa (PC) e o apontador de pilha (SP) são fundamentais. Durante esse processo também deve ser garantido que nenhum dado, potencialmente corrompido, seja armazenado na memória. Contra SEUs (Single Event Upsets) é pressuposto que todos os elementos de memória do microcontrolador estão protegidos através de algum código de correção de erros, assunto já pesquisado por outros autores. Na seqüência serão apresentadas várias simulações realizadas, onde é possível ver o processo de recomputação sendo iniciado a partir da incidência de partículas geradas através de um testbench. Por fim será feita uma comparação entre o 8051 original e o protegido, mostrando dados de área, freqüência de operação e potência de cada um. / This work presents a radiation hard 8051 microcontroller, designed using instruction recomputation techniques. The basis for this work was the VHDL description of the microcontroller. To make the microcontroller radiation hard, built in radiation sensors, called Bulk-BICS, were use to protect the combinational logic blocks. Codes for error detection and correction were used to protect the memory elements. Initially, this work discusses the sources of ionizing radiation and its harmful effects on digital integrated circuits, showing the motivation for this work. Next, the details of the implemented instruction re-computation technique are shown. It consists in monitoring the radiation sensors and, if the incidence of ionizing radiation is detected, the processor reads the last instruction and executes it again, in order to mitigate the effect of a single event transient (SET). In order to implement this re-computation, the manipulation of the program counter (PC) and stack pointer (SP) is essential. During this process it must be guaranteed that any data, potentially corrupted, will not be stored in memory. Regarding radiation effects on memory elements (Single Event Upsets-SEUs), it is assumed that all memory elements of the microcontroller are protected by some error detection and correction code, a topic previously studied by other authors. Finally, several simulations will be shown, where it is possible to see the evolution of the re-computation process, from the detection of the incidence of ionizing radiation (incidence generated by a testbench) to the full re-computation of the instruction. Finally, a comparison is made between the performance of the original 8051 and the radiation hardened version, showing overheads of area, frequency of operation and power.

The objective of this thesis was to develop an 8051 microcontroller soft core in the Verilog hardware description language (HDL). Each functional unit of the 8051 microcontroller was developed as a separate module, and tested for functionality using the open-source VHDL Dalton model as benchmark. These modules were then integrated to operate as concurrent processes in the 8051 soft core. The Verilog 8051 soft core was then synthesized in Quartus® II simulation and synthesis environment (Altera Corp., San Jose, CA, www.altera.com) and yielded the expected behavioral response to test programs written in 8051 assembler residing in the v8051 ROM. The design can operate at speeds up to 41 MHz and used only 16% of the FPGA fabric, thus allowing complex systems to be designed on a single chip. Further research and development can be performed on v8051 to enhance performance and functionality.

<p>This project was held at London South Bank University in the UK, with corporation with staff from Linköping University in Sweden as Bachelor thesis.</p><p>This report will guide you through the used techniques in order to achieve a successful cooler/Fan project with a minimum budget and good energy saving methods.</p><p>The steps of setting the used software and components are supported with figures and diagrams. You will find full explanation of the used components and mathematics, in additional to a complete working code.</p>