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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

LINK DEPENDENT ADAPTIVE RADIO – DESIGN FOR iNET

Alam, Tasmeer 10 1900 (has links)
This paper focuses on the design of a simple Time Division Multiple Access (TDMA) signaling structure for the Link Dependent Adaptive Radio (LDAR) prototype wireless radio communication system to meet the timing requirements of the iNET standard. Built for aeronautical telemetry, LDAR adapts its modulation and coding scheme based on the channel condition in real time. In this paper, a simple protocol for transmission of Command Message and Data Message between Ground Station and Test Article is discussed. This protocol includes all analysis for the continuous adaptation of modulation scheme and coding rate to maximize throughput while ensuring a minimum level of link quality. This project was a collaborative effort between Morgan State University and Georgia Tech Research Institute and is a continuation of our previously published work on LDAR.
2

Multidimensional adaptive radio links for broadband communications

Codreanu, M. (Marian) 06 November 2007 (has links)
Abstract Advanced multiple-input multiple-output (MIMO) transceiver structures which utilize the knowledge of channel state information (CSI) at the transmitter side to optimize certain link parameters (e.g., throughput, fairness, spectral efficiency, etc.) under different constraints (e.g., maximum transmitted power, minimum quality of services (QoS), etc.) are considered in this thesis. Adaptive transmission schemes for point-to-point MIMO systems are considered first. A robust link adaptation method for time-division duplex systems employing MIMO-OFDM channel eigenmode based transmission is developed. A low complexity bit and power loading algorithm which requires low signaling overhead is proposed. Two algorithms for computing the sum-capacity of MIMO downlink channels with full CSI knowledge are derived. The first one is based on the iterative waterfilling method. The convergence of the algorithm is proved analytically and the computer simulations show that the algorithm converges faster than the earlier variants of sum power constrained iterative waterfilling algorithms. The second algorithm is based on the dual decomposition method. By tracking the instantaneous error in the inner loop, a faster version is developed. The problem of linear transceiver design in MIMO downlink channels is considered for a case when the full CSI of scheduled users only is available at the transmitter. General methods for joint power control and linear transmit and receive beamformers design are provided. The proposed algorithms can handle multiple antennas at the base station and at the mobile terminals with an arbitrary number of data streams per scheduled user. The optimization criteria are fairly general and include sum power minimization under the minimum signal-to-interference-plus-noise ratio (SINR) constraint per data stream, the balancing of SINR values among data streams, minimum SINR maximization, weighted sum-rate maximization, and weighted sum mean square error minimization. Besides the traditional sum power constraint on the transmit beamformers, multiple sum power constraints can be imposed on arbitrary subsets of the transmit antennas.This extends the applicability of the results to novel system architectures, such as cooperative base station transmission using distributed MIMO antennas. By imposing per antenna power constraints, issues related to the linearity of the power amplifiers can be handled as well. The original linear transceiver design problems are decomposed as a series of remarkably simpler optimization problems which can be efficiently solved by using standard convex optimization techniques. The advantage of this approach is that it can be easily extended to accommodate various supplementary constraints such as upper and/or lower bounds for the SINR values and guaranteed QoS for different subsets of users. The ability to handle transceiver optimization problems where a network-centric objective (e.g., aggregate throughput or transmitted power) is optimized subject to user-centric constraints (e.g., minimum QoS requirements) is an important feature which must be supported by future broadband communication systems.
3

Techniques de réduction de la consommation d'un récepteur radio adaptatif et impacts sur ses performances / Low power techniques applied to an adaptive radio receiver and impacts on its performances

Pons, Jean-François 05 November 2015 (has links)
L’engouement actuel pour les applications de type réseaux de capteurs sans-fil ou internet des objets (IoT) relance la nécessité, alors initiée par les applications mobiles, de concevoir des émetteurs-récepteurs radio à basse consommation. Dans ce contexte, l’objet des travaux de thèse est de proposer des techniques de réduction de la consommation des récepteurs radio tout en minimisant l’impact sur leur architecture de manière à pouvoir adapter leur consommation aux besoins de performance.Pour ce faire, l’utilisation intermittente du convertisseur analogique numérique (ADC) a, dans un premier temps, été étudiée puis celle-ci a été généralisée à l’ensemble du récepteur. Pour chacune de ces approches, une modélisation de la dégradation des performances en termes de taux d’erreur (BER) a été confrontée à une estimation de la réduction de la consommation engendrée. Par ailleurs, l’impact de l’ajout de modules spécifiques aux techniques proposées est décrit à l’aide de résultats concernant leurs complexités et leurs consommations. L’ensemble de ces résultats s’inscrit pleinement dans le domaine de recherche des récepteurs adaptatifs pour lesquels les performances sont adaptées au canal de transmission en temps réel.Finalement, une technique de compensation digitale des défauts de quadrature a été proposée, rendant possible l’utilisation d’une PLL moins énergivore mais avec des performances dégradées. Cette technique utilise une recherche par dichotomie des poids de compensation des défauts de quadrature, lui permettant de converger suffisamment rapidement pour pouvoir réaliser la compensation sur une portion connue du message reçu et ainsi éviter une perte d’information. / The recent craze for the Wireless Sensor Networks (WSN) and the Internet of Things (IoT) applications boosts the necessity, previously introduced by the mobile applications, to design low power transceivers. In this context, the purpose of this thesis is to propose some techniques to reduce the power consumption of RF receivers while minimizing the impact on their architecture in order to be able to adapt their power consumption to the required performances.To do so, the study of the intermittent use of the analog-to-digital converter (ADC) is firstly proposed and then extended to the whole receiver. In each case, the degradation of the receiver performances in terms of bit error rate (BER) is compared to an estimate of the obtained decrease of the power consumption. Moreover, the complexity and the overhead power consumption of the modules involved in the processing of the proposed techniques are also estimated and discussed. All these results are part of the field of research called “adaptive receiver” that tries to adapt the receiver performances to its environment in real time.Finally, a digital compensation technique of the quadrature imbalances was proposed. It allows using a less energy-consuming PLL but with degraded quadrature performances and compensating the mismatches in the digital domain. This technique uses a dichotomic search of the compensation weights allowing a fast convergence in order for the compensation to be done during the reception of a known portion of the received message and therefore avoiding a loss of information.
4

Conception d'amplificateur faible bruit reconfigurable en technologie CMOS pour applications de type radio adaptative / Digitally controlled CMOS low noise amplifier for adaptative radio

De Souza, Marcelo 15 December 2016 (has links)
Les systèmes de communication mobiles permettent l’utilisation de l’information en environnements complexes grâce à des dispositifs portables qui ont comme principale restriction la durée de leurs batteries. Des nombreux efforts se sont focalisés sur la réduction de la consommation d’énergie des circuits électroniques de ces systèmes, une fois que le développent des technologies des batteries ne avance pas au rythme nécessaire. En outre, les systèmes RF sont généralement conçus pour fonctionner de manière fixe, spécifiés pour le pire cas du lien de communication. Toutefois, ce scénario peut se produire dans une petite partie du temps, entraînant ainsi en perte d’énergie dans le reste du temps. La recherche des circuits RF adaptatifs, pour adapter le niveau du signal d'entrée pour réduire la consommation d'énergie est donc d'un grand intérêt et de l'importance. Dans la chaîne de réception radiofréquence, l'amplificateur à faible bruit (LNA) se montre un composant essentiel, autant pour les performances de la chaîne que pour la consommation d'énergie. Au cours des dernières décennies, des techniques pour la conception de LNAs reconfigurables ont été proposées et mises en oeuvre. Cependant, la plupart d'entre elles s’applique seulement au contrôle du gain, sans exploiter Le réglage de la linéarité et du bruit envisageant l'économie d'énergie. De plus,ces circuits occupent une grande surface de silicium, ce qui entraîne un coût élevé, ou NE correspondent pas aux nouvelles technologies CMOS à faible coût. L'objectif de cette étude est de démontrer la faisabilité et les avantages de l'utilisation d'un LNA reconfigurable numériquement dans une chaîne de réception radiofréquence, du point de vue de la consommation d'énergie et de coût de fabrication. / Mobile communication systems allow exploring information in complex environments by means of portable devices, whose main restriction is battery life. Once battery development does not follow market expectations, several efforts have been made in order to reduce energy consumption of those systems. Furthermore, radio-frequency systems are generally designed to operate as fixed circuits, specified for RF link worst-case scenario. However, this scenario may occur in a small amount of time, leading to energy waste in the remaining periods. The research of adaptive radio-frequency circuits and systems, which can configure themselves in response to input signal level in order to reduce power consumption, is of interest and importance. In a RF receiver chain, Low Noise Amplifier (LNA) stand as critical elements, both on the chain performance or power consumption. In the past some techniques for reconfigurable LNA design were proposed and applied. Nevertheless, the majority of them are applied to gain control, ignoring the possibility of linearity and noise figure adjustment, in order to save power. In addition, those circuits consume great area, resulting in high production costs, or they do not scale well with CMOS. The goal of this work is demonstrate the feasibility and advantages in using a digitally controlled LNA in a receiver chain in order to save area and power. / Os sistemas de comunicação móveis permitem a exploração da informação em ambientes complexos através dos dispositivos portáteis que possuem como principal restrição a duração de suas baterias. Como o desenvolvimento da tecnologia de baterias não ocorre na velocidade esperada pelo mercado, muitos esforços se voltam à redução do consumo de energia dos circuitos eletrônicos destes sistemas. Além disso, os sistemas de radiofrequência são em geral projetados para funcionarem de forma fixa, especificados para o cenário de pior caso do link de comunicação. No entanto, este cenário pode ocorrer em uma pequena porção de tempo, resultando assim no restante do tempo em desperdício de energia. A investigação de sistemas e circuitos de radiofrequência adaptativos, que se ajustem ao nível de sinal de entrada a fim de reduzir o consumo de energia é assim de grande interesse e importância. Dentro de cadeia de recepção de radiofrequência, os Amplificadores de Baixo Ruído (LNA) se destacam como elementos críticos, tanto para o desempenho da cadeia como para o consumo de potência. No passado algumas técnicas para o projeto de LNA reconfiguráveis foram propostas e aplicadas. Contudo, a maioria delas só se aplica ao controle do ganho, deixando de explorar o ajuste da linearidade e da figura de ruído com fins de economia de energia. Além disso, estes circuitos ocupam grande área de silício, resultando em alto custo, ou então não se adaptam as novas tecnologias CMOS de baixo custo. O objetivo deste trabalho é demonstrar a viabilidade e as vantagens do uso de um LNA digitalmente configurável em uma cadeia de recepção de radiofrequência do ponto de vista de custo e consumo de potência.

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