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Power and Thermal Aware Scheduling for Real-time Computing SystemsHuang, Huang 09 March 2012 (has links)
Over the past few decades, we have been enjoying tremendous benefits thanks to the revolutionary advancement of computing systems, driven mainly by the remarkable semiconductor technology scaling and the increasingly complicated processor architecture. However, the exponentially increased transistor density has directly led to exponentially increased power consumption and dramatically elevated system temperature, which not only adversely impacts the system's cost, performance and reliability, but also increases the leakage and thus the overall power consumption. Today, the power and thermal issues have posed enormous challenges and threaten to slow down the continuous evolvement of computer technology. Effective power/thermal-aware design techniques are urgently demanded, at all design abstraction levels, from the circuit-level, the logic-level, to the architectural-level and the system-level.
In this dissertation, we present our research efforts to employ real-time scheduling techniques to solve the resource-constrained power/thermal-aware, design-optimization problems. In our research, we developed a set of simple yet accurate system-level models to capture the processor's thermal dynamic as well as the interdependency of leakage power consumption, temperature, and supply voltage. Based on these models, we investigated the fundamental principles in power/thermal-aware scheduling, and developed real-time scheduling techniques targeting at a variety of design objectives, including peak temperature minimization, overall energy reduction, and performance maximization.
The novelty of this work is that we integrate the cutting-edge research on power and thermal at the circuit and architectural-level into a set of accurate yet simplified system-level models, and are able to conduct system-level analysis and design based on these models. The theoretical study in this work serves as a solid foundation for the guidance of the power/thermal-aware scheduling algorithms development in practical computing systems.
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Optimal kernel development for real-time communicationsBeltran, Monica G. 14 April 1994 (has links)
The purpose of this research is to develop an optimal kernel which would be used in a real-time engineering and communications system. Since the application is a real-time system, relevant real-time issues are studied in conjunction with kernel related issues. The emphasis of the research is the development of a kernel which would not only adhere to the criteria of a real-time environment, namely determinism and performance, but also provide the flexibility and portability associated with non-real-time environments. The essence of the research is to study how the features found in non-real-time systems could be applied to the real-time system in order to generate an optimal kernel which would provide flexibility and architecture independence while maintaining the performance needed by most of the engineering applications. Traditionally, development of real-time kernels has been done using assembly language. By utilizing the powerful constructs of the C language, a real-time kernel was developed which addressed the goals of flexibility and portability while still meeting the real-time criteria. The implementation of the kernel is carried out using the powerful 68010/20/30/40 microprocessor based systems.
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Towards Simulation and Emulation of Large-Scale Computer NetworksVan Vorst, Nathanael M 30 March 2012 (has links)
Developing analytical models that can accurately describe behaviors of Internet-scale networks is difficult. This is due, in part, to the heterogeneous structure, immense size and rapidly changing properties of today's networks. The lack of analytical models makes large-scale network simulation an indispensable tool for studying immense networks. However, large-scale network simulation has not been commonly used to study networks of Internet-scale. This can be attributed to three factors: 1) current large-scale network simulators are geared towards simulation research and not network research, 2) the memory required to execute an Internet-scale model is exorbitant, and 3) large-scale network models are difficult to validate. This dissertation tackles each of these problems.
First, this work presents a method for automatically enabling real-time interaction, monitoring, and control of large-scale network models. Network researchers need tools that allow them to focus on creating realistic models and conducting experiments. However, this should not increase the complexity of developing a large-scale network simulator. This work presents a systematic approach to separating the concerns of running large-scale network models on parallel computers and the user facing concerns of configuring and interacting with large-scale network models.
Second, this work deals with reducing memory consumption of network models. As network models become larger, so does the amount of memory needed to simulate them. This work presents a comprehensive approach to exploiting structural duplications in network models to dramatically reduce the memory required to execute large-scale network experiments.
Lastly, this work addresses the issue of validating large-scale simulations by integrating real protocols and applications into the simulation. With an emulation extension, a network simulator operating in real-time can run together with real-world distributed applications and services. As such, real-time network simulation not only alleviates the burden of developing separate models for applications in simulation, but as real systems are included in the network model, it also increases the confidence level of network simulation. This work presents a scalable and flexible framework to integrate real-world applications with real-time simulation.
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Regulating the anterior medial prefrontal cortex : exploratory investigation of real-time fMRI trainingSmith, Rachelle Marie 11 1900 (has links)
The feasibility of using real-time functional magnetic resonance imaging (fMRI) feedback regarding the level of activation in rostromedial prefrontal cortex (rMPFC) to learn improved regulation of this brain area was examined in a group of 5 young adults. Subjects received real-time feedback from the target brain region while engaging in a blocked-design task involving alternating blocks of attempted up-regulation and down-regulation of the target brain region. A transient negative emotional state was induced prior to each scanning session. Subjects completed 6 scanning sessions (a pre-training session, 4 feedback sessions and a post-training session - no feedback was provided for pre and post-training sessions). The guideline strategy provided to subjects of engaging in emotional awareness during up-regulation and bodily awareness during down-regulation was found to consistently regulate the region in the pre-training session prior to the fMRI feedback sessions. This finding is in line with the previously proposed role of the rMPFC in emotional awareness. In contrast to previous real-time fMRI findings, greater recruitment of the region was observed in the pre-training session compared to the post-training session, with a non-significant negative trend observed across feedback sessions. These results suggest that there may be limitations to which the feedback techniques successfully employed for other brain regions extend to yet unexplored brain regions. / Arts, Faculty of / Psychology, Department of / Graduate
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The Multiprocessor Scheduling Of Periodic And Sporadic Hard Realtime SystemsReddy, Vikrama 02 1900 (has links) (PDF)
Real time systems have been a major area of study for many years. Advancements in electronics, computers, information technology and digital networks are fueling major changes in the area of real time systems. In this thesis, we look at some of the most commonly modeled real time task systems, such as the periodic task model, including more complex task models such as the sporadic task systems. Primary focus of researchers in these fields include how to guarantee hard real time requirement of any task specification, with the minimal utilization of available hardware resources. Advancement in technology has brought multi-cored architectures with shared memory and massively parallel computing devices within the reach of ordinary computer users. Hence, it makes sense to study existing and newer task models on a wide variety of hardware platforms.
Periodic task model and systems with such task models have been designed and well understood. Newer models such as the sporadic task models have been proposed to capture a more larger variety of real time systems being designed and used. We focus on designing more efficient scheduling algorithms for the sporadic LL task model, and propose simpler proofs to some of the algorithms existing in current literature. This thesis also focuses on scheduling sporadic task systems, under both multiprocessor full-migration and multiprocessor partitioned scheme. We also provide approximation algorithms to efficiently determine feasibility of such task systems.
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Dynamic Alpha Congestion Controller for WebRTCAtwah, Rasha Jamal M. January 2016 (has links)
Video conferencing applications have significantly changed the way in which people
communicate over the Internet. Web real-time communication (WebRTC), drafted by the World Wide Web Consortium (W3C) and the Internet Engineering Task Force (IETF), has added new functionality to web browsers, allowing audio/video calls between browsers without the need to install any video telephony applications.
The Google Congestion Control (GCC) algorithm has been proposed as WebRTC’s receiver congestion control mechanism, but its performance is limited due to using a fixed incoming rate decrease factor, known as an alpha (α). In this thesis, we have proposed a dynamic alpha model to reduce the receiving bandwidth estimate during overuse, as indicated by the overuse detector.
Experiments using our specific testbed show that our proposed model achieves a higher incoming rate and a lower Round-Trip Time while slightly increasing the packet loss rate in some cases compared to fixed alpha model.
Our mathematical model proves that it is necessary to use an adaptive alpha α as the receiver side controller. The experimental results show improvement in the term of incoming rate, Round-Trip Time, and packet fraction loss rate in some cases. Our model increases the amount of incoming rate and decreases Round-Trip Time and fraction loss.
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REAL TIME C BAND LINK BUDGET MODEL CALCULATIONRubio, Pedro, Fernandez, Francisco, Jimenez, Francisco 11 1900 (has links)
The purpose of this paper is to show the integration of the transmission gain values of a
telemetry transmission antenna according to its relative position and integrate them in the C band
link budget, in order to obtain an accuracy vision of the link.
Once our C band link budget was fully performed to model our link and ready to work in real
time with several received values (GPS position, roll, pitch and yaw) from the aircraft and other
values from the Ground System (azimuth and elevation of the reception telemetry antenna), it
was necessary to avoid a constant value of the transmitter antenna and estimate its values with
better accuracy depending of the relative beam angles between the transmitter antenna and
receiver antenna. Keeping in mind an aircraft is not a static telecommunication system it was
necessary to have a real time value of the transmission gain.
In this paper, we will show how to perform a real time link budget (C band).
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Development of a Real-time Pcr Assay for the Detection of Campylobacter Jejuni and Campylobacter Coli.Lewis, Sally 05 1900 (has links)
Campylobacter organisms are the most commonly reported bacterial causes of foodborne infection in the world, with Campylobacter jejuni and Campylobacter coli responsible for over 99% of reported infections. Traditionally, Campylobacter species detection is an arduous process, requiring a special incubation environment as well as specific growth media for an extended growth period. The development of a rapid and reliable diagnostic tool for the detection of Campylobacter species would be a valuable aid to the medical diagnostic decision process, especially to rule out Campylobacter infection during the enteric pre-surgical time period. Improved patient outcomes would result if this rapid assay could reduce the number of enteric surgeries. Assays performed during this dissertation project have demonstrated that both SYBR® green and hydrolysis probe assays targeting an 84 nucleotide portion of cadF, a fibronectin-binding gene of Campylobacter jejuni and Campylobacter coli, were able to detect from 101 to 108 copies of organism from stool specimens, did not detect nonspecific targets, and exhibited a coefficient of variation (CV) of 1.1% or less. Analytical validation of sensitivity, specificity and precision, successfully performed in these studies, warrants additional clinical validation of these assays.
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Real-Time Instance and Semantic Segmentation Using Deep LearningKolhatkar, Dhanvin 10 June 2020 (has links)
In this thesis, we explore the use of Convolutional Neural Networks for semantic and instance segmentation, with a focus on studying the application of existing methods with cheaper neural networks. We modify a fast object detection architecture for the instance segmentation task, and study the concepts behind these modifications both in the simpler context of semantic segmentation and the more difficult context of instance segmentation. Various instance segmentation branch architectures are implemented in parallel with a box prediction branch, using its results to crop each instance's features. We negate the imprecision of the final box predictions and eliminate the need for bounding box alignment by using an enlarged bounding box for cropping. We report and study the performance, advantages, and disadvantages of each. We achieve fast speeds with all of our methods.
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Real-Time Software Transactional Memory: Contention Managers, Time Bounds, and ImplementationsEl-Shambakey, Mohammed Talat 02 October 2013 (has links)
Lock-based concurrency control suffers from programmability, scalability, and composability challenges. These challenges are exacerbated in emerging multicore architectures, on which improved software performance must be achieved by exposing greater concurrency. Transactional memory (TM) is an emerging alternative synchronization model for shared memory objects that promises to alleviate these difficulties.
In this dissertation, we consider software transactional memory (STM) for concurrency control in multicore real-time software, and present a suite of real-time STM contention managers for resolving transactional conflicts. The contention managers are called ECM, RCM, LCM, PNF, and FBLT. RCM and ECM resolve conflicts using fixed and dynamic priorities of real-time tasks, respectively, and are naturally intended to be used with the fixed priority (e.g., G-RMA) and dynamic priority (e.g., G-EDF) multicore real-time schedulers, respectively. LCM resolves conflicts based on task priorities as well as atomic section lengths, and can be used with G-EDF or G-RMA schedulers. Transactions under ECM, RCM, and LCM may retry due to conflicts with higher priority tasks even when there are no shared objects, i.e., transitive retry. PNF avoids transitive retry and optimizes processor usage by lowering the priority of retrying transactions, thereby enabling other non-conflicting transactions to proceed. PNF, however, requires a priori knowledge of all requested objects for each atomic section, which is inconsistent with the semantics of dynamic STM. Moreover, its centralized design increases overhead. FBLT avoids transitive retry, do not require a priori knowledge of requested objects, and has a decentralized design.
We establish upper bounds on transactional retry costs and task response times under the contention managers through schedulability analysis. Since ECM and RCM preserve the semantics of the underlying real-time scheduler, their maximum transactional retry cost is double the maximum atomic section length. This is improved in the design of LCM, which achieves shorter retry costs and tighter upper bounds. As PNF avoids transitive retry and improves processor usage, it yields shorter retry costs and tighter upper bounds than ECM, RCM, and LCM. FBLT\'s upper bounds are similarly tight because it combines the advantages of PNF and LCM.
We formally compare the proposed contention managers with each other, with lock-free synchronization, and with multiprocessor real-time locking protocols. Our analysis reveals that, for most cases, ECM, RCM, and LCM achieve higher schedulability than lock-free synchronization only when the atomic section length does not exceed half of lock-free synchronization\'s retry loop length. With equal periods and greater access times for shared objects, atomic section length under ECM, RCM, and LCM can be much larger than the retry loop length while still achieving better schedulability. With proper values for LCM\'s design parameters, atomic section length can be larger than the retry loop length for better schedulability. Under PNF, atomic section length can exceed lock-free\'s retry loop length and still achieve better schedulability in certain cases. FBLT achieves equal or better schedulability than lock-free with appropriate values for design parameters. The schedulability advantage of the contention managers over multiprocessor real-time locking protocols such as Global OMLP and RNLP depends upon the value of $s_{max}/L_{max}$, the ratio of the maximum transaction length to the maximum critical section length. FBLT\'s schedulability is equal or better than Global OMLP and RNLP if $s_/L_ le 2$.
Checkpointing enables partial roll-back of transactions by recording transaction execution states (i.e., checkpoints) during execution, allowing roll-back to a previous checkpoint instead of transaction start, improving task response time. We extend FBLT with checkpointing and develop CP-FBLT, and identify the conditions under which CP-FBLT achieves equal or better schedulability than FBLT.
We implement the contention managers in the Rochester STM framework and conduct experimental studies using a multicore real-time Linux kernel. Our studies reveal that among the contention managers, CP-FBLT has the best average-case performance. CP-FBLT\'s higher performance is due to the fact that PNF\'s and LCM\'s advantages are combined into the design of FBLT, which is the base of CP-FBLT. Moreover, checkpointing improves task response time. The contention managers were also found to have equal or better average-case performance than lock-free synchronization: more jobs meet their deadlines using CP-FBLT, FBLT, and PNF than lock-free synchronization by 34.6%, 28.5%, and 32.4% (on average), respectively. The superiority of the contention managers is directly due to their better conflict resolution policies.
Locking protocols such as OMLP and RNLP were found to perform better: more jobs meet their deadlines under OMLP and RNLP than any contention manager by 12.4% and 13.7% (on average), respectively. However, the proposed contention managers have numerous qualitative advantages over locking protocols. Locks do not compose, whereas STM transactions do. To allow multiple objects to be accessed in a critical section, OMLP assigns objects to non-conflicting groups, where each group is protected by a distinct lock. RNLP assumes that objects are accessed in a specific order to prevent deadlocks. In contrast, STM allows multiple objects to be accessed in a transaction in any order, while guaranteeing deadlock-freedom, which significantly increases programmability. Moreover, STM offers platform independence: the proposed contention managers can be entirely implemented in the user-space as a library. In contrast, real-time locking protocols such as OMLP and RNLP must be supported by the underlying platform (i.e., operating system or virtual machine). / Ph. D.
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