Thanks to the advance in CMOS technology, an extensive category of applications has been migrated from traditional BJT-based processes. System-on-a-Chip (SoC) realization of digital, analog, and even high voltage devices is now a reality. To address the challenge imposed by integrating analog and high voltage devices in standard CMOS processes, this thesis aims at the design of three specific topics in particular. With regard to the contents of the thesis, first of all, the theory of linear-in-dB automatic gain control (AGC) is discussed. In succession, a linear-in-dB variable gain amplifier (VGA) is mentioned. The implementation of a Feed-forward Output Swing Prediction AGC featuring a Prediction Parallel-Detect Single-Store Peak Detector (PDSSPD) and a High Input/Output Swing VGA is also described. Furthermore, a digitally programmable gain amplifier for a ZigBee wireless receiver is also mentioned. In response to the advent of CMOS-compatible high voltage tolerant Bipolar-CMOS-DMOS (BCD) process, an operational amplifier for level converting operation is disclosed. A 60-V Li-ion battery charger has also been proposed, along with a novel battery charge mode, namely, the incremental charge (IC) mode. Practical issues regarding the high voltage tolerant BCD process is also briefly discussed. Finally, a backplane transmitter featuring pre-emphasis and a receiver utilizing decisive feedback equalization (DFE) designed for CIC MorPack technology are presented. When packaged in a Leadless Ceramic Carrier (LCC) package, the transmitter can transmit up to 500 Mbps and the receiver can receive up to 125 Mbps, both through DuPont connectors without impedance matching.

Ask a computer to store a decimal whole number in binary and it will do it without any fuss. A decimal fraction, however, that’s another thing. In this episode, we will present a method called Packed BCD that is used to accurately represent decimal values in binary by storing each digit in its own nibble.

This thesis describes the design guidelines from two medical teams, electrocardiogram and pulse oximetry using embedded logic circuitry such as FPGA and microcontrollers, digital filters used to filter the signals obtained from analog converters to digital, graphic obtaining the data is displayed in a graphic display GLCD, and has an interface to send data to a PC through a port USB 2 at full speed. The digital filters used are FIR filters, these filters are chosen to be linear and time invariant, developed with 40 coefficients FIR filters, these filters were implemented in the FPGA, use a FPGA that has implemented only 20 multipliers For the implementation we used the VHDL language and algorithmic state machines in order to control the 20 boxes and get the 40 products. Filtered data in the stage of the FPGA, are taken to a microcontroller that is responsible for managing the data, can lead to a graphic display GLCD, and so we can see the signal and obtained values or you can send the data to a PC right through USB port and software right through it can see the graphics on the PC.

Masters of Science / The aim of this study was therefore to evaluate the antioxidant and anti-diabesity potential of a hot water extract of C. maculata in non-cell based assays and correlate the activities with phenolic composition. Total antioxidant capacity (TAC) was assessed in terms of free radical scavenging and iron reducing ability. The DPPH, ABTS, ORAC and FRAP assays were employed. Anti-diabesity potential was assessed in terms of the inhibition of the digestive enzymes, α-glucosidase and pancreatic lipase