Thesis (Ph. D.)--State University of New York at Binghamton, Thomas J. Watson School of Engineering and Applied Science, Department of Mechanical Engineering, 2008. / Includes bibliographical references.

Thesis (M.S.)--State University of New York at Binghamton, Thomas J. Watson School of Engineering and Applied Science, Department or Systems Science and Industrial Engineering, 2009. / Includes bibliographical references.

Thesis (M.S.)--State University of New York at Binghamton, Department of Mechanical Engineering, 2005. / Includes bibliographical references (leaves 70-72).

With the dramatic advances that have taken place in microelectronics over the past three decades, ball-grid array (BGA) packages are increasingly being used in microsystems applications. BGA packages with area-array configuration have several advantages: smaller footprint, faster signal transmission, testability, reworkability, handling easiness, etc. Although ceramic ball grid array (CBGA) packages have been used extensively in the microsystems industry, the use of plastic ball grid array (PBGA) packages is relatively new, especially for automotive and aerospace applications where harsh thermal conditions prevail. This thesis work has developed an experimental and a theoretical modeling program to study the reliability of two PBGA packages. The physics-based theoretical models take into consideration the time-dependent creep behavior through power law creep and time-independent plastic behavior through multi-linear kinematic hardening. In addition, unified viscoplastic constitutive models are also taken into consideration. The models employ two damage-metrics, namely inelastic strain and inelastic strain energy density, to predict the solder joint fatigue life. The theoretical predictions have been validated through air-to-air in-house thermal cycling tests carried out between 55 and #61616;C and 125 and #61616;C. In addition, laser-moir interferometry has been used to determine the displacement contours in a cross-section of the package at various temperatures. These contours measured through moir interferometry have also been used to validate the thermally-induced displacement contours, predicted by the models. Excellent agreement is seen between the experimental data and the theoretical predictions. In addition to life prediction, the models have been extended to map the field-use conditions with the accelerated thermal cycling conditions. Both linear and non-linear mapping techniques have been developed employing inelastic strain and strain energy density as the damage metric. It is shown through this research that the symmetric MIL-STD accelerated thermal cycles, currently in practice in industry, have to be modified to account for the higher percentage of creep deformation experienced by the solder joints in the field-use conditions. Design guidelines have been developed for such modifications in the accelerated thermal cycles.

Title from PDF of title page. / Document formatted into pages; contains 87 pages. / Thesis (M.S.M.E.)--University of South Florida, 2003. / Includes bibliographical references. / Text (Electronic thesis) in PDF format. / ABSTRACT: As technology progresses towards smaller electronic packages, thermo-mechanical considerations pose a challenge to package designers. One area of difficulty is the ability to predict the fatigue life of the solder connections. To do this one must be able to accurately model the thermo-mechanical performance of the electronic package. As the solder ball size decreases, it becomes difficult to determine the performance of the package with traditional methods such as the use of strain gages. This is due to the fact that strain gages become limited in size and resolution and lack the ability to measure discreet strain fields as the solder ball size decreases. A solution to the limitations exhibited in strain gages is the use of Moiré interferometry. Moiré interferometry utilizes optical interferometry to measure small, in-plane relative displacements and strains with high sensitivity. / ABSTRACT: Moiré interferometry is a full field technique over the application area, whereas a strain gage gives an average strain for the area encompassed by the gage. This ability to measure full field strains is useful in the analysis of electronic package interconnections; especially when used to measure strains in the solder ball corners, where failure is known to originate. While the improved resolution of the data yielded by the method of Moiré interferometry results in the ability to develop more accurate models, that is not to say the process is simple and without difficulties of it's own. Moiré interferometry is inherently susceptible to error due to experimental and environmental effects; therefore, it is vital to generate a reliable experimental procedure that provides repeatable results. This was achieved in this study by emulating and modifying established procedures to meet our specific application. / ABSTRACT: The developed procedure includes the preparation of the specimen, the replication and transfer of the grids, the use of the PEMI, interpretation of results, and validation of data by finite element analysis using ANSYS software. The data obtained maintained uniformity to the extent required by the scope of this study, and potential sources of error have been identified and should be the subject of further research. / System requirements: World Wide Web browser and PDF reader. / Mode of access: World Wide Web.

This research aims to understand the reliability of Sn-Ag-Cu solder interconnects used in plastic ball grid array (PBGA) packages using microstructure evolution, laser moiré interferometry and finite-element modeling. A particle coarsening based microstructure evolution of the solder joint material during thermal excursions was studied for extended periods of time lasting for several months. The microstructure evolution and particle coarsening was quantified, and acceleration factors were determined between benign field-use conditions and accelerated thermal cycling (ATC) conditions for PBGA packages with different form factors and for two different lead-free solder alloys. A new technique using laser moiré interferometry was developed to assess the deformation behavior of Sn-Ag-Cu based solder joints during thermal excursions. This technique can used to estimate the fatigue life of solder joints quickly in a matter of few days instead of months and can be extended to cover a wide range of temperature regimes. Finite-element analysis (FEA) in conjunction with experimental data from the ATC for different lead-free PBGA packages was used to develop a fatigue life model that can be used to predict solder joint fatigue life for any PBGA package. The proposed model will be able to predict the mean number of cycles required for crack initiation and crack growth rate in a solder joint.

Thesis (M.S.)--State University of New York at Binghamton, Thomas J. Watson School of Engfineering and Applied Science, Department of Systems Science and Industrial Engineering, 2009. / Includes bibliographical references.

This dissertation focuses on high-performance LC-tank CMOS VCO design at 2 GHz. The high-Q inductors are realized using wiring metal lines in advanced packages. Those inductors are used in the resonator of the VCO to achieve low phase noise, low power consumption, and a wide frequency tuning range. In this dissertation, a fine-pitch ball-grid array (FBGA) package, a multichip module (MCM)-L package, and a wafer-level package (WLP) are incorporated to realize the high-Q inductor. The Q-factors of inductors embedded in packages are compared to those of inductors monolithically integrated on Si and GaAs substrates. All the inductors are modeled with a physical, simple, equivalent two-port model for the VCO design as well as for phase noise analysis. The losses in an LC-tank are analyzed from the phase noise perspective. For the implementation of VCOs, the effects of the interconnection between the embedded inductor and the VCO circuit are investigated. The VCO using the on-chip inductors is designed as a reference. The performance of VCOs using the embedded inductor in a FBGA and a WLP is compared with that of a VCO using the on-chip inductor. The VCO design is optimized from the high-Q perspective to enhance performance. Through this optimization, less phase noise, lower power consumption, and a wider frequency tuning range are obtained simultaneously.