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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

On the testability and diagnosability of digital systems

Elbably, M. E. January 1988 (has links)
No description available.
2

A steady-state response test generation technique for mixed-signal integrated circuits

Alani, Alaa Fadhil January 1993 (has links)
No description available.
3

A test strategy planning methodology driven by economic parameters

Dear, Ian D. January 1990 (has links)
No description available.
4

Electronic functional test generation and scheduling using an intelligent knowledge-based system and heuristic techniques

Lea, Stephen Michael January 1990 (has links)
No description available.
5

Power supply voltage control testing technique as a novel electrical test strategy for analogue integrated circuits

A'Ain, Abu Khari Bin January 1996 (has links)
No description available.
6

Generating Circuit Tests by Exploiting Designed Behavior

Shirley, Mark Harper 01 December 1988 (has links)
This thesis describes two programs for generating tests for digital circuits that exploit several kinds of expert knowledge not used by previous approaches. First, many test generation problems can be solved efficiently using operation relations, a novel representation of circuit behavior that connects internal component operations with directly executable circuit operations. Operation relations can be computed efficiently by searching traces of simulated circuit behavior. Second, experts write test programs rather than test vectors because programs are more readable and compact. Test programs can be constructed automatically by merging program fragments using expert-supplied goal-refinement rules and domain-independent planning techniques.
7

Návrh testovacího zařízení pneumatických aktuátorů / Design for testing device used to measure air leakage from linear pneumatic actuator

Kurillová, Katarína January 2019 (has links)
This thesis is focused on detecting air leakage in serial production of pneumatic linear actuators. Testing for air leakage is an important part of the production process in which the manufacturer ensures that the product satisfies quality requirements and works correctly. The thesis was created in collaboration with the Czech manufacturing plant of SMC Industrial Automation CZ s.r.o., which produces pneumatic actuators. Goal of the design part of the thesis is to select the most effective method for testing and finding universal principle for testing in specified conditions. The principle is then applied to design a testing device for the CQ2 cylinders. The testing device consists of three parts - pneumatic circuit, control circuit and electric circuit. Thesis conclusion contains comparison of the newly designed testing device with the device currently in use.
8

Backside observation of large-scale integrated circuits with multilayered interconnections using laser terahertz emission microscope

Yamashita, Masatsugu, Otani, Chiko, Kawase, Kodo, Matsumoto, Toru, Nikawa, Kiyoshi, Kim, Sunmi, Murakami, Hironaru, Tonouchi, Masayoshi 13 May 2009 (has links)
No description available.
9

Développement de stratégies de test pour les systèmes de communications millimétriques / Development of test strategies for millimeter communications systems

Verdy, Matthieu 22 September 2016 (has links)
L’objectif de cette thèse est de développer une stratégie de test globale pour réduire le cout du test tout en garantissant une couverture de test complète. On s’intéressera plus particulièrement aux communications millimétriques à base de modulation OFDM. Les investigations devront être orientées vers l’implémentation de « BIST » dans le circuit pour relaxer les contraintes sur l’environnement de test. L’environnement de test est composé de l’ATE et de l’interface de test. Pour relaxer les contraintes sur l’environnement de test et ainsi réduire le cout du test, notre approche est d’opter pour un « ATE » standard » et d’implémenter le minimum possible de composants dans l’interface de test. Les spécifications des BIST et éventuellement des modules à implémenter dans l’interface de test devront être suffisamment précis et réalistes pour permettre une implémentation physique. Pour atteindre ces objectifs notre approche est de s’appuyer sur les modèles des différents blocs et de procéder à des simulations appropriées pour identifier les paramètres de test pertinents d’abord et ensuite proposer une solution de test qui permet de mesurer chaque paramètre. Les paramètres de test pertinents sont les paramètres qui permettent de tester le système de communication en un temps minimal avec une couverture de test convenable. Ces paramètres de test peuvent être déterminés en combinant le test fonctionnel au test structurel. Le test fonctionnel permet de détecter l’existence de fautes catastrophiques en un minimum de temps et le test structurel permet de localiser les fautes catastrophiques et de déterminer les performances individuelles des blocs critiques pour améliorer le rendement. Pour le test structurel, les performances individuelles des blocs critiques peuvent être déterminées directement au moyen de BIST dédiés ou indirectement en procédant à une corrélation entre les paramètres des blocs et un paramètre global tel que l’EVM ou tout autre type de paramètre adapté. / The thesis' goal is to develop global test strategy in order to reduce test cost and ensure total test cover. OFDM millimeter communications will a point of interest in this thesis. The investigation has to reach the circuit BIST implementation to release constraint over test environment. The test environment contains ATE and test interface. Our approach consists in using a standard ATE and implementing few components on test interface. BIST specification and modules of test interface must be precise and realistic in order to ensure the physical implementation. To reach these goal, we will first rely on models of different blocks and appropriate simulations to identify relevant test parameters. Secondly, we will produce test solution that ensure the measure of each relevant parameters. Relevant test parameters are parameters that allow to test the system quickly, wih maximal test cover. These parameters can be computed using both functional model and structural model. Functional model is used to detect catastrophic faults, and structural model determines each blocks performance to improve efficiency. Dealing with structural test, individual block performances can be determined using BIST, or computing correlation between local blocks parameters and global system parameters (ie. EVM, or any relevant parameter).
10

Modeling defective part level due to static and dynamic defects based upon site observation and excitation balance

Dworak, Jennifer Lynn 30 September 2004 (has links)
Manufacture testing of digital integrated circuits is essential for high quality. However, exhaustive testing is impractical, and only a small subset of all possible test patterns (or test pattern pairs) may be applied. Thus, it is crucial to choose a subset that detects a high percentage of the defective parts and produces a low defective part level. Historically, test pattern generation has often been seen as a deterministic endeavor. Test sets are generated to deterministically ensure that a large percentage of the targeted faults are detected. However, many real defects do not behave like these faults, and a test set that detects them all may still miss many defects. Unfortunately, modeling all possible defects as faults is impractical. Thus, it is important to fortuitously detect unmodeled defects using high quality test sets. To maximize fortuitous detection, we do not assume a high correlation between faults and actual defects. Instead, we look at the common requirements for all defect detection. We deterministically maximize the observations of the leastobserved sites while randomly exciting the defects that may be present. The resulting decrease in defective part level is estimated using the MPGD model. This dissertation describes the MPGD defective part level model and shows how it can be used to predict defective part levels resulting from static defect detection. Unlike many other predictors, its predictions are a function of site observations, not fault coverage, and thus it is generally more accurate at high fault coverages. Furthermore, its components model the physical realities of site observation and defect excitation, and thus it can be used to give insight into better test generation strategies. Next, we investigate the effect of additional constraints on the fortuitous detection of defects-specifically, as we focus on detecting dynamic defects instead of static ones. We show that the quality of the randomness of excitation becomes increasingly important as defect complexity increases. We introduce a new metric, called excitation balance, to estimate the quality of the excitation, and we show how excitation balance relates to the constant τ in the MPGD model.

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