Neste trabalho será feito um modelo espaço-temporal contínuo para preços de imóveis na cidade de São Paulo estimado através de métodos Bayesianos. Faremos uma decomposição da série em tendência e ciclo além de incorporar um conjunto de variáveis explicativas e efeitos aleatórios espaciais projetados no contínuo. Este modelo introduz um novo método para analisar a formação dos preços dos lançamentos imobiliários. Consideramos em nosso modelo hedônico, além das características intrínsecas, também as características da vizinhança e o ambiente econômico. Com este modelo, conseguimos observar os preços de equilíbrio para as respectivas localizações e uma interpretação mais clara da dinâmica de preços dos imóveis entre janeiro de 2000 e dezembro de 2013 para a cidade de São Paulo. / In this work will be made a continuous spatial-temporal model for real estate prices in the city of São Paulo estimated using Bayesian methods. We will decompose the series into a trend and cycle, and incorporate a set of explanatory variables and random spatial effects projected into the continuum. This model introduces a new method to analyze the price formation of real estate launches. We consider in our hedonic model, besides the intrinsic characteristics, also the characteristics of the neighborhood and the economic environment. With this model, we were able to observe the equilibrium prices for the respective locations and a clearer interpretation of the dynamics of real estate prices between January 2000 and December 2013 for the city of São Paulo.

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Submitted by Patricia Calazans (patmellofranco@gmail.com) on 2011-01-14T12:05:28Z No. of bitstreams: 1 Tese-Patricia-Calazans.pdf: 594538 bytes, checksum: 1945b30641fdf200c49dca14b4422b31 (MD5) / Approved for entry into archive by Vitor Souza(vitor.souza@fgv.br) on 2011-01-14T14:16:14Z (GMT) No. of bitstreams: 1 Tese-Patricia-Calazans.pdf: 594538 bytes, checksum: 1945b30641fdf200c49dca14b4422b31 (MD5) / Made available in DSpace on 2011-02-21T14:28:06Z (GMT). No. of bitstreams: 1 Tese-Patricia-Calazans.pdf: 594538 bytes, checksum: 1945b30641fdf200c49dca14b4422b31 (MD5) Previous issue date: 2008-05-30 / This study presents a forecasting model for prices and volumes traded in the seaborne iron ore market. A VAR model (with endogenous variables with one lag) was developed, using oil prices (Brent) and an industrial production index. After testing for a unit root in the variables and discovering that none of them were stationary, the co-integration test showed that there was a long term relation between them, which was in itself stationary, eliminating the possibility of a spurious regression. As a result, the VAR model was seen to be consistent, with high adherence to forecast prices and volumes for seaborne trade, in spite of some short term imprecision. / O presente estudo apresenta um modelo de previsão do preço e do volume comercializado no mercado transoceânico de minério de ferro. Para tanto, foi desenvolvido um modelo VAR, utilizando, além das variáveis endógenas com um lag de diferença, o preço do petróleo Brent e um índice de produção industrial. Após testar raiz unitária das variáveis e constatar que nenhuma era estacionária, o teste de cointegração atestou que existia relação de longo prazo entre as mesmas que era estacionária, afastando a possibilidade de uma regressão espúria. Como resultado, a modelagem VAR apresentou um modelo consistente, com elevada aderência para a previsão do preço e do volume negociado de minério de ferro no mercado transoceânico, não obstante ele tenha apresentado alguma imprecisão no curto prazo.

The causal relationship between financial development and economic growth is a controversial issue. For developing countries, empirical studies have provided mixed result. This study seeks to empirically explore the relationship and the causal link between financial development and economic growth in two sub-Saharan African countries between 1970 and 2006. The empirical investigation is carried out using time methods and the five most commonly used indicators of financial development in the literature. However, the causal relationship was carried out using two different methods which are the autoregressive distributed lag bounds testing (ARDL) and the vector error correction model (VECM). Using this above methodology the study first found that in both countries there is a positive and long-term relationship between all the indicators of financial development and economic growth which was proxied by the real per capita GDP. With respect to the causality test, the two methods used provide mixed results especially in South Africa. In Cameroon the study found that financial development causes economic growth using the two methods, whereas in South Africa economic growth causes financial development when the VECM method is used, while there is an independence relationship between the two variables in South Africa when using ARDL. / Economics / M.Comm. (Economics)

Neste trabalho será feito um modelo espaço-temporal contínuo para preços de imóveis na cidade de São Paulo estimado através de métodos Bayesianos. Faremos uma decomposição da série em tendência e ciclo além de incorporar um conjunto de variáveis explicativas e efeitos aleatórios espaciais projetados no contínuo. Este modelo introduz um novo método para analisar a formação dos preços dos lançamentos imobiliários. Consideramos em nosso modelo hedônico, além das características intrínsecas, também as características da vizinhança e o ambiente econômico. Com este modelo, conseguimos observar os preços de equilíbrio para as respectivas localizações e uma interpretação mais clara da dinâmica de preços dos imóveis entre janeiro de 2000 e dezembro de 2013 para a cidade de São Paulo. / In this work will be made a continuous spatial-temporal model for real estate prices in the city of São Paulo estimated using Bayesian methods. We will decompose the series into a trend and cycle, and incorporate a set of explanatory variables and random spatial effects projected into the continuum. This model introduces a new method to analyze the price formation of real estate launches. We consider in our hedonic model, besides the intrinsic characteristics, also the characteristics of the neighborhood and the economic environment. With this model, we were able to observe the equilibrium prices for the respective locations and a clearer interpretation of the dynamics of real estate prices between January 2000 and December 2013 for the city of São Paulo.

Durant les quatre dernières décennies, l’industrie des semi-conducteurs a connu une croissance exponentielle. En accord avec l’ITRS et à mesure de l'approche vers le nanomètre, les promesses sont énormes et les composants sont réduits à leurs limites physiques et économiques ultimes. L’objectif principal de cette thèse est d’explorer les opportunités offertes par les technologies émergentes pour la conception d’architectures reconfigurables. Tout d’abord, la thèse se centre sur l’architecture FPGA traditionnelle et étudie des améliorations structurelles apportées par des technologies en ruptures. Tandis que les structures de configuration et de routage occupent la majeure partie de la surface d’un FPGA et limitent ces performances, l’intégration 3-D apparait comme une bonne opportunité pour déplacer ces circuits dans les niveaux métalliques. Des circuits de configuration et de routage utilisant des mémoires résistives compatibles back-end, un procédé d’intégration 3-D ou encore un procédé de réalisation de transistors verticaux seront introduits et évalués dans un contexte architectural complet. Par la suite, la thèse présente de nouvelles propositions architecturales pour la logique à grain ultra-fin. La taille des éléments logiques peut être réduite grâce aux propriétés inhérentes de certaines technologies, telles que l’arrangement en structures entrecroisées de nanofils ou la polarité contrôlable des transistors carbones. Considérant le changement de granularité des opérateurs logiques, des topologies d’interconnexions fixes sont nécessaires afin d’éviter l’important surcoût dû à l’interconnexion programmable. Afin d’étudier les possibilités de cette organisation, un flot d’évaluation est présenté et utilisé pour explorer l’espace de conception relatif aux architectures à grain ultra-fin. / For the last four decades, the semiconductor industry has experienced an exponential growth. According to the ITRS, as we advance into the era of nanotechnology, the traditional CMOS electronics is reaching its physical and economical limits. The main objective of this thesis is to explore novel design opportunities for reconfigurable architectures given by the emerging technologies. On the one hand, the thesis will focus on the traditional FPGA architecture scheme, and survey some structural improvements brought by disruptive technologies. While the memories and routing structures occupy the major part of the FPGAs total area and mainly limit the performances, 3-D integration appears as a good candidate to embed all this circuitry into the metal layers. Configuration and routing circuits based on back-end compatible resistive memories, a monolithic 3-D process flow and a prospective vertical FETs process flow are introduced and assessed within a complete architectural context. On the other hand, the thesis will present some novel architectural schemes for ultra-fine grain computing. The size of the logic elements can be reduced thanks to inherent properties of the technologies, such as the crossbar organization or the controllable polarity of carbon electronics. Considering the granularity of the logic elements, specific fixed and incomplete interconnection topologies are required to prevent the large overhead of a configurable interconnection pattern. To evaluate the potentiality of this new architectural scheme, a specific benchmarking flow will be presented in order to explore the ultra-fine grain architectural design space.

Magister Commercii - MCom / The objective of this study is to investigate the empirical relationship between exports and economic growth in order to ascertain whether the hypothesis of export-led growth is valid in the case of South Africa. This study has not only focused on sectoral exports for the period 1990-2011; but it has also examined total exports for the period extending from 1970 to 2011. Using quarterly data and time series econometric techniques of co-integration and Granger-causality tests over the two set of periods, the key findings of the study are as follows: (i) At the aggregate level (using total exports): the technique of co-integration suggests that total exports and GDP moved together in the long-run, though deviations from the steady state might happen in the short-run. Furthermore, Granger causality tests inferred from the Vector Error Correction model reveal that the direction of causality between export and GDP growth is bidirectional. (ii) At the sectoral level (using the main component of exports): export-growth link emerges as a long-run behavioural relationship since a co-integrating relation was found among output and agricultural, manufactured and mining exports. This relationship demonstrates that manufactured exports have the greatest positive impact on output growth. (iii) Sectoral level Granger-causality tests based on ECM reveal the existence of a long run causality running from manufactured exports to GDP; whereas the short-run causality runs from manufactured and mining exports to GDP. However, the Toda-Yamamoto Granger test confirms only short-run causality from manufactured exports to GDP. In both cases, there is evidence of a uni-directional causality from exports to GDP.The above results show that the hypothesis of export-led growth is valid for South Africa. This implies that exports, particularly manufactured and mining exports play a key role in driving economic growth. Hence, the key policy implication of these results is that, measures which aim at stimulating production for exports and shifting the content of exports will meaningfully contribute to the improvement of GDP growth and employment prospects in South Africa.

The aim of this diploma thesis is to analyze the development of the prices of real estate in the Czech Republic. The thesis is divided into three main parts. The first one deals with the theoretical introduction to valuation of the real estate. Moreover, the thesis presents the current development of the prices of real estate on the Czech market. The last part focuses on co-integration analysis, within which an ADL model is created. This model serves as a base for an error correction model, which describes short-term as well as long-term relations within the time series. The explanatory variables are gross domestic product, consumer price index, the amount of finished apartments, interest rate of mortgage loans, common rate of unemployment, and average gross monthly income. It is the one-equation model which describes the relation among the already mentioned explanatory variables and the HPI index. analysis of the development of the prices of real estate

Le monde est actuellement confronté à une transition du marché de l'énergie qui est influencée notamment par la dynamique de la croissance économique globale, les négociations relatives aux changements climatiques et des prix de plus en plus volatils. Cette évolution rapide des réglementations et de la macro-économie transformera les conditions de la demande d'énergie, obligeant les gouvernements à acquérir un ensemble croissant d'outils quantitatifs pour mieux évaluer les résultats de leurs politiques fiscales. Cette thèse aborde cette problématique en analysant, par une approche basée sur les élasticités, les différentes facettes de la demande d'énergie dans le but d'achever une consommation énergétique durable. Cette approche est complémentée par l'analyse par grappes, la décomposition structurelle ainsi que par diverses outils économétriques appliques conjointement à l'échelle mondiale et nationale. Une attention particulière est faite sur la modélisation de la demande des marchés subsidiés notamment des pays du Conseil de Coopération du Golfe Arabique / The world is currently witnessing a transition in the energy scene that is significantly characterized by global economic growth dynamics, climate change negotiations and volatile energy prices. Rapidly evolving regulatory and macro-economic environments heavily impact on the demand-side of energy, forcing governments to acquire an ever-increasing set of quantitative tools to better assess the results of their taxation policies.This thesis addresses some of these issues by analyzing various facets of energy demand in order to generate sensible demand and price elasticities with real-life applications in sustainable energy management. For that purpose, a combination of cluster, decomposition and multiple econometric analysis is undertaken at global, regional and country-specific levels for households complemented by a policy analysis. A special focus is made on modeling consumer demand behavior for resource-rich economies of the Gulf Cooperation Countries, and the potential impact of removing residential electricity subsidies on the net societal welfare of Saudi Arabia.

Les futurs calculateurs de haute performance (HPC) devront faire face à deux défis majeurs : la densité de la bande passante d'interconnexion et les problématiques de consommation d'énergie. La photonique silicium est aujourd’hui perçue comme une solution solide pour aborder ces questions, tant du fait de ses performances que de sa viabilité économique en raison de sa compatibilité directe avec la microélectronique CMOS. Actuellement, une tendance de fond conduit à remplacer les interconnexions métalliques par des liens optiques ; cette évolution a été initiée sur des liaisons grandes distances mais atteint actuellement le niveau des liaisons entre cartes électroniques et pourrait conduire à moyen terme à l’intégration de liens optiques au sein mêmes des circuits intégrés électroniques. La prochaine étape est en effet envisagée pour l'interconnexion des processeurs au sein de puces multi-cœurs en positionnant les liens photoniques sur un même support de silicium (« interposer »). Plusieurs travaux ont démontré la possibilité d'intégrer tous les éléments nécessaires pour la réalisation de liaisons optiques sur un substrat de silicium ouvrant des perspectives de co-intégration optique et électronique très riches.Dans ce contexte, la première contribution de cette thèse est l'optimisation d'un lien de photonique de silicium en terme d'efficacité énergétique par bit (à minimiser). L'optimisation que nous avons conduite a pris en compte une modélisation de la consommation d'énergie pour le laser de la liaison, celle de l’étape dé-sérialisation des données, du résonateur en anneau considéré comme modulateur optique et des circuits de réception (« front-end ») et de décision. Les résultats ont montré que les principales contributions à la consommation de puissance au sein d’un lien optique sont la puissance consommée par le laser et les circuits d’alimentation du modulateur électro-optique. En considérant des paramètres de consommation extraits de simulations numériques et de travaux publiés dans des publications récentes, le débit optimal identifié se trouve dans la plage comprise entre 8 Gbits/seconde et 22 Gbits/seconde selon le nœud technologique CMOS utilisé (65nm à 28nm FD SOI). Il est également apparu qu’une diminution de la consommation de puissance statique du modulateur utilisé pourrait encore ramener ce débit optimal en-dessous de 8 Gbits/seconde.Afin de vérifier ces résultats, un circuit intégré récepteur de liaison optique a été conçu et fabriqué en se basant sur un débit de fonctionnement de 8 Gbits/seconde. Le récepteur utilise une technique d’entrelacement temporel destinée à réduire la vitesse d'horloge nécessaire et à éviter potentiellement l’étape de dé-sérialisation dédiée des informations. / Future high performance computer (HPC) systems will face two major challenges: interconnection bandwidth density and power consumption. Silicon photonic technology has been proposed recently as a cost-effective solution to tackle these issues. Currently, copper interconnections are replaced by optical links at rack and board level in HPCs and data centers. The next step is the interconnection of multi-core processors, which are placed in the same package on silicon interposers, and define the basic building blocks of these computers. Several works have demonstrated the possibility of integrating all elements needed for the realization of short optical links on a silicon substrate.The first contribution of this thesis is the optimization of a silicon photonic link for highest energy efficiency in terms of energy per bit. The optimization provides energy consumption models for the laser, a de- and serialization stage, a ring resonator as modulator and supporting circuitry, a receiver front-end and a decision stage. The optimization shows that the main consumers in optical links is the power consumed by the laser and the modulator's supporting circuitry. Using consumption parameters either gathered by design and simulation or found in recent publications, the optimal bit rate is found in the range between 8 Gbps and 22 Gbps, depending on the used CMOS technology. Nevertheless, if the static power consumption of modulators is reduced it could decrease even below 8 Gbps.To apply the results from the optimization an optical link receiver was designed and fabricated. It is designed to run at a bit rate of 8 Gbps. The receiver uses time interleaving to reduce the needed clock speed and aleviate the need of a dedicated deserialization stage. The front-end was adapted for a wide dynamic input range. In order to take advantage of it, a fast mechanism is proposed to find the optimal threshold voltage to distinguish ones from zeros.Furthermore, optical clock channels are explored. Using silicon photonics a clock can be distributed to several processors with very low skew. This opens the possibility to clock all chips synchronously, relaxing the requirements for buffers that are needed within the communication channels. The thesis contributes to this research direction by presenting two novel optical clock receivers. Clock distribution inside chips is a major power consumer, with small adaptation the clock receivers could also be used inside on-chip clocking trees.