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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
131

Simulação compilada para arquiteturas descritivas em ArchC / Compiled simulation for computer architectures described with ArchC

Bartholomeu, Marcus 11 November 2005 (has links)
Orientadores: Rodolfo Jardim de Azevedo, Guido C. S. Araujo / Tese (doutorado) - Universidade Estadual de Campinas, Instituto de Computação / Made available in DSpace on 2018-08-06T01:58:05Z (GMT). No. of bitstreams: 1 Bartholomeu_Marcus_D.pdf: 1185861 bytes, checksum: 17a0dd5731430c30ae20f0996b1215c1 (MD5) Previous issue date: 2005 / Resumo: o simulador é uma das ferramentas mais importantes para o desenvolvimento de uma nova arquitetura computacional. Entre as vantagens que ele apresenta, destacam-se a flexibilidade e baixo custo. Os primeiros simuladores eram criados manualmente, uma prática muito propensa a erros. Atualmente, Linguagens de Descrição de Arquiteturas (ADLs) facilitam a geração dessas ferramentas. O foco deste trabalho é a pesquisa em técnicas de simulação rápida utilizando a ADL ArchC. Partindo do estado da arte nesta área, a simulação compilada, conseguiu-se melhorar ainda mais o desempenho dos simuladores de conjunto de instruções. Duas otimizações foram propostas. A primeira simula atomicamente os blocos básicos, sem nenhum tipo de teste entre as instruções, oferecendo um ganho de desempenho médio de 70%. A segunda otimização calcula antecipadamente o alvo da maioria das instruções de salto, permitindo o controle do fluxo de execução pelo simulador. Esta otimização é um passo adicional à primeira, oferecendo um ganho de desempenho combinado médio de 180%. Além da simulação rápida, também foi desenvolvida uma metodologia para que simuladores de arquiteturas possam interagir com a máquina hospedeira permitindo, por exemplo, o acesso a arquivos locais e a passagem de parâmetros de linha de commando. Também foi definida uma interface para acesso a dados externos que permitiu a implementação de um protótipo para simulação de arquiteturas com múltiplos processadores. Esta interface de dados será integrada à ArchC e permitirá a co-simulação de blocos genéricos descritos em SystemC / Abstract: The simuIator is one of the most important tools to design a new computer architecture. It has many advantages, the most important are flexibility and Iow cost. The first simulators were created manually, which was an error-prone practice. Nowadays, Architecture Description Languages (ADLs) simplifies the generation of these tools. This work focus on the research of new fast simulation techniques using the ArchC ADL. Beginning from the state-of-art in this area, the compiled simulation, is was possible to speed-up the instruction set simulation performance even higher. Two optimizations were proposed. The first one simulates basic blocks atomically, without any condition test between instructions, and speed-up the simuIation by 70% in average. The second optimization anticipates the majority of target address calculation for jump instructions, allowing the flow control to be done by the simuIator. This second optimization is an improvement to the first one, and provides an speed-up of 180% in average. Besides the research of fast simuIation techniques, a methodology was created to allow architecture simulators to interact with the host machine, which makes it possible, for example, to access local files and take options from command-line. Also, an interface were defined to access external data which allows a propotype imIementation of a multiprocessar architecture simulator. This interface will be integrated to ArchC to achieve co-simulation capability for generic blocks described in SystemC / Doutorado / Doutor em Ciência da Computação
132

Um metodo de testes de integração para sistemas baseados em componentes / A method of integration testing for system based on components

Cardoso, Josiane Aparecida 07 August 2018 (has links)
Orientador: Eliane Martins / Dissertação (mestrado profissional) - Universidade Estadual de Campinas, Instituto de Computação / Made available in DSpace on 2018-08-07T10:05:17Z (GMT). No. of bitstreams: 1 Cardoso_JosianeAparecida_M.pdf: 1727201 bytes, checksum: 2b03579fc8602d15cc944cb59e39086e (MD5) Previous issue date: 2006 / Resumo: O desenvolvimento baseado em componentes vem sendo cada vez mais utilizado hoje em dia, pois permite que um sistema seja construído através da reutilização de software. Um problema associado à reutilização de componentes é o fato de que um componente implementado para um determinado contexto pode ser reaproveitado em um outro contexto com especificações diferentes. Esse tipo de problema pode comprometer a construção de um novo sistema de software confiável baseado em componentes. Falhas devem ser encontradas não só nos componentes, mas na integração dos componentes. No contexto de testes de integração, estratégias têm sido propostas considerando apenas abordagens estáticas com base no diagrama de classes do sistema para se definir uma ordenação para os testes de integração minimizando o número de stubs necessários. Esse trabalho propõe um método de testes de integração para sistemas baseados em componentes que se baseia na arquitetura do sistema considerando uma abordagem dinâmica sem a necessidade do código fonte do componente / Abstract: Nowadays the development based on components is being more frequently used since it allows a system to be constructed through the reuse of software. A problem associated to the reuse of components is that one component implemented for a specific context may be reused in another context with different specifications. This kind of problem may jeopardize the construction of a new reliable software system based on components. Faults must be found not only in the components, but in the integration of the components as well. In the context of integration testing, strategies have been proposed considering only the structural approaches based on the class diagram of the system to define an ordering for the integration testing, minimizing the number of stubs needed. This work proposes a method of integration testing for system based on components, which bases itself on the architecture of the system, considering a behavioral approach without the need for the component source code / Mestrado / Engenharia de Computação / Mestre em Computação
133

Uma arquitetura para negociação de redes virtualizadas na internet do futuro baseada em classes de QoS / A Framework for negotiation of virtualized networks in the future internet based on QoS classes

Gomes, Rafael Lopes, 1987- 07 October 2012 (has links)
Orientador: Edmundo Roberto Mauro Madeira / Dissertação (mestrado) - Universidade Estadual de Campinas, Instituto de Computação / Made available in DSpace on 2018-08-21T07:23:57Z (GMT). No. of bitstreams: 1 Gomes_RafaelLopes_M.pdf: 1407268 bytes, checksum: c68d2355ef384cdcbcdb0658ddb32852 (MD5) Previous issue date: 2012 / Resumo: Ao longo dos anos a Internet vem se tornando o principal meio de comunicação, onde muitas empresas e organizações a usam como base para os seus serviços, sendo que na maioria dos casos, estas empresas têm vários provedores de Internet (Modelo Multi- Provedor). Entretanto, a Internet atual não provê garantias de Qualidade de Serviço (Quality of Service - QoS). Para contornar esse problema, as empresas realizam um Acordo de Nível de Serviços (Service Level Agreement - SLA). Dentro desse contexto, esta dissertação de mestrado tem por objetivo desenvolver uma arquitetura para negociação de redes virtualizadas na Internet do Futuro utilizando técnicas de classificação de tráfegos para decidir, a partir dos dados coletados e das políticas de SLA, por qual ISP (Internet Service Provider) enviar os dados de acordo com a classe que os dados se enquadram. Espera-se assim atender aos requisitos de QoS de cada classe de tráfego, e diminuir os custos da empresa. Para realizar a validação da arquitetura proposta, foram efetuados experimentos baseados no protocolo OpenFlow e no emulador Mininet. Os resultados mostraram a eficiência do modelo desenvolvido, bem como a capacidade do mesmo de cumprir os objetivos definidos / Abstract: Over the years the Internet has become the primary means of communication, where many companies and organizations use it as basis for their services, and in most cases, these companies have multiple Internet service providers (Multi-Provider Model). However, the current Internet does not guarantee Quality of Service (QoS), to circumvent this problem; the companies apply a Service Level Agreements (SLA). Within this context, this dissertation aims to develop architecture for traffic engineering based on traffic classification to decide, from the data collected and SLA policies, for which ISPs to send the data, according to the data class. It is expected to ensure QoS requirements of each traffic class, and reduce the costs of the company. To validate the proposed framework, experiments based on the OpenFlow protocol and on the Mininet emulator were performed. The results showed the efficiency of the framework, as well as its capacity to fulfill the desired requirements / Mestrado / Ciência da Computação / Mestre em Ciência da Computação
134

TOWARDS A SECURITY REFERENCE ARCHITECTURE FOR NETWORK FUNCTION VIRTUALIZATION

Unknown Date (has links)
Network Function Virtualization (NFV) is an emerging technology that transforms legacy hardware-based network infrastructure into software-based virtualized networks. Instead of using dedicated hardware and network equipment, NFV relies on cloud and virtualization technologies to deliver network services to its users. These virtualized network services are considered better solutions than hardware-based network functions because their resources can be dynamically increased upon the consumer’s request. While their usefulness can’t be denied, they also have some security implications. In complex systems like NFV, the threats can come from a variety of domains due to it containing both the hardware and the virtualize entities in its infrastructure. Also, since it relies on software, the network service in NFV can be manipulated by external entities like third-party providers or consumers. This leads the NFV to have a larger attack surface than the traditional network infrastructure. In addition to its own threats, NFV also inherits security threats from its underlying cloud infrastructure. Therefore, to design a secure NFV system and utilize its full potential, we must have a good understanding of its underlying architecture and its possible security threats. Up until now, only imprecise models of this architecture existed. We try to improve this situation by using architectural modeling to describe and analyze the threats to NFV. Architectural modeling using Patterns and Reference Architectures (RAs) applies abstraction, which helps to reduce the complexity of NFV systems by defining their components at their highest level. The literature lacks attempts to implement this approach to analyze NFV threats. We started by enumerating the possible threats that may jeopardize the NFV system. Then, we performed an analysis of the threats to identify the possible misuses that could be performed from them. These threats are realized in the form of misuse patterns that show how an attack is performed from the point of view of attackers. Some of the most important threats are privilege escalation, virtual machine escape, and distributed denial-of-service. We used a reference architecture of NFV to determine where to add security mechanisms in order to mitigate the identified threats. This produces our ultimate goal, which is building a security reference architecture for NFV. / Includes bibliography. / Dissertation (Ph.D.)--Florida Atlantic University, 2020. / FAU Electronic Theses and Dissertations Collection
135

MACHINE LEARNING DEMODULATOR ARCHITECTURES FOR POWER-LIMITED COMMUNICATIONS

Unknown Date (has links)
The success of deep learning has renewed interest in applying neural networks and other machine learning techniques to most fields of data and signal processing, including communications. Advances in architecture and training lead us to consider new modem architectures that allow flexibility in design, continued learning in the field, and improved waveform coding. This dissertation examines neural network architectures and training methods suitable for demodulation in power-limited communication systems, such as those found in wireless sensor networks. Such networks will provide greater connection to the world around us and are expected to contain orders of magnitude more devices than cellular networks. A number of standard and proprietary protocols span this space, with modulations such as frequency-shift-keying (FSK), Gaussian FSK (GFSK), minimum shift keying (MSK), on-off-keying (OOK), and M-ary orthogonal modulation (M-orth). These modulations enable low-cost radio hardware with efficient nonlinear amplification in the transmitter and noncoherent demodulation in the receiver. / Includes bibliography. / Dissertation (Ph.D.)--Florida Atlantic University, 2020. / FAU Electronic Theses and Dissertations Collection
136

Mobility and radio resource management in heterogeneous wireless networks

Liu, Xiaoshan, 劉曉杉 January 2006 (has links)
published_or_final_version / abstract / Electrical and Electronic Engineering / Doctoral / Doctor of Philosophy
137

A Study on Partially Homomorphic Encryption Schemes

Unknown Date (has links)
High processing time and implementation complexity of the fully homomorphic encryption schemes intrigued cryptographers to extend partially homomorphic encryption schemes to allow homomorphic computation for larger classes of polynomials. In this thesis, we study several public key and partially homomorphic schemes and discuss a recent technique for boosting linearly homomorphic encryption schemes. Further, we implement this boosting technique on CGS linearly homomorphic encryption scheme to allow one single multiplication as well as arbitrary number of additions on encrypted plaintexts. We provide MAGMA source codes for the implementation of the CGS scheme along with the boosted CGS scheme. / Includes bibliography. / Thesis (M.S.)--Florida Atlantic University, 2017. / FAU Electronic Theses and Dissertations Collection
138

Unifying the conceptual levels of network security through the use of patterns

Unknown Date (has links)
Network architectures are described by the International Standard for Organization (ISO), which contains seven layers. The internet uses four of these layers, of which three are of interest to us. These layers are Internet Protocol (IP) or Network Layer, Transport Layer and Application Layer. We need to protect against attacks that may come through any of these layers. In the world of network security, systems are plagued by various attacks, internal and external, and could result in Denial of Service (DoS) and/or other damaging effects. Such attacks and loss of service can be devastating for the users of the system. The implementation of security devices such as Firewalls and Intrusion Detection Systems (IDS), the protection of network traffic with Virtual Private Networks (VPNs), and the use of secure protocols for the layers are important to enhance the security at each of these layers.We have done a survey of the existing network security patterns and we have written the missing patterns. We have developed security patterns for abstract IDS, Behavior–based IDS and Rule-based IDS and as well as for Internet Protocol Security (IPSec) and Transport Layer Security (TLS) protocols. We have also identified the need for a VPN pattern and have developed security patterns for abstract VPN, an IPSec VPN and a TLS VPN. We also evaluated these patterns with respect to some aspects to simplify their application by system designers. We have tried to unify the security of the network layers using security patterns by tying in security patterns for network transmission, network protocols and network boundary devices. / Includes bibliography. / Dissertation (Ph.D.)--Florida Atlantic University, 2014. / FAU Electronic Theses and Dissertations Collection
139

Progress towards push button verification for business process execution language artifacts

Unknown Date (has links)
Web Service Business Process Execution Language (BPEL) has become a standard language in the world of Service Oriented Architecture (SOA) for specifying interactions between internet services. This standard frees developers from low-level concerns involving platform, implementation, and versioning. These freedoms risk development of less robust artifacts that may even become part of a mission-critical system. Model checking a BPEL artifact for correctness with respect to temporal logic properties is computationally complex, since it requires enumerating all communication and synchronization amongst various services with itself. This entails modeling BPEL features such as concurrency, hierarchy, interleaving, and non-deterministic choice. The thesis will provide rules and procedures for translating these features to a veriable model written in Promela. We will use these rules to build a program which automates the translation process, bringing us one step closer to push button verification. Finally, two BPEL artifacts will be translated, manually edited, verified, and analyzed. / by Augusto Varas. / Thesis (M.S.C.S.)--Florida Atlantic University, 2009. / Includes bibliography. / Electronic reproduction. Boca Raton, Fla., 2009. Mode of access: World Wide Web.
140

Web services cryptographic patterns

Unknown Date (has links)
Data security has been identified as one of the most important concerns where sensitive messages are exchanged over the network. In web service architecture, multiple distributed applications communicate with each other over the network by sending XML messages. How can we protect these sensitive messages? Some web services standards have emerged to tackle this problem. The XML Encryption standard defines the process of encrypting and decrypting all of an XML message, part of an XML message, or even an external resource. Like XML Encryption, the XML Signature standard specifies how to digitally sign an entire XML message, part of an XML message, or an external object. WS-Security defines how to embed security tokens, XML encryption, and XML signature into XML documents. It does not define new security mechanisms, but leverages existing security technologies such as encryption and digital signature. / by Keiko Hashizume. / Thesis (M.S.)--Florida Atlantic University, 2009. / Includes bibliography. / Electronic reproduction. Boca Raton, Fla., 2009. Mode of access: World Wide Web.

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