With the increasing demand for multi-media,multi-core system architecture used in parallel processing of large amounts of data to carry out operations,in the past,large amounts of data is transferred through an independent control of DMA,and often have the following shortcomings,(1)As a result of the transmission of data is completed by reading and writing,caused the burden of memory clock singnal,(2)A large number of occupied bandwidth,caused the collision with processor by using the data bus. Based on the above shortcomings, this paper proposed an internal fast data switching mechanism through AMBA instruction by integrating the memory controller and DMA function. With the high transmission clock rate of DDR2, to achieve (1) transfer data by the original memory clock rate between memory and memory, (2) transmission between memory and device can be reached by bridge of the controller. Can significantly reduce not only the System Bus in the workload and provide the purpose of handling large amounts of data, to reduce the transmission of data on the amount of time spent and release of the right to use the Bus to other peripheral devices and to enhance the efficiency of the overall system.We also achieved the interface of SATA bridge in the controller. Through the DDR2 memory buffer to enhance the efficiency of accessing information and to provide strong type on the data buffer mechanism, can effectively reduce the number of solid-state hard disk access, the extension of its work life. According to the simulation results show that the use of traditional DMA transfer mechanism for the rapid exchange of data, compared to provide a minimum bandwidth in DDR2, you can save about 51% of transmission time, in the DDR2 maximum bandwidth available, you can save 87% of transmission time.

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Sammanfattning: SAAB Communication i Linköping sysslar med konsultverksamhet mot ett flertal nationella och internationella företag inom både den civila och militära sektorn. Fokus ligger på flyget med uppdrag inom telesystem, radiosystem, signaturanpassning, EMC, atmosfärisk påverkan mm. I det sistnämnda ingår även kosmisk strålnings inverkan på elektronik. Den fortsatta miniatyriseringen av elektronik, speciellt minneselektronik leder till ökad känslighet mot den kosmiska partikelstrålningen som ständigt regnar ner på jorden, därför är det extra noga att minnen testas innan de sätts i bruk vid flygburna system. Syftet med detta examensarbete är att konstruera en provplattform som registrerar fel som uppkommer i ett DDR2 SDRAM minne vid påverkan av den ovannämnda strålningen. Detta examensarbete är en vidareutveckling av en provplattform baserad på en FPGA – lösning. Eftersom denna provplattform saknade stöd för den snabbare minnestypen DDR2 SDRAM, blev syftet med detta examensarbete att ta fram en ny plattform som stödjer denna typ av minne. Den nya provplattformen är en PowerPC baserad lösning från Freescale Semiconductor®. Provplattformen kommer att anslutas till en PC som kör ett program som analyserar antalet detekterade minnesfel, typ av fel samt hur många neutroner minnet har blivit utsatt för under testet. Mjukvaruutvecklingen implementeras i programmeringsspråken assembler samt C. Innan testet av minnet påbörjas, fylls minnet med ett förbestämt bitmönster, om förändringar av bitmönstret sker vid bestrålning av minnet kommer dessa ändringar att registreras tillsammans med den minnesadress där felet inträffade. Abstract: SAAB Communication in Linköping offers consulting toward several national and international companies, both within the civilian and the military market. Focus is in the field of avionics and deals with telecommunication system, radio system, signature adaption, EMC, atmospheric impact etc. The later also includes the influence of cosmic radiation in electronics. The oncoming miniaturisation of electronics, especially within the memory fields causes an increased susceptibility of cosmic radiation that constantly hits our planet, therefore it is of great importance that memories is to be tested before used in airborne systems. The purpose of this thesis is to construct a test platform in order to register faults that occur in a DDR2 SDRAM memory under influence of the mentioned radiation. This thesis is further development of a test platform previously based on a FPGA – solution. Since this test platform had not to support for the more rapidly type of memory as DDR2 SDRAM, the purpose of this thesis became to develop a new platform with support for this type of memory. This new test platform is based on PowerPC from Freescale Semiconductor® The test platform will be connected to a PC running a program that counts the number of detected memory faults, recognises a type of error and records the number of neutrons that the memory has been exposed to during the test. The software is implemented in the programming languages assembler and C. The tested memory will be loaded with a predetermined bit pattern before the test begins, if a change in the bit pattern is detected during exposure of radiation, these faulty bit patterns will be registered together with the memory address where the error has occurred. / Andreas Skoglund Gustav adolfsg. 4 58220 Linköping 0739-230620 ti00ask@student.bth.se, andreas.skoglund@gmail.com, andreas.skoglund@saabgroup.com

A dengue é uma doença causada pelo vírus da dengue (DENV) cuja incidência é alarmante no mundo. Seu principal método de controle, combate ao vetor, não é totalmente eficaz, o que faz da busca por vacinas seguras e eficazes uma prioridade. Por outro lado o uso de proteínas não estruturais do vírus mostra-se promissor ao desenvolvimento de vacinas contra a dengue. Assim, neste trabalho buscamos desenvolver e caracterizar estratégias vacinais, baseadas na proteína NS1, utilizando a via intradérmica (i.d.) de imunização. Para isso foram obtidas proteínas quimeras contendo a NS1 DENV2 fusionada a anticorpos específicos para os receptores DEC e DCIR2 de células dendríticas. O emprego destas proteínas em ensaios de imunização pelas vias i.d. e i.p induziram respostas humorais NS1-específicas, com modulação do perfil de subclasses de IgG, aumento da afinidade dos mesmos, sem causar efeitos adversos nos animais imunizados. Assim, a inédita combinação da estratégia de direcionamento aqui descrita com a via i.d. faz-se promissora ao desenvolvimento de vacinas contra o DENV. / Dengue is a disease caused by dengue virus (DENV) whose incidence is alarming in the world. Its main method of control, combating the vector, is not fully effective, which makes the search for safe and effective vaccines a priority. Moreover the use of non-structural proteins of the virus shows promise for the development of vaccines against dengue. In this work we developed and characterized vaccine strategies based on the NS1 protein using the intradermal route (i.d.) immunization. For this, chimeras containing the NS1 protein fused to DENV2 antibodies specific for the receptor DEC and DCIR2 dendritic cells were obtained. The use of these proteins in immunization trials by way i.d. and i.p. induced NS1-specific humoral responses, with modulation of the IgG subclasses profile, increased affinity thereof without causing adverse effects in the immunized animals. Thus, the new combination of targeting strategy described here with via i.d. any be promising for the development of vaccines against DENV.

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Tato disertační práce se zabývá využitím programovatelných hradlových polí (FPGA) v diagnostice měničů, využívajících spínaných IGBT tranzistorů. Je zaměřena na budiče těchto výkonových tranzistorů a jejich struktury. Přechodné jevy veličin, jako jsou IG, VGE, VCE během procesu přepínání (zapnutí, vypnutí), mohou poukazovat na degradaci IGBT. Pro měření a monitorování těchto veličin byla navržena nová architektura budiče IGBT. Rychlé měření a monitorování během přepínacího děje vyžaduje vysokou vzorkovací frekvenci. Proto jsou navrhovány paralelní vysokorychlostní AD převodníky (> 50 MSPS). Práce je zaměřena převážně na návrh zařízení s FPGA včetně hardware a software. Byla navržena nová deska plošných spojů s FPGA, která plní požadované funkce, jako je řízení IGBT pomocí vícenásobných paralelních koncových stupňů, monitorování a diagnostiku, a propojení s řídicí jednotkou měniče.