O ChipCflow é o projeto de uma ferramenta para execução de algoritmos utilizando o modelo a fluxo de dados dinâmico em hardware reconfigurável. Tem como principal objetivo utilizar o modelo de arquitetura a fluxo de dados, associado ao conceito de arquiteturas reconfiguráveis, para acelerar programas de aplicação escritos em C. Essa aceleração vai acontecer nas partes mais intensas de processamento (exemplo: loops), através da execução direta em hardware, aproveitando ao máximo o paralelismo considerado natural do modelo a fluxo de dados. O módulo de conversão C em grafo a fluxo de dados, desenvolvido neste trabalho de doutoramento, é parte fundamental no desenvolvimento do projeto ChipCflow e se trata de um pré-compilador C que gera código VHDL para os operadores a fluxo de dados a partir de módulos do programa de aplicação escrito originalmente em C. É possível considerar como principal resultado dessa tese, a implementação de algoritmos a partir de uma linguagem C em grafo a fluxo de dados no modelo proposto no projeto ChipCflow, onde os operadores a fluxo de dados são os já tradicionalmente conhecidos, e até mesmo a forma de interconexão também, entretanto a forma de abordar essa implementação, em VHDL, e na forma de fluxo de dados dinâmico, torna o modelo proposto, tanto para o hardware como para o compilador, uma característica única existente até o momento. / ChipCflow is a tool for algorithms execution using a data dynamic flow in reconfigurable hardware. The main purpose of the work is to use the data flow architecture model, associated to the concept of reconfigurable architectures, to speed up C written applications. The program acceleration happens in the most intensive processing parts (example: loops), through direct hardware execution, using to advantage of the natural parallelism of the data flow model. The C conversion module in data flow graph is the basic part in the development of the ChipCflow project and the specific objective of the developed work. In this work we present detais of the C precompiler that generates VHDL code for the data flow operators modules of the written program of the original application in C. It is possible to consider as the main result of this thesis, the implementation of algorithms from a C language in the data flow graph model proposed in the project ChipCflow, where the operators to the data stream are typically already known, and even the way interconnection too, but how to approach the implementation in VHDL, and as a dynamic data flow, makes the proposed model for both the hardware and the compiler, a feature only available so far.

O ChipCflow é o projeto de uma ferramenta para execução de algoritmos utilizando o modelo a fluxo de dados dinâmico em hardware reconfigurável. Tem como principal objetivo utilizar o modelo de arquitetura a fluxo de dados, associado ao conceito de arquiteturas reconfiguráveis, para acelerar programas de aplicação escritos em C. Essa aceleração vai acontecer nas partes mais intensas de processamento (exemplo: loops), através da execução direta em hardware, aproveitando ao máximo o paralelismo considerado natural do modelo a fluxo de dados. O módulo de conversão C em grafo a fluxo de dados, desenvolvido neste trabalho de doutoramento, é parte fundamental no desenvolvimento do projeto ChipCflow e se trata de um pré-compilador C que gera código VHDL para os operadores a fluxo de dados a partir de módulos do programa de aplicação escrito originalmente em C. É possível considerar como principal resultado dessa tese, a implementação de algoritmos a partir de uma linguagem C em grafo a fluxo de dados no modelo proposto no projeto ChipCflow, onde os operadores a fluxo de dados são os já tradicionalmente conhecidos, e até mesmo a forma de interconexão também, entretanto a forma de abordar essa implementação, em VHDL, e na forma de fluxo de dados dinâmico, torna o modelo proposto, tanto para o hardware como para o compilador, uma característica única existente até o momento. / ChipCflow is a tool for algorithms execution using a data dynamic flow in reconfigurable hardware. The main purpose of the work is to use the data flow architecture model, associated to the concept of reconfigurable architectures, to speed up C written applications. The program acceleration happens in the most intensive processing parts (example: loops), through direct hardware execution, using to advantage of the natural parallelism of the data flow model. The C conversion module in data flow graph is the basic part in the development of the ChipCflow project and the specific objective of the developed work. In this work we present detais of the C precompiler that generates VHDL code for the data flow operators modules of the written program of the original application in C. It is possible to consider as the main result of this thesis, the implementation of algorithms from a C language in the data flow graph model proposed in the project ChipCflow, where the operators to the data stream are typically already known, and even the way interconnection too, but how to approach the implementation in VHDL, and as a dynamic data flow, makes the proposed model for both the hardware and the compiler, a feature only available so far.

Die Universitätsbibliothek Chemnitz bietet seit vielen Jahren verschiedene Services zum Open-Access-Publizieren für die Wissenschaftler der Technischen Universität. Dazu gehören u.a. das digitale Volltextarchiv, das Open Journal System und der Universitätsverlag. Wissenschaftliche Autoren können sowohl auf dem Goldenen als auch auf dem Grünen Weg Open Access publizieren. In diesem Jahr wurde erstmals ein Publikationsfonds für die Veröffentlichung von Open-Access-Artikeln eingerichtet. Es wurden Mittel von der Deutschen Forschungsgemeinschaft und der Technischen Universität Chemnitz bereitgestellt. Damit können die Universitätsangehörigen die finanzielle Übernahme von Publikationsgebühren für Open-Access-Artikel bei der Bibliothek beantragen. Sind die Fördervoraussetzungen erfüllt, erfolgt der Zuschlag in der Reihenfolge des Eingangs der Rechnung. / Since many years the University Library of Chemnitz offers several services regarding open access publication to the scientists of Chemnitz University of Technology. Among others this includes a digital archive, a Journal Management System, and the University Press. It is possible to publish on Golden Way of Open Access as well as on Green Way. This year we offer for the first time a publication funds for the publication of open access articles. The financial resources are provided by Deutsche Forschungsgemeinschaft and Chemnitz University of Technology. Please apply for financial support at the University Library if you need to pay a publication fee for open access articles. If the criteria for financial support are met an agreement will be made in order of invoices received.

Depuis une dizaine d'année, l'évolution des machines de calcul tend vers des architectures parallèles et hétérogènes. Composées de plusieurs nœuds connectés via un réseau incluant chacun des unités de traitement hétérogènes, ces grilles offrent de grandes performances. Pour programmer ces architectures, l'utilisateur doit s'appuyer sur des modèles de programmation comme MPI, OpenMP, CUDA. Toutefois, il est toujours difficile d'obtenir à la fois une bonne productivité du programmeur, qui passe par une abstraction des spécificités de l'architecture et performances. Dans cette thèse, nous proposons d'exploiter l'idée qu'un modèle de programmation spécifique à un domaine applicatif particulier permet de concilier ces deux objectifs antagonistes. En effet, en caractérisant une famille d'applications, il est possible d'identifier des abstractions de haut niveau permettant de les modéliser. Nous proposons deux modèles spécifiques au traitement du signal et de l'image sur cluster hétérogène. Le premier modèle est statique. Nous lui apportons une fonctionnalité de migration de tâches. Le second est dynamique, basé sur le support exécutif StarPU. Les deux modèles offrent d'une part un haut niveau d'abstraction en modélisant les applications de traitement du signal et de l'image sous forme de graphe de flot de données et d'autre part, ils permettent d'exploiter efficacement les différents niveaux de parallélisme tâche, données, graphe. Ces deux modèles sont validés par plusieurs implémentations et comparaisons incluant deux applications de traitement de l'image du monde réel sur cluster CPU-GPU. / Since a decade, computing systems evolved to parallel and heterogeneous architectures. Composed of several nodes connected via a network and including heterogeneous processing units, clusters achieve high performances. To program these architectures, the user must rely on programming models such as MPI, OpenMP or CUDA. However, it is still difficult to conciliate productivity provided by abstracting the architectural specificities, and performances. In this thesis, we exploit the idea that a programming model specific to a particular domain of application can achieve these antagonist goals. In fact, by characterizing a family of application, it is possible to identify high level abstractions to efficiently model them. We propose two models specific to the implementation of signal and image processing applications on heterogeneous clusters. The first model is static. We enrich it with a task migration feature. The second model is dynamic, based on the StarPU runtime. Both models offer firstly a high level of abstraction by modeling image and signal applications as a data flow graph and secondly they efficiently exploit task, data and graph parallelisms. We validate these models with different implementations and comparisons including two real-world applications of images processing on a CPU-GPU cluster.

This paper focuses on the Double Fed Induction Machine in the Pumped Storage Power Plants. It includes listing of this plants in the world, where such a technology is used; principle of Double Fed Induction Machine, its usage with variable speed, advantages and disadvantages and also experience of its usage.

Nach den Zerstörungen der beiden Weltkriege unterstützte die „Notgemeinschaft der deutschen Wissenschaft“ in den 20er- und in den 50er Jahren den Wiederaufbau der Literaturversorgung in Deutschland. Die 1951 gegründete Deutsche Forschungsgemeinschaft (DFG) entwickelte daraus seit den 60er Jahren einen Plan zur Spitzenversorgung der Wissenschaften mit Literatur und Informationen. Rund 40 Universal-, Spezial- und Fachbibliotheken sollten arbeitsteilig die ausländische Literatur zu rund 110 Fachgebieten möglichst vollständig erwerben können. In den letzten Jahren investierte die DFG in diesen Sondersammelgebietsplan und in die zugehörigen Virtuellen Fachbibliotheken jährlich rund 14 Millionen Euro, nicht eingerechnet die erheblichen Eigenleistungen der Bibliotheken.

Services that rely on the semantic computations of users’ natural linguistic inputs are becoming more frequent. Computing semantic relatedness between texts is problematic due to the inherit ambiguity of natural language. The purpose of this thesis was to show how a sentence could be compared to a predefined semantic Definite Clause Grammar (DCG). Furthermore, it should show how a DCG-based system could benefit from such capabilities. Our approach combines openly available specialized NLP frameworks for statistical parsing, part-of-speech tagging and word-sense disambiguation. We compute the semantic relatedness using a large lexical and conceptual-semantic thesaurus. Also, we extend an existing programming language for multimodal interfaces, which uses static predefined DCGs: COactive Language Definition (COLD). That is, every word that should be acceptable by COLD needs to be explicitly defined. By applying our solution, we show how our approach can remove dependencies on word definitions and improve grammar definitions in DCG-based systems.

Nach den Zerstörungen der beiden Weltkriege unterstützte die „Notgemeinschaft der deutschen Wissenschaft“ in den 20er- und in den 50er Jahren den Wiederaufbau der Literaturversorgung in Deutschland. Die 1951 gegründete Deutsche Forschungsgemeinschaft (DFG) entwickelte daraus seit den 60er Jahren einen Plan zur Spitzenversorgung der Wissenschaften mit Literatur und Informationen. Rund 40 Universal-, Spezial- und Fachbibliotheken sollten arbeitsteilig die ausländische Literatur zu rund 110 Fachgebieten möglichst vollständig erwerben können. In den letzten Jahren investierte die DFG in diesen Sondersammelgebietsplan und in die zugehörigen Virtuellen Fachbibliotheken jährlich rund 14 Millionen Euro, nicht eingerechnet die erheblichen Eigenleistungen der Bibliotheken.

Kunst im Zeitalter von Miced Media. Jetzt und für künftige Generationen - Zeitgenössische Kunst als DFG-gefördertes Sondersammelgebiet. Finden, was man sucht - Erschließung des Sondersammelgebietes. Schlagworte und Schlagwortketten - Schlüssel zu unsichtbaren Inhalten. Internetseiten- googles "best of". Schneller suchen - besser suchen.

Cette étude cherche à évaluer le Débit de la Filtration Glomérulaire (DFG) dans le rein humain par IRM. L'estimation de ce paramètre quantitatif nécessite le suivi de la cinétique intrarénale de Gd après son injection en bolus. Pour atteindre cet objectif, nous avons développé sous IDEA Siemens une séquence SR-FLASH strictement pondérée en T1 capable de suivre en dynamique l'évolution du signal RMN après l'injection d'un bolus de produit de contraste. Cette séquence possède un codage de phase centré permettant de déterminer le contraste au début de la période d'acquisition de l'image. Nous avons également mis en oeuvre une séquence d'inversion IR-FLASH (avec codage de phase centré) permettant la mesure de la relaxation longitudinale en l'absence de produit de contraste, ce paramètre étant indispensable à la conversion de l'intensité du signal en concentration. Sachant que la relation entre l'intensité du signal RMN et la concentration de Gd n'est pas linéaire, nous avons proposé deux méthodes originales et malgré tout rapides et robustes pour convertir le signal RMN en concentration locale de Gd. Ceci nous a permis d'évaluer l'évolution de la concentration dans les deux reins et dans l'aorte au cours des premiers passages du produit. L'ajustement des ces mesures de concentration sur les équations décrivant une modélisation bicompartimentale de la fonction rénale a permis de calculer le DFG de chaque rein dans une population de cinq sujets possédant un fonctionnement rénal normal. / This study seeks to assess the Glomerular Filtration Rate (GFR) in the human kidney by MRI. To quantitatively estimate this parameter requires monitoring of the intrarenal kinetics of Gd after its bolus injection. To achieve this goal, we have developed under IDEA Siemens a SR-FLASH T1-weighted MRI sequence which can follow dynamic NMR signal changes after a bolus injection of Gd. This sequence has a centric phase-encoding scheme, and thus the image contrast was determined at the beginning of the acquisition period. Subsequently, we have implemented an IR-FLASH (with centric phase-encoding scheme) sequence to measure the longitudinal relaxation time in the absence of any injection of Gd ; this parameter is required to convert NMR signal intensities into Gd concentrations. knowing that the relation between the NMR signal intensities and the Gd concentrations is not linear, we have proposed two novel methods and yet fast and robust for conversion of the NMR signal intensities into local Gd concentration. This allowed us to estimate the temporal evolution of Gd concentrations in both kidneys and aorta. The fit of these concentrations measurements by a two-compartments model describing the function of the kidney allowed us to calculate the GFR of each kidney in a population of five subjects with normal renal function.