Nowadays about 1.2 billion people in world lack modern access to electricity, with the majority of them living in rural areas in low-income and developing contexts. This research addresses the issue of energy access by investigating the design of sustainable business models, and in particular by exploring the combination of Product-Service Systems (PSS) with Distributed Renewable Energy systems (DRE). The combination of PSS and DRE represents a new design approach to explore promising business models for energy access and to deliver clean and affordable solutions in low-income contexts. The overall aim of this research is to explore the applications of PSS and DRE in low-income and developing contexts, thus defining characteristics of these models, their variables and critical factors. Additionally, this research aims at developing a support for companies, practitioners and other stakeholders for designing sustainable PSS applied to DRE, with a specific focus on the idea generation phase of new solutions. The first part of this PhD resulted in the development of a classification system for PSS applied to DRE, in the identification of 15 Archetypal Models and in the collection of critical factors to successfully implement these models. Then, these findings have been translated into three tools for designing PSSs applied to DRE: the Innovation Map, the Design Framework and Cards, the Energy System Map. These tools have been tested, refined and evaluated through a series of iterative applications in South Africa, Botswana, Kenya and the UK. Through the testing activities, which involved a wide range of companies, NGOs, practitioners and experts, the usefulness, usability and completeness of the tools were demonstrated. This research concludes with reflections on the design process for different scenarios of applications and by highlighting further research activities for the field of PSS applied to DRE in low-income and developing contexts.

Scania is among the leading companies in the heavy vehicle industry. Scania also assemble engines for their trucks and buses, as well as to external marine and industrial applications. Wrongly assembled parts leads to quality problems, which makes it important to secure that the assembly is correct. To do this Design For Assembly (DFA) is used to describe how parts should become easier to assemble. Scania’s production unit for engine assembly has had a working method for DFA in the shape of a checklist, which is not used. The goal in this project was to investigate why the method is not used and to give suggestions for improvements.The problem with the existing DFA-method and the reasons it was not used was investigated through interviews and observations. A literature review was done to study other, established DFA-methods. Other production units at Scania were looked into as well, to compare their working approach towards DFA.Many rounds of tests were conducted to improve the DFA-method. The tests were applications to real cases. One problem was that the checklist was too complicated. The result was a modified checklist in which the number of questions went from 45 in the original to 24 in the final version. New response levels were introduced containing decision-making responses in a combination with points for the ability to measure and compare different DFA-analyses. The questions were organised into three main areas: product questions, assembly questions and remaining questions.In accordance to how other production units at Scania works with DFA, a new method, parallel to the checklist, was created to visualise easy assembled engine parts through the revision of an old. The old method contained articles with descriptions of good solutions regarding assembly. Using an internal Wikipedia system links were created between these articles to be able to reach all of them through three main categories: the DFA-technique is known, the product category is known or going through the subsystems in the engine’s design structure.A simple implementation plan was developed to recommend an implementation of the working method. Suggestions for further improvements when working using the method were given as well. An important improvement area was to find out where in the development process the DFA-method should be used. / Scania är ett av de ledande företagen inom den tunga fordonsindustrin. Scania tillverkar även motorer till sina lastbilar och bussar, samt till externa industri- och marinapplikationer. Då felmonterade motordelar leder till kvalitetsproblem är det viktigt att säkerställa att monteringen blir rätt. Dessutom ska den göras på en så kort tid som möjligt. För att göra detta används Design For Assembly (DFA) för att beskriva hur delar ska bli mer monteringsvänliga. Scanias produktionsenhet för motormontering har haft en arbetsmetod för DFA i form av en checklista som inte använts. Målet med detta projekt blev att ta reda på varför metoden inte används och ge förslag på förbättringar.Genom intervjuer och observationer undersöktes var problemen fanns med den existerande DFA-metoden och anledningar till att den inte använts. En litteraturstudie gjordes för att undersöka andra, etablerade, DFA-metoder. Dessutom undersöktes andra produktionsenheter på Scania för att jämföra deras arbetssätt med DFA.Tester gjordes för att förbättra DFA-metoden. Dessa tester tillämpades på verkliga typfall. Ett av problemen var att checklistan uppfattades som för komplex. Resultatet blev en reviderad checklista där antalet frågor gick från 45 i början till de slutgiltiga 24. Nya svarsnivåer infördes med beslutande svar i kombination med poäng för att kunna mäta och jämföra olika utförda DFA-analyser. Frågorna organiserades i tre huvudkategorier för att följa en mer logisk ordning: produktfrågor, monteringsfrågor och övriga frågor.I linje med hur andra produktionsenheter på Scania arbetar med DFA skapades en ny metod för att visualisera monteringsvänliga motorkomponenter genom att en gammal metod reviderades. Den gamla metoden innehöll artiklar med beskrivningar på bra lösningar ur monteringssynpunkt. Med hjälp av ett internt Wikipedia-system skapades länkar mellan dessa artiklar för att kunna nå dem ur tre olika huvudspår: DFA-tekniken är känd, produktkategorin är känd samt med utgångspunkt från delsystem i motorns konstruktionsstruktur.En enklare införandeplan togs fram för att ge en rekommendation på införande av arbetsmetoden. Dessutom gavs förslag på vidare förbättringar genom arbete med denna. Ett viktigt förbättringsområde blev på vilken plats i utvecklingsprocessen metoden ska användas

In designing products, Design-for-Assembly (DFA) has been successfully used for several decades to reduce lead times, processing times, and equipment overhead. Though the DFA approach results in products which are easy and efficient to assemble, such products may be difficult to disassemble and/or may adversely affect the environment. These environmental concerns resulted in the Design-for-Disassembly (DFD) approach, which stresses ease-of-disassembly and environmental compatibility. However, when applied independently of DFA, DFD underestimates the importance of assembly, and consequently can result in increased assembly time and cost. Design-for-Assembly may thus have negative repercussions on disassembly, and vice-versa. Consequently, in order to minimize assembly/disassembly time and cost and maximize component reusability, designers must implement DFA and DFD simultaneously when designing products. In this research, such an approach is developed. The approach, called Concurrent Assembly/Disassembly-Based Design (CAD²), consists of simultaneously selecting joint types and joining processes for products, based upon both assembly and disassembly requirements. Two objectives are considered: the minimization of total assembly/disassembly time or cost. In addition, a ‘penalty score’ measure is developed to quantify the environmental impact (recyclability) associated with any solution. Total enumeration is used to solve these minimization problems. The CAD² approach is demonstrated and evaluated by comparing it with both DFA and DFD for a limited number of cases. The results indicate that the CAD² approach can give better solutions (total time and total cost) than either DFA or DFD. / Master of Science

Uppsatsen undersöker hur man med hjälp av teori, Co-Creation, emotionell design, hållbar design och design for disassembly kan skapa hållbara hörlurar ur en lagning och uppgraderingsperspektiv. Studien undersöker over-ear hörlurar med metoderna intervju, produktanalys, persona, moodboard, workshop, skiss och 3D modulering i samband med användare. Resultatet av studien visar på ett koncept med intuitiv lagning och uppgraderingsmöjligheter, resultatet är grundat ur ett emotionellt perspektiv från användarna. Kunskapsbidraget bidrar med kunskap om hur en emotionell koppling till produkter i kombination med Design for disassembly kan skapa en mer hållbar framtid genom att användaren konsumerar färre hela produkter. Uppsatsen avlutas med en diskussion som lyfter svårigheterna med individualiteten av emotionell design, stil, tycke och smak. / The essay examines with the help of theory, co-creation, emotional design, sustainable design, and design for disassembly how you can create sustainable headphones from a repair and upgrade perspective. The study investigates over-ear headphones using interviews, product analysis, persona, mood board, workshop, sketch, and 3D modulation in connection with users. The result of the study shows a concept with intuitive repair and upgrade possibilities, the result is based on an emotional perspective from the users. The study contributes to knowledge about how an emotional connection to products in combination with Design for disassembly and emotional design can create a more sustainable future. By the user consuming fewer products. The essay concludes with a discussion highlighting the difficulties with the individuality of emotional design, style, liking, and taste.

In product manufacture and assembly it is important to lower materials usage and assembly timewhile retaining a safety margin against structural failure. In this project the ceiling attachment of theAVPOS offloading arm is redesigned based on objectives identified by Löfs Specialmaskiner. Theoriginal ceiling attachment is analysed using finite element analysis to identify any structuralweaknesses to be addressed during redesign. Based on information gained during the FEA threeconcepts are generated and rated based on their estimated assembly times, material usage, partscount and the cutting length for machining.One concept is selected for further topology optimisation and iterative FEA, where material isremoved from the selected concept design while maintaining safety objectives. The optimised designdeveloped during this project is shown to have a lower number of parts, lower usage of material andassembly time while retaining an overall FOS value of 4.In addition to redesigning the ceiling attachment, alternative bearings are also investigated whichchanges the existing ball bearings to a self-aligning sliding bearing with self-lubricating properties,lowering the machining tolerances as well as lowering the needs for service.This project contributes to lowering material usage and ease of assembly in the product AVPOS thatis manufactured by Löfs Specialmaskiner. The redesigned ceiling attachment along with thesuggested bearings will likely simplify future manufacturing as well as lower any concerns for damageto people and property as a result of structural failure.

The industrial safety posters produced by Royal Society for the Prevention of Accidents (RoSPA) during WW2 are evidence of a politically progressive, socially engaged and mass-produced graphic communication in Britain. These characteristics allow the RoSPA posters to qualify, by Walter Benjamin’s criteria, as exemplars of Modernist cultural production in the age of mechanical reproduction. The emergence of these images, within the unlikely context of war, is evidence of the social change identified by George Orwell as a necessary condition of victory. Furthermore, the presence of this material, within an English context, counters the prevailing orthodoxy of an English resistance to Modernism. The thesis describes the administrative and technical determinants of the posters, as indicated by the structure of RoSPA, the personalities behind the campaign and the technical expertise of the printers; Loxley Brothers of Sheffield. Quaker and Nonconformist antecedents are revealed to define the values of both administration and printers. The thesis explores the RoSPA posters’ use of Surrealist techniques and iconography and also their appeal to a wider and international Left community. The address of the RoSPA posters to the neophyte industrial worker offers the opportunity, exemplified by the special case of women workers, to project an “imagined community” beyond the normal tribal and class distinctions of British society through “Social Vision.” The RoSPA posters make explicit a connection, within English Modernism, between community, technology, progress and dissent. A catalogue of posters is appended to the thesis. The RoSPA posters reaffirm the progressive, emancipatory and radical quality of the popular experience of the Home-Front in Britain during WW2. The social changes, precipitated by the circumstances of war, of which the RoSPA posters are a manifestation, alter the role of graphic designer in relationship to community through an embrace of technology. The concept of graphic authorship is, in consequence, irrevocably changed.

The purpose of this thesis is to examine the formation of identity through dress in virtual environments, and to establish connections between identity, fashion, and virtual reality by means of language and semiology. The notion of identity through fashion in virtual environments is examined, with fashion as a factor in identity formation through dress as analysed in structuralist terms. The virtual aspect is used both as a literal field, i.e. the medium of video games and social networks that involve virtual avatars, and as theoretical testing ground from which to derive new results on the nature of dress and many of the aspects of clothing and fashion. The practical outcome of this research, a video game based on dress and narrative, serves as an applied experiment of the three main themes in this thesis and the relations and interactions between them, as well as a testing tool with which to challenge in a practical way the theories and speculations formed in the thesis. My methodology is based on structuralism and post-structuralism in the fields of linguistics, psychology and anthropology, with particular application to the visual media and virtual reality. I am using a post-structuralist approach as it has been the most dominant discourse of replacing economic and social (power) relations with codes and the interplay between signifiers and signifieds. This, I find, is the most appropriate method for analysing both virtual systems and fashion, because, on an atomic level, they both depend on variables such as words and numbers. The code is therefore the common denominator of both disciplines. Furthermore, both disciplines use narrative for their proper function, video games for their back story and motivation of the player, and fashion for its advertising and promotion, as well as through archetypes and symbols. Fashion in this context works as a catalytic agent between post-structuralist codes in modern media as texts, and video games.

As the feature size of integrated circuits goes down to the nanometer scale, transient and permanent reliability issues are becoming a significant concern for circuit designers. Traditionally, the reliability issues were mostly handled at the device level as a device engineering problem. However, the increasing severity of reliability challenges and higher error rates due to transient upsets favor higher-level design for reliability (DFR). In this work, we develop several methods for DFR at the circuit level. A major source of transient errors is the single event upset (SEU). SEUs are caused by high-energy particles present in the cosmic rays or emitted by radioactive contaminants in the chip packaging materials. When these particles hit a N+/P+ depletion region of an MOS transistor, they may generate a temporary logic fault. Depending on where the MOS transistor is located and what state the circuit is at, an SEU may result in a circuit-level error. We analyze SEUs both in combinational logic and memories (SRAM). For combinational logic circuit, we propose FASER, a Fast Analysis tool of Soft ERror susceptibility for cell-based designs. The efficiency of FASER is achieved through its static and vector-less nature. In order to evaluate the impact of SEU on SRAM, a theory for estimating dynamic noise margins is developed analytically. The results allow predicting the transient error susceptibility of an SRAM cell using a closedform expression. Among the many permanent failure mechanisms that include time-dependent oxide breakdown (TDDB), electro-migration (EM), hot carrier effect (HCE), and negative bias temperature instability (NBTI), NBTI has recently become important. Therefore, the main focus of our work is NBTI. NBTI occurs when the gate of PMOS is negatively biased. The voltage stress across the gate generates interface traps, which degrade the threshold voltage of PMOS. The degraded PMOS may eventually fail to meet timing requirement and cause functional errors. NBTI becomes severe at elevated temperatures. In this dissertation, we propose a NBTI degradation model that takes into account the temperature variation on the chip and gives the accurate estimation of the degraded threshold voltage. In order to account for the degradation of devices, traditional design methods add guard-bands to ensure that the circuit will function properly during its lifetime. However, the worst-case based guard-bands lead to significant penalty in performance. In this dissertation, we propose an effective macromodel-based reliability tracking and management framework, based on a hybrid network of on-chip sensors, consisting of temperature sensors and ring oscillators. The model is concerned specifically with NBTIinduced transistor aging. The key feature of our work, in contrast to the traditional tracking techniques that rely solely on direct measurement of the increase of threshold voltage or circuit delay, is an explicit macromodel which maps operating temperature to circuit degradation (the increase of circuit delay). The macromodel allows for costeffective tracking of reliability using temperature sensors and is also essential for enabling the control loop of the reliability management system. The developed methods improve the over-conservatism of the device-level, worstcase reliability estimation techniques. As the severity of reliability challenges continue to grow with technology scaling, it will become more important for circuit designers/CAD tools to be equipped with the developed methods. / text

A significant change is taking place in manufacturing company strategies around the globe. With new monitoring and service methods, new opportunities of product use and service provision emerge. The manufacturing companies once focused on mere product manufacture, now have started to provide ‘systemic solutions’, i.e. products combined with service packages, which are often referred to as Product-Service Systems (PSS). Currently, there is not a well-established feedback mechanism between service and design. The aim of this research is to develop a methodology to capture, represent, and re-use service knowledge to support product design. For the accomplishment of this aim an extensive literature review of the related themes to the research area took place. It was found that the feedback from service to design is fundamental for the enhancement of product performance; however, the existing literature in this area is not adequate. The industrial investigation led to the realisation that there is not an established mechanism in place to show how service knowledge (SK) can be used by designers. An in- depth investigation took place with the collaboration of, in total, four UK manufacturing companies. The author studied both the conceptual and detailed design, focusing on the design requirements (DR) and the design/service features (DF/SF) respectively. The first step was the capture of SK and its representation using Protégé software. Following this, at the conceptual design stage, SK can be re-used through the DR-SK tool. The two main purposes of the tool are the knowledge retrieval by designers, and the identification of gaps in SK. At the detailed design stage, designers can access SK through the DF-SK tool, and the developed knowledge templates. The SKaD framework was created, as a result of the amalgamation among the SKaD methodology, the knowledge templates, and the tools developed to link SK and DR, SF, and DF. Conclusively, the framework was applied on case studies within the pump manufacturing and aerospace industries, and its purpose (to aid designers accessing and re-using SK) was validated by experts within the collaborating organisations. As a result of this research’s findings, the service personnel can capture SK in a structured manner, which can then be re- used by product designers at both the conceptual and detailed design stage.

<p>The unprecedented and relentless growth in the electronics industry is feeding the demand for integrated circuits (ICs) with increasing functionality and performance at minimum cost and power consumption. As predicted by Moore's law, ICs are being aggressively scaled to meet this demand. While the continuous scaling of process technology is reducing gate delays, the performance of ICs is being increasingly dominated by interconnect delays. In an effort to improve submicrometer interconnect performance, to increase packing density, and to reduce chip area and power consumption, the semiconductor industry is focusing on three-dimensional (3D) integration. However, volume production and commercial exploitation of 3D integration are not feasible yet due to significant technical hurdles.</p><p>At the present time, interposer-based 2.5D integration is emerging as a precursor to stacked 3D integration. All the dies and the interposer in a 2.5D IC must be adequately tested for product qualification. However, since the structure of 2.5D ICs is different from the traditional 2D ICs, new challenges have emerged: (1) pre-bond interposer testing, (2) lack of test access, (3) limited ability for at-speed testing, (4) high density I/O ports and interconnects, (5) reduced number of test pins, and (6) high power consumption. This research targets the above challenges and effective solutions have been developed to test both dies and the interposer.</p><p>The dissertation first introduces the basic concepts of 3D ICs and 2.5D ICs. Prior work on testing of 2.5D ICs is studied. An efficient method is presented to locate defects in a passive interposer before stacking. The proposed test architecture uses e-fuses that can be programmed to connect or disconnect functional paths inside the interposer. The concept of a die footprint is utilized for interconnect testing, and the overall assembly and test flow is described. Moreover, the concept of weighted critical area is defined and utilized to reduce test time. In order to fully determine the location of each e-fuse and the order of functional interconnects in a test path, we also present a test-path design algorithm. The proposed algorithm can generate all test paths for interconnect testing.</p><p>In order to test for opens, shorts, and interconnect delay defects in the interposer, a test architecture is proposed that is fully compatible with the IEEE 1149.1 standard and relies on an enhancement of the standard test access port (TAP) controller. To reduce test cost, a test-path design and scheduling technique is also presented that minimizes a composite cost function based on test time and the design-for-test (DfT) overhead in terms of additional through silicon vias (TSVs) and micro-bumps needed for test access. The locations of the dies on the interposer are taken into consideration in order to determine the order of dies in a test path.</p><p>To address the scenario of high density of I/O ports and interconnects, an efficient built-in self-test (BIST) technique is presented that targets the dies and the interposer interconnects. The proposed BIST architecture can be enabled by the standard TAP controller in the IEEE 1149.1 standard. The area overhead introduced by this BIST architecture is negligible; it includes two simple BIST controllers, a linear-feedback-shift-register (LFSR), a multiple-input-signature-register (MISR), and some extensions to the boundary-scan cells in the dies on the interposer. With these extensions, all boundary-scan cells can be used for self-configuration and self-diagnosis during interconnect testing. To reduce the overall test cost, a test scheduling and optimization technique under power constraints is described.</p><p>In order to accomplish testing with a small number test pins, the dissertation presents two efficient ExTest scheduling strategies that implements interconnect testing between tiles inside an system on chip (SoC) die on the interposer while satisfying the practical constraint that the number of required test pins cannot exceed the number of available pins at the chip level. The tiles in the SoC are divided into groups based on the manner in which they are interconnected. In order to minimize the test time, two optimization solutions are introduced. The first solution minimizes the number of input test pins, and the second solution minimizes the number output test pins. In addition, two subgroup configuration methods are further proposed to generate subgroups inside each test group.</p><p>Finally, the dissertation presents a programmable method for shift-clock stagger assignment to reduce power supply noise during SoC die testing in 2.5D ICs. An SoC die in the 2.5D IC is typically composed of several blocks and two neighboring blocks that share the same power rails should not be toggled at the same time during shift. Therefore, the proposed programmable method does not assign the same stagger value to neighboring blocks. The positions of all blocks are first analyzed and the shared boundary length between blocks is then calculated. Based on the position relationships between the blocks, a mathematical model is presented to derive optimal result for small-to-medium sized problems. For larger designs, a heuristic algorithm is proposed and evaluated.</p><p>In summary, the dissertation targets important design and optimization problems related to testing of interposer-based 2.5D ICs. The proposed research has led to theoretical insights, experiment results, and a set of test and design-for-test methods to make testing effective and feasible from a cost perspective.</p> / Dissertation