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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Measurement and Analysis of the EMI of the Differential Pairs on High-Speed PCB

Li, Pei-Lung 08 July 2003 (has links)
Differential pairs may gradually replace single trace as the media transmitting high-speed signal on high-speed digital circuit. This dissertation investigates the impact on electromagnetic radiation from high-speed circuit board by the distance between differential traces and edge effect .At the same time, we use the result of measurement and simulation to make sure the measurement method correct .The result shows that,the shorter the distance is,the lower the EMI of differential pairs have .The edge effect will has the ability of destroying the suppression of EMI. Based on the consideration of measuring correctly, we use a solid kind of measurement method to search some non-ideal effects before studying EMI from differential pairs .These effect may exist on real measurement or ideal simulation. We hope to understand the environment of measurement as clearly as possible. In addition, we address one simple and fast method to investigate radiation mechanism that resulted from edge effect of differential pairs.By this method to calculate radiation, we will understand more and more the radiation mechanism.
2

A novel design to reduce the common mode noise for a pair of differential transmission-line bend

Hsu, Chia-Hsang 31 July 2012 (has links)
In recent year, the single-end transmission line is instead by differential transmission line . Differential signaling has been generally used in the high speed digital interconnection on the PCBs. The advantages of the differential signal with a low noise and high common-mode noise suppression, but the differential mode transmission signal is a very high quality requirements of circuit, the two line should have same length and symmetry, but in the practical package the circuit is not this case, In the limit space ,the differential signal should through the bend, it would lead to the phase skew and produce the differential to common mode conversion noise on the signal integrity and electromagnetic interference(EMI) problem. In this paper a new type of bend is proposed that reduces differential -to-common mode conversion noise for high speed digital circuit. This novel structure can reduce the mode conversion over 20dB at DC to 10GHz, and the differential insertion loss remains low. Also time domain the TDT common mode noise from 0.09V to 0.008V as compared with the bended differential transmission line using the edge couple bend. Moreover, the measurement on proposed structure show a close match with the full-wave simulation result. However, this structure does not have a reference plane, the return path is not complete, the current is easy to radiate out, so I design a guard trace to reduce the radiation in this structure.
3

Realizace jednoduchých aktivních prvků s komerčně dostupnými BJT/MOS poli / Realization of simple active elements employing commercially available BJT/MOS arrays

Vyčítal, Jaroslav January 2016 (has links)
The subject of the work is an introduction to the functions of the current mirrors and differential pairs. Consequently, understanding and simulated simple circuits composed of these circuits. The simulation results are in Chapter 5, which are also included diagrams of simulated circuits..
4

Realizace jednoduchých aktivních prvků s komerčně dostupnými BJT/MOS poli / Realization of simple active elements employing commercially available BJT/MOS arrays

Vyčítal, Jaroslav January 2016 (has links)
The subject of the work is an introduction to the functions of the current mirrors and differential pairs. Consequently, understanding and simulated simple circuits composed of these circuits. The simulation results are in Chapter 5, which are also included diagrams of simulated circuits..
5

AN ORGANIC NEURAL CIRCUIT: TOWARDS FLEXIBLE AND BIOCOMPATIBLE ORGANIC NEUROMORPHIC PROCESSING

Mohammad Javad Mirshojaeian Hosseini (16700631) 31 July 2023 (has links)
<p>Neuromorphic computing endeavors to develop computational systems capable of emulating the brain’s capacity to execute intricate tasks concurrently and with remarkable energy efficiency. By utilizing new bioinspired computing architectures, these systems have the potential to revolutionize high-performance computing and enable local, low-energy computing for sensors and robots. Organic and soft materials are particularly attractive for neuromorphic computing as they offer biocompatibility, low-energy switching, and excellent tunability at a relatively low cost. Additionally, organic materials provide physical flexibility, large-area fabrication, and printability.</p><p>This doctoral dissertation showcases the research conducted in fabricating a comprehensive spiking organic neuron, which serves as the fundamental constituent of a circuit system for neuromorphic computing. The major contribution of this dissertation is the development of the organic, flexible neuron composed of spiking synapses and somas utilizing ultra-low voltage organic field-effect transistors (OFETs) for information processing. The synaptic and somatic circuits are implemented using physically flexible and biocompatible organic electronics necessary to realize the Polymer Neuromorphic Circuitry. An Axon-Hillock (AH) somatic circuit was fabricated and analyzed, followed by the adaptation of a log-domain integrator (LDI) synaptic circuit and the fabrication and analysis of a differential-pair integrator (DPI). Finally, a spiking organic neuron was formed by combining two LDI synaptic circuits and one AH synaptic circuit, and its characteristics were thoroughly examined. This is the first demonstration of the fabrication of an entire neuron using solid-state organic materials over a flexible substrate with integrated complementary OFETs and capacitors.</p>
6

Design and Analysis of a Discrete, PCB-Level Low-Power, Microwave Cross-Coupled Differential Lc Voltage-Controlled Oscillator

Virdee, Pavin Singh 01 September 2022 (has links) (PDF)
Radio Frequency (RF) and Microwave devices are typically implemented in Integrated Circuit (IC) form to minimize parasitics, increase precision and tolerances, and minimize size. Although IC fabrication for students and independent engineers is cost-prohibitive, an abundance of low-cost, easily accessible printed circuit board (PCB) and electronic component manufacturers allows affordable PCB fabrication. While nearly all microwave voltage-controlled oscillator (VCO) designs are IC-based, this study presents a discrete PCB-level cross-coupled, differential LC VCO to demonstrate this more affordable and accessible approach. This thesis presents a 65 mW, discrete component VCO PCB with industry-comparable RF performance. A phase noise of -103.7 dBc/Hz is simulated at a 100 kHz offset from a 4.05 GHz carrier. This VCO achieves a 532 MHz (13.25%) tuning bandwidth. A figure of merit, FOMP, [1] value of -177.7 dB (includes phase noise and power consumption) is calculated at 4.05 GHz. This surpasses the performance of an industry standard VCO (HMC430LPx, Analog Devices), -176.5 dB, and four other commercially available VCOs. Furthermore, this study presents novel discrete design implementations to minimize both power consumption and capacitive loading effects, while optimizing phase noise. Finally, this project serves as a reference for analyzing and implementing low-level, complex RF and Microwave circuits on a PCB accessible to all students and independent engineers.
7

Design of Comparator with Offset Calibration for High-Speed ADCs

Baby, Basil January 2024 (has links)
High-speed ADC is essential in radio network systems for communications. However, accuracy is an important feature for them, their precision can be affected by minor discrepancies, e.g., offset voltage of comparators, which is a primary contributor to these discrepancies. This master thesis focuses on evaluating offset calibration techniques used for high-speed comparators. To start, a literature review is performed to learn about high-speed comparators and various offset calibration techniques, which helps to understand existing problems and new ideas in offset calibration. As the next step, evaluation and implementation of the reviewed literatures are done, which involves the implementation of schematics at the transistor level, where the calibration procedure's controller is implemented in Verilog-A. Finally, an extensive set of simulations, i.e., done by the electronic design automation tool, is conducted on the designed offset calibration techniques and how they affect the general operation of high-speed ADCs.  Among the reviewed calibration techniques, two discrete adjustment methods (trans-conductance and capacitive DAC) and three voltage-controlled methods (unbalanced clocks, second differential pair, and body bias) are implemented and evaluated. The discrete methods use digital circuits, which have large variations in step sizes due to mismatches, leading to higher offsets after calibration. Monte Carlo simulations are done to show this drawback clearly better. However, using thermometer code instead of the binary-weighted would help by making the step sizes more consistent, which yields better-offset calibration results. On the other hand, the voltage-controlled methods rely on external voltages, which require more design work because of the Digital-to-Analog Converter (DAC) units. During a calibration test with various input offsets, the 'Body Bias' technique exhibited the highest precision by achieving the smallest remaining offset.

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