This work investigates the fundamental device limits related to operational voltage constraints and linearity in state-of-the-art silicon-germanium (SiGe) heterojunction bipolar transistors (HBTs) in order to support the design of robust next-generation high-frequency transceivers. This objective requires a broad understanding of how much "usable" voltage exists compared to conventionally defined breakdown voltage specifications, so the role of avalanche-induced current-crowding (or "pinch-in") effects on transistor performance and reliability are carefully studied. Also, the effects of intermodulation distortion are examined at the transistor-level for new and better understanding of the limits and trade-offs associated with achieving enhanced dynamic range and linearity performance on existing and future SiGe HBT technology platforms. Based on these investigations, circuits designed for superior dynamic range performance are presented.

Cette thèse est la R&D de l’électronique de front-end destinée à la camera de deuxième génération du télescope de grande taille LST de projet CTA, étant basée sur les détecteurs de type SiPM. Cette étude rassemble des équipes du LAPP, de l’université de Padoue, de l’INFN et du MPI de Munich. La première partie de cette thèse porte sur les tests de caractérisations d’une matrice de 16 SiPMs fabriquée par Hamamatsu. Les résultats de ces tests ont souligné les avantages qui pourraient être apportés par l’utilisation de tels détecteurs. Un cahier des charges pour l’électronique a été défini à l’issue de ces tests. Notamment, une nécessité de corriger la dispersion en gain entre les 16 pixels qui a été trouvée d’environ 10%. La seconde partie est la conception d’un circuit intégré (ASIC) qui pourrait lire les signaux des pixels -SiPM avec la moindre perturbation possible de fonctionnement du détecteur. Cet ASIC inclut des fonctions de contrôle (slow control) qui permettent l’ajustement de gain des pixels, l’amélioration de l’uniformité de gain et la possibilité de supprimer les canaux bruyants ou encore même le contournement du processus de contrôle de gain. Ces fonctionnalités peuvent unifier le gain de 16 canaux. Les sorties des 16 canaux seront sommées pour en faire deux signaux seulement à la sortie de l’ASIC. Ces deux signaux, un sur le haut gain et l’autre sur le bas gain seront fournis au système d’acquisition qui suivra l’ASIC. Une fonction de déclenchement génèrera un signal de trigger qui sera ainsi transmis au système d’acquisition. Cet ASIC a été réalisée avec la technologie AMS 0.35um BiCMOS. Les simulations ont montré une gamme dynamique linéairement couverte jusqu’à 2000 photoélectrons et la possibilité de mesurer le photoélectron unique grâce au bon rapport signal sur bruit électronique. Les tests au laboratoire confirment une grande partie de ces résultats. / This thesis is the R&D on front-end electronics for a second generation camera based on the SiPM detectors for the Large Size Telescope (LST) of the CTA project. It is a part of the SiPM collaboration involving the LAPP, the University of Padua, the INFN and the MPI in Munich. The first part of the thesis is the characterization of an array of 16 SiPMs from Hamamatsu. The study proves the advantages of using such detectors in the LST. It defines the specifications of the readout electronics that are the aim of this work. Especially that it should ameliorate the gain dispersion of the 16 pixels that was found of about 10%. The second part is the design of the readout ASIC. The scheme tends to measure the SiPMs’ signals with minimum disturbance of the detector. It integrates slow control facilities that adjust the detector’s gain, minimize the dispersion in gain and provide the possibility of deleting noisy channels or even completely jumping over the control process. These facilities could perfectly get rid of the gain dispersion. Outputs of the 16 pixels will be summed on both high gain and low gain so that only two signals are delivered to the acquisition system that follows. A trigger function will also generate a trigger signal to the acquisition system. The choice was made to realize this ASIC according to the rules of the AMS 0.35um BiCMOS technology. Simulation shows a linearly-covered dynamic range up to 2000 photoelectrons with good signal to noise ratio that allows the measurement of the single photoelectron. Laboratory tests confirm a great part of these results.

Les capteurs d’images CMOS sont de plus en plus utilisés dans le domaine industriel : la surveillance, la défense, le médical, etc. Dans ces domaines, les capteurs d?images CMOS sont exposés potentiellement à de grandes variations de température. Les capteurs d?images CMOS, comme tous les circuits analogiques, sont très sensibles aux variations de température, ce qui limite leurs applications. Jusquà présent, aucune solution intégrée pour contrer ce problème n’a été proposée. Afin de remédier à ce défaut, nous étudions, dans cette thèse, les effets de la température sur les deux types d?imageurs les plus connus. Plusieurs structures de compensation sont proposées. Elles reprennent globalement les trois méthodes existantes et jamais appliquées aux capteurs d’images. La première méthode utilise une entrée au niveau du pixel qui sera modulée en fonction de l’évolution de la température. La deuxième méthode utilise la technique ZTC (Zero Temperature Coefficient). La troisième méthode est inspirée de la méthode de la tension de référence bandgap. Dans tous les cas, nous réduisons de manière très intéressante l’effet de la température et nous obtenons une bonne stabilité en température de -30 à 125°C. Toutes les solutions proposées préservent le fonctionnement initial de l’imageur. Elles n’impactent également pas ou peu la surface du pixel / CMOS image sensors find widespread use in various industrial applications including military, surveillance, medical, etc. In these applications, CMOS image sensors are often exposed to large temperature variations. As analog circuits, these CMOS image sensors are very sensitive to temperature variations, which limit their applications. Until now, no integrated solution for this problem has been proposed. To solve this problem, we study, in this thesis, the temperature effects on the two most known types of CMOS image sensors. Several compensation structures are proposed. They generally return to the three existing methods and never applied to image sensors. The first method uses an entrance at the pixel level to be adjusted according to changes in temperature. The second method uses the ZTC (Zero Temperature Coefficient) technique. The third method is based on the method of the bandgap voltage reference. In all cases, we reduce a very interesting way the temperature effect and we get a good temperature stability of the sensor from -30 to 125°C. All the solutions preserve the initial operation of the imager. They also affect a little or not the surface of the pixel.

Les technologies CMOS représentent aujourd’hui plus de 90% du marché des capteurs d’images : elles permettent d’intégrer des systèmes intelligents dans une seule puce (SoC = System-On-Chip) et ouvrent la voie à l’intégration d’algorithmes de plus en plus complexes dans les dernières générations de capteurs. Des techniques telles que la reconstruction grande dynamique nécessitent d’acquérir plusieurs images avec un même capteur et de les recombiner. Ces nouvelles contraintes nécessitent d’augmenter drastiquement le débit d’images pour des capteurs de tailles conséquentes (Jusqu'à 30 Mpixels), ainsi que d’augmenter la résolution du convertisseur analogique numérique (jusqu’à 14 bits). Cela crée une demande forte en techniques de conversion analogique-numérique. Ces techniques doivent obéir en même temps aux contraintes de performance notamment la vitesse, la résolution, le faible bruit, la faible consommation et l'intégrabilité mais aussi aux contraintes de qualité d'image impactées directement par la chaine de conversion analogique-numérique en plus de la technologie du pixel. D'ici découle une double problématique pour le sujet:- Etudier et déterminer les limites atteignables en termes de performance sur les différents axes précités.- Gestion du fonctionnement massivement parallèle lié à la structure inhérente des capteurs d'image en vue d'avoir une qualité d'image irréprochable. / CMOS technologies represent nowadays more than 90% of image sensors market given their features namely the possibility of integrating entire intelligent systems on the same chip (SoC = System-On-Chip). Thereby, allowing the implementation of more and more complex algorithms in the new generations of image sensors.New techniques have emerged like high dynamic range reconstruction which requires the acquisition of several images to build up one, thus multiplying the frame rate.These new constraints require a drastic increase of image rate for sensors ofconsiderable size (Up to 30 Mpix and more). At the same time, the ADCresolution has to be increased to be able to extract more details (until 14 bits).With all these demanding specifications, analog-to-digital conversion capabilities have to be boosted as far as possible.These capabilities can be distinguished into two main research axes representing the pillars of the PhD work, namely:+ The study of the reachable limits in terms of performance: Speed, Resolution,Low Noise, Low power consumption and small design pitch.+ The management of the highly parallel operation linked to the structure of animage sensor. Solutions have to be found so as to avoid image artefacts andpreserve the image quality.

A presente dissertação trata da implementação e otimização de um sistema de detecção condutométrica sem contato capacitivamente acoplada (C4D) para Eletroforese Capilar (CE). O sistema é caracterizado pela compactação do sistema de detecção, versatilidade e flexibilidade de instalação em diferentes equipamentos comerciais de eletroforese capilar e home made. Desde a década de 80, a eletroforese capilar vem se consolidando como uma das técnicas de separação mais relevantes. Normalmente, os instrumentos comerciais são disponibilizados com detectores ópticos e detectores eletroquímicos. A C4D é utilizada em eletroforese capilar posicionando-se dois eletrodos tubulares envoltos ao capilar. A aplicação de sinais de alta frequência entre os eletrodos permite monitorar variações de condutividade da solução dentro do capilar. Assim, a resposta do detector depende de diversos fatores como mobilidade do analito, do co-íon do eletrólito, da frequência e amplitude do sinal aplicado entre os eletrodos e da geometria dos mesmos. A ausência de componentes móveis torna o presente detector compacto (6,5 cm3) e robusto. O presente C4D é constituído de um oscilador local funcionando a 1,1 MHz, um circuito capaz de converter corrente em tensão, retificar e filtrar os sinais analógcos, além de apresentar um conversor de sinais analógicos em digitais (Conversor A/D) de alta resolução (21 bits efetivos). Outra vantagem é a possibilidade de determinar o diâmetro interno do capilar através da leitura do conversor A/D quando se faz passar um fluxo de ar e, posteriormente água através do capilar. A diferença de leitura de conversor A/D pode ser convertida em diâmetro interno mediante uma curva de calibração. Em uma aplicação típica, os limites de detecção baseado no critério 3s (sem filtragem inicial) foi de 0,6, 0,4, 0,3, 0,5, 0,6 e 0,8 µmol L-1 para K+, Ba2+, Ca2+, Na+, Mg2+ e Li+, respectivamente, é comparável a outras implementações de alta qualidade de um detector condutométrico sem contato capacitivamente acoplado. / This dissertation deals with the implementation and optimization of a Capacitively Coupled Contactless Conductivity Detector (C4D) applied to capillary electrophoresis (CE). The system is characterized by compaction of the detection system, installation flexibility and versatility in different commercial capillary electrophoresis equipment and home-made. Since the 80s, capillary electrophoresis has been consolidated as one of the most important separation techniques. Typically, commercial instruments are available to optical detectors and electrochemical detectors. The C4D is used in capillary electrophoresis positioning two electrodes encased in tubular capillary. The application of high frequency signals between the electrodes allows monitoring changes in conductivity of the solution within the capillary. Thus, the detector response depends on several factors such as mobility of the analyte, the co-ion electrolyte, the frequency and amplitude of the signal applied between the electrodes and the geometry of the same. The absence of moving parts makes this compact detector (6.5 cm3) and robust. This C4D is composed of a local oscillator, working at 1.1 MHz, a circuit capable of converting current into voltage, rectify and filter the analogs signals, besides presenting a high-resolution analog-to-digital converter (ADC) (21 bits effective). Another advantage is the possibility of determining the internal diameter of the capillary by reading the ADC when it is passed a stream of air and then water through the capillary. A readings different ADC can be converted into inner diameter through a curve a calibration curve. In a typical application, the detection limits based on the 3s criterion (without baseline filtering) was 0.6, 0.4, 0.3, 0.5, 0.6 and 0.8 µmol L-1 for K+, Ba2 +, Ca2 +, Na+, Mg2+ and Li+, respectively, is comparable to other high-quality implementations of a capacitively coupled contactless conductivity detector.

Os circuladores tradicionais são amplamente utilizados em telecomunicações e defesa militar para o simultâneo envio e recepção de sinais por um único meio. Esses circuitos passivos, fabricados a partir de materiais ferromagnéticos, possuem a desvantagem do aumento de dimensões, peso e custos de fabricação com a diminuição da frequência de operação definida no projeto destes dispositivos, inviabilizando sua aplicação em frequências abaixo de 500 MHz. O circulador ativo surgiu como uma alternativa aos tradicionais, tendo aplicações em frequências desde o nível DC até a ordem de dezenas de gigahertz. As suas maiores aplicações ocorrem quando são necessários dispositivos compactos, de baixo custo e de baixa potência. Os primeiros circuitos propostos possuíam uma grande limitação em termos de frequência de operação e de potência entregue à carga. Entretanto, com os avanços tecnológicos na eletrônica, tais problemas podem ser amenizados atualmente. Neste trabalho é apresentado o desenvolvimento de um circuito circulador ativo para a utilização em instrumentação eletrônica, em particular para a operação em frequências na ordem das utilizadas em equipamentos de ultrassom Doppler de ondas contínuas, na faixa de 2 MHz a 10 MHz. As possíveis vantagens da implementação de circuladores em sistemas de ultrassom estão relacionadas ao incremento da relação sinal-ruído, aumento da área de recepção do transdutor, simplificação da construção do transdutor, simplificação do circuito de demodulação/ processamento, e maior isolação entre os circuitos de transmissão e recepção de sinais. Na fase inicial, o circulador ativo proposto é modelado por equacionamento, utilizando-se tanto o modelo ideal dos amplificadores operacionais como o seu modelo de resposta em frequência. Simulações computacionais foram executadas para confirmar a validade do equacionamento. Um circuito montado em placa de prototipagem rápida foi apresentado, e testes de prova de conceito em baixas frequências foram realizados, mostrando uma grande semelhança entre o teórico, o simulado e o experimental. A segunda parte contou com o projeto do circuito circulador para a operação em maiores frequências. O circuito proposto é composto por três amplificadores operacionais de realimentação por corrente e vários componentes passivos. Uma análise de sensibilidade utilizando os métodos de Monte-Carlo e análise do pior caso foi aplicada, resultando em um perfil de comportamento frente às variações dos componentes do circuito e às variações da impedância de carga. Uma placa de circuito impressa foi projetada, utilizando-se de boas práticas de leiaute para a operação em altas frequências. Neste circuito montado, foram realizados os seguintes testes e medições: comportamento no domínio do tempo, faixa dinâmica, nível de isolação em relação à amplitude do sinal, largura de banda, levantamento dos parâmetros de espalhamento, e envio e recepção de sinais por transdutor de ultrassom Doppler de ondas contínuas. Os resultados dos testes de desempenho foram satisfatórios, apresentando uma banda de transmissão de sinais para frequências de 100 MHz, isolação entre portas não consecutivas de 39 dB na frequência de interesse para ultrassom Doppler e isolação maior que 20 dB para frequências de até 35 MHz. A faixa dinâmica excedeu a tensão de 5 Vpp, e o circuito teve bom comportamento no envio e na recepção simultânea de sinais pelo transdutor de ultrassom. / Traditional circulators are widely used in both telecommunications and military defense for sending and receiving signals simultaneously through a single medium. These passive circuits which are manufactured from ferromagnetic materials, have the disadvantages of having suffered an increase in dimensions, weight, and manufacturing costs along with the decrease in the operation frequency established in the designs of such devices, thus preventing their useful employment in frequencies below 500 MHz. The active circulator emerged as an alternative to the traditional ones, and has applications on frequencies ranging from a DC level to levels involving dozens of gigahertz. It is applicable when compact devices are made necessary, at a low cost, and for low frequencies. The first circuits to be introduced had a major limitation in terms of operating frequency and power delivered to the load. However, due to technological advances in electronics, problems such as the aforementioned can now be minimized. This research work presents the development of an active circulator circuit to be used in electronic instrumentation, particularly for operation at frequencies such as those used in continuous wave Doppler ultrasound equipment, ranging from 2 MHz to 10 MHz. The advantages made possible by implementing ultrasound systems with circulators are related to an increase in the signal-to-noise ratio, an increase in the transducers reception area, a simplified construction of the transducer, simplification of the demodulation/processing circuit, and a greater isolation between the transmission circuits and signal reception. In the initial phase, the proposed active circulator was modeled by means of an equating method, using both the ideal model of operational amplifiers and the model of frequency response. Computer simulations were carried out in order to confirm the validity of the equating method. A circuit mounted upon a breadboard was introduced and proof of concept assessments were performed at low frequencies, showing a great similarity among the theoretical, simulated and experimented data. The second phase is when the circulator circuits design was developed in order make its operation at higher frequencies possible. The proposed circuit is comprised of three currentfeedback operational amplifiers and several passive components. A sensitivity analysis was carried out using Monte-Carlo methods and worst-case analyses, resulting in a certain behavioral profile influenced by variations in circuit components and variations in load impedance. A printed circuit board was designed, employing good practice layout standards so that operation at high frequencies would be achieved. The following evaluations and measurements were performed on the circuit that was assembled: time domain behavior, dynamic range, isolation level relative to signal amplitude, bandwidth, survey of the scattering parameters, and transmission and reception of signals by a continuous wave Doppler ultrasound transducer. The results of the performance tests were satisfactory, presenting a 100 MHz signal transmission band, isolation between non-consecutive ports of 39 dB at the frequency of interest to the Doppler ultrasound, and an isolation greater than 20 dB for frequencies of up to 35 MHz. The dynamic range exceeded the 5Vpp and the circuit performed satisfactorily in the simultaneous transmission and reception of signals through the ultrasound\'s transducer.

Dans les réseaux de capteurs urbains, les nœuds émettent des signaux en utilisant plusieurs protocoles de communication qui coexistent. Ces protocoles étant en évolution permanente, une approche orientée radio logicielle semble être la meilleure manière d’intégrer tous les protocoles sur la passerelle collectant les données. Tous les signaux sont donc numérisés en une fois. La grande plage dynamique des signaux reçus est alors le principal problème : ceux-ci peuvent être reçus avec une puissance très variable selon les conditions de propagation. Dans le cas d’une réception simultanée, le Convertisseur Analogique-Numérique (CAN) doit être capable d’absorber une telle dynamique. Une première étude est menée afin d’établir les caractéristiques requises du CAN sur une passerelle d’un tel réseau de capteurs. La résolution minimale de 21 bits obtenue s’avérant trop importante pour être atteinte au vu de l’état de l’art actuel, deux approches différentes sont explorées pour réduire la plage dynamique des signaux avant la numérisation. La première approche s’appuie sur la technique du companding. Des lois de compression connues sont explorées afin d’étudier leur viabilité dans le cas de la numérisation de signaux multiples, et deux nouvelles implémentations sont proposées pour la plus performante d’entre elles. La deuxième technique proposée consiste en une nouvelle architecture de réception utilisant deux voies de réception. La première d’entre elles est dédiée au signal le plus fort sur la bande : celui-ci est démodulé et sa fréquence d’émission est mesurée. À partir de cette mesure, la seconde branche est reconfigurée de manière à atténuer ce signal fort, en réduisant ainsi la plage dynamique. Les autres signaux sont ensuite numérisés sur cette branche avec une résolution du CAN réduite. Cette deuxième approche semblant plus prometteuse, elle est testée en expérimentation. Sa viabilité est démontrée avec des scénarios de réception de signaux prédéfinis représentant les pires cas possibles. / In this thesis, a receiver architecture for a gateway in a urban sensors network was designed. To embed the multiple protocols coexisting in this environment, the best approach seems to use a reconfigurable architecture, following the scheme of the Software-Defined Radio (SDR). All the received signals should be digitized at once by the Analog-to-Digital Converter (ADC) in order to sustain the reconfigurability of the architecture: then all the signal processing will be able to be digitally performed. The main complication comes from the heterogeneity of the propagation conditions: from the urban environment and from the diversity of the covered applications, the signals can be received on the gateway with widely varying powers. Then the gateway must be able to deal with the high dynamic range of these signals. This constraint applies strongly on the ADC whose resolution usually depends on the reachable digitized frequency band. A first study is led to evaluate the required ADC resolution to cope with the dynamic range. For this the dynamic range of the signals is first evaluated, then the required resolution to digitize the signals is found theoretically and with simulations. For a 100~dB power ratio between strong and weak signals, we showed that the ADC resolution needed 21 bits which is far too high to be reached with existing ADCs. Two different approaches are explored to reduce analogically the signals' dynamic range. The first one uses the companding technique, this technique being commonly used in analog dynamic range reduction in practice (\emph{e.g.} in audio signals acquisition), its relevance in multiple signal digitization is studied. Three existing compression laws are explored and two implementations are proposed for the most efficient of them. The feasibility of these implementations is also discussed. In the second approach we propose to use a two-antennas receiver architecture to decrease the dynamic range. In this architecture two digitization paths are employed: the first one digitizes only the strongest signal on the band. Using the information we get on this signal we reconfigure the second branch of the architecture in order to attenuate the strong signal. The dynamic range being reduced, the signals can be digitized with an ADC with a lower resolution. We show in this work that the ADC resolution can de decreased from 21 to 16 bits using this receiver architecture. Finally, the promising two-antennas architecture is tested in experimentation to demonstrate its efficiency with dynamic signals (\emph{i.e.} with appearing and disappearing signals).

Fyzikálně přijatelné osvětlení v reálném čase je často dosaženo použitím aproximací. Současné metody často aproximují globální osvětlení v prostoru obrazu s využitím schopností moderních grafických karet. Dva techniky z této kategorie, screen-space ambient occlusion a screen-space directional occlusion jsou popsány detailněji v této práci. Screen-space directional occlusion je zobecněná verze screen-space ambient occlusion s podporou jednoho difúzního odrazu a závislostí na směrové informaci světla. Hlavním cílem projektu bylo experimentování s těmito metodami. Pro uniformní distribuci náhodných vzorek pro obě metody byla použita Halton sekvence. Pro potlačení šumu je použita bilaterální filtrace, která bere do úvahy geometrické vlastnosti scény. Metody jsou dál zrychleny použitím nižších rozlišení pro výpočet. Rekonstrukce výsledků do původní velikosti pro vytvoření konečného obrazu je realizována pomoci joint bilateral upsamplingu. Kromě metod globálního osvětlení byly v práci použity aj metody pro mapování stínů a HDR osvětlení.

The target of this thesis is sumarize the theory of metods used for composition image sequence into single high dynamic range image. Selected methods and algorithms are described in theoretical part and implemented in practical part of this thesis. It was used C++ language with using OpenCV library.

Cílem této práce je demonstrovat možnost renderování srsti přímo do existujících obrazů bez toho, aby bylo po uživateli požadováno překreslení všech pixelů nebo dodání kompletní 3D geometrie a osvětlení. Srst je přidána na povrch objektů pomocí extrakce jejich přibližného tvaru a světelných informací z obrazu a takto získaný objekt je poté přerenderován. Tento přístup je nový v tom, že vysokoúrovňové úpravy obrazu (jako např. přidání srsti), mohou úspěšně vést k vizuálně korektním výsledkům a to i přes omezení nepřesnou geometrií a světelnými podmínkami. Relativně velká množina technik použitých v této práci zahrnuje obrazy s velkým dynamickým rozsahem, metody extrakce 3D tvaru z obrazu, výsledky výzkumu vnímání tvaru a osvětlení a fotorealistické renderování. Hlavním cílem práce je potvrdit koncept popsaný výše. Hlavním implementačním jazykem bylo C++ s použitím knihoven wxWidgets, OpenGL a libTIFF. Renderování bylo realizováno v software 3Delight kompatibilním se standardem Renderman, za pomoci množiny shaderů implementovaných v nativním jazyce Rendermanu.