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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
191

Performance Analysis and System Modelling of Ethernet-based In­ Vehicle Communication / Analys av prestanda och modellering av Ethernet-baserad fordonskommunikation

Qiu, Jiaheng January 2017 (has links)
While vehicle technology is rapidly advanced, advanced driver assistance system (ADAS) stays in focus. However, all of these growing automotive applications are driving up the bandwidth requirements, therefore vehicle networks require higher bandwidth and more deterministic real-time guarantees than before.Switched Ethernet is widely used for all kinds of applications, and it gradually moves into the automotive domain. The new specification of the IEEE 802.1 Audio/Video Bridging (AVB) standard provides the QoS features needed for ADAS data streaming.In this work, we study and analyse Ethernet-based invehicle communication of both legacy Ethernet and AVB Ethernet through a simulation approach to verify the automotive network performance. Furthermore, a system engineering approach is used to achieve a more model-based design of simulation and developing prototypes in the future. / Samtidigt som fordonsteknologin ökar snabbt, är det system för avancerad förarassistans (advanced driver assistance systems, ADAS) som står i fokus. Dessa ökande fordonsapplikationer driver på bandbreddskraven, och därför kräver fordonsnätverken högre bandbredd och mer determinisktiska realtidskrav än tidigare.Switchat nätverk (Switched Ethernet) används i alla möjliga applikationer och flyttar gradvis in i fordonsdomänen. Den nya specificationen av standarden IEEE 802.1 Audio/Video Bridging (AVB) tillhandahåller QoS (Quality of Service) funktioner för ADAS dataöverföring.I den här avhandlingen undersöks och analyseras Ethernetbaserad fordonskommunikation av både vanligt nätverk (Ethernet) och AVB Ethernet genom simulering för att verifiera nätverksprestandan för fordonsnätverket i fråga. En systemingenjörsinriktning har använts för att skapa en mer modell-baserad design av simuleringen, som även kan användas för att utveckla prototyper i framtiden.
192

Energieeffiziente integrierte Schaltungen zur Basisbandsignalverarbeitung und Zeitsynchronisation für drahtgebundene Ethernet-Echtzeitkommunikation

Buhr, Simon 28 January 2022 (has links)
In dieser Arbeit wird eine genaue Zeitsynchronisation über kupferbasierte Ethernetsysteme sowie der Entwurf von Schaltungen für die Bitübertragungsschicht (Physical Layer, PHY) in solchen Ethernetsystemen untersucht. Dabei wird der Entwurf eines integrierten Schaltkreises für den Standard 100Base-TX vorgestellt. Dieser PHY-Chip ermöglicht die Datenübertragung mit einer Datenrate von 100 MBit/s über verdrillte Kupferkabel und stellt darüber hinaus eine genaue Uhr bereit, welche zwischen den verbundenen Netzknoten synchronisiert werden kann. Dieser Schaltkreis ist insbesondere für Industrieanwendungen gedacht, bei denen verschiedene Prozesse zeitlich synchronisiert werden müssen. Prinzipiell ist der PHY-Chip jedoch universell für verschiedenste Anwendungen zur Zeitsynchronisation einsetzbar. Um die Genauigkeit der Zeitsynchronisation gegenüber herkömmlichen Ansätzen zu steigern, werden verschiedene Techniken untersucht und in dem entworfenen Schaltkreis eingesetzt. So wird die Phase der Taktsignale in feinen Schritten eingestellt und auch gemessen, sodass die Auflösung der Zeitstempel erheblich verbessert wird. Zu diesem Zweck wird ein sogenannter Digital-To-Phase Converter (DPC) eingesetzt, der 256 verschiedene Taktphasen des 125 MHz Systemtaktes bereitstellt. Für die eigentliche Zeitsynchronisation wird ein Proportional-Integral-Regler verwendet. Basierend auf einer theoretischen Rauschanalyse wird eine Methode vorgestellt, mit der die Parameter dieses Reglers so dimensioniert werden können, dass der Zeitfehler im eingeschwungenen Zustand möglichst klein wird. Darüber hinaus werden weitere Störeinflüsse analysiert und es werden geeignete Maßnahmen entwickelt, um diese zu kompensieren. So wird eine adaptive Kompensation eines Eintonstörers sowie eine Kalibrierung zur automatischen Kompensation von Asymmetrien im Kabel vorgestellt. All diese Punkte helfen, eine hervorragende Genauigkeit der Zeitsynchronisation zu ermöglichen, was durch umfangreiche Messungen verifiziert wird. Insgesamt weist der gemessene Zeitfehler in einem Punkt-zu-Punkt-Szenario eine Standardabweichung von 64 ps und einen Mittelwert unterhalb von 100 ps auf. Dies stellt eine erhebliche Verbesserung gegenüber konventionellen Lösungen zur Zeitsynchronisation über kupferbasiertes Ethernet dar, mit denen Genauigkeiten im Nanosekundenbereich erreicht werden. Als zweites Ziel dieser Arbeit wird der PHY-Chip für eine möglichst niedrige Leistungsaufnahme optimiert. Um dies zu erreichen, werden insbesondere der Leitungstreiber im Sender und der Equalizer im Empfänger systematisch optimiert. So werden zwei verschiedene Topologien von Leitungstreibern untersucht und verglichen. Beide weisen eine Leistungsaufnahme von etwa 24 mW auf. Im Vergleich zum Stand der Technik sind dies die beiden niedrigsten Werte für Leitungstreiber für den Standard 100Base-TX. Der gesamte PHY-Chip, der in einer 180 nm Technologie implementiert wurde, weist durch die zahlreichen Optimierungen eine geringe Leistungsaufnahme von maximal 69 mW auf, was ebenfalls einen Rekordwert im Vergleich mit dem Stand der Technik darstellt (80 mW). Die einzelnen Schaltungen wurden sowohl simulativ als auch mit ausführlichen Messungen verifiziert. Für den gesamten Link wird eine Bitfehlerrate besser als 10⁻¹² bei verschiedenen Kabeln bis zu 120 m Länge erreicht.:Abbildungsverzeichnis Tabellenverzeichnis Abkürzungen Symbole 1 Einleitung 1.1 Zeit und Zeitsynchronisation 1.2 Ziele dieser Arbeit 1.3 Gliederung 2 Grundlagen 2.1 100Base-TX Ethernet-Standard 2.1.1 Schnittstelle zur MAC-Schicht 2.1.2 4B5B-Kodierung 2.1.3 Scrambler und Descrambler 2.1.4 MLT-3-Kodierung 2.1.5 Bitfehlerrate und Signal-Rausch-Verhältnis 2.2 Kanalmodellierung 2.2.1 Dämpfung 2.2.2 Baseline-Wander 2.3 Zeitsynchronisierung 2.3.1 Bestimmung der Zeitdifferenz 2.3.2 Vergrößerung der Synchronisationsgenauigkeit 3 Schaltungsentwurf und Charakterisierung 3.1 Energieeffiziente Leitungstreiber 3.1.1 Vergleich von Leitungstreibern mit passiver Anpassung 3.1.2 Spannungstreiber 3.1.3 Leitungstreiber mit aktiver Anpassung 3.1.4 Vergleich der Leitungstreiber und Fazit 3.2 Takterzeugung 3.2.1 Ringoszillator 3.2.2 Phasenregelschleife 3.2.3 Phaseninterpolator 3.2.4 Messung 3.2.5 Verbesserter 10 Bit DPC 3.3 Takt- und Datenrückgewinnung 3.3.1 Phasendetektor 3.3.2 Modellierung des DPC 3.3.3 Dimensionierung des Schleifenfilters 3.3.4 Implementierung 3.4 Adaptiver Equalizer 3.4.1 Kompensation der Kabeldämpfung 3.4.2 Implementierung des analogen Filters 3.4.3 Digitale Regelung der Equalizer-Parameter 3.4.4 Messung des Equalizers 3.5 Zeitsynchronisation 3.5.1 Uhr und Steuerung der Frequenz 3.5.2 Digitale Schaltungen zur Zeitstempelung 3.5.3 Implementierung der Zeitsynchronisation 3.5.4 Adaptive Unterdrückung eines Eintonstörers 3.5.5 Automatische Kalibrierung von Asymmetrien 3.5.6 Vergleich mit dem Stand der Technik 3.6 Gesamter PHY-Schaltkreis 3.6.1 Leistungsaufnahme 3.6.2 Vergleich mit dem Stand der Technik 4 Zusammenfassung und Ausblick Literaturverzeichnis Eigene Veröffentlichungen / This work investigates accurate time synchronization over copper-based Ethernet systems as well as the design of circuits for the physical layer (PHY) in such Ethernet systems. The design of an integrated circuit (IC) for the 100Base-TX standard is presented. This PHY-IC enables data transmission at a data rate of 100 MBit/s over twisted pair copper cables and, additionally, provides an accurate clock which can be synchronized between connected network nodes. This circuit is designed for industrial applications where various processes need to be synchronized in time. In principle, however, the PHY-IC can be used universally for various time synchronization applications. In order to increase the accuracy of the time synchronization compared to conventional approaches, various techniques are investigated and used in the designed circuit. For example, the phase of the clock signals is adjusted and measured in fine steps, such that the resolution of the timestamps is improved by a large amount. For this purpose, a digital-to-phase converter (DPC) is used, which provides 256 different clock phases of the 125 MHz system clock. A proportional integral controller is used for the actual time synchronization application. Based on a theoretical noise analysis, a method is presented to dimension the parameters of this controller to minimize the timing error in the steady state. Furthermore, other disturbing influences are analyzed and suitable measures are developed to compensate them. Thus, an adaptive compensation of a single-tone interferer is presented as well as a calibration to automatically compensate for asymmetries in the cable. All these points help to provide excellent accuracy of the time synchronization, which is verified by extensive measurements. Overall, the measured time error in a point-to-point scenario has a standard deviation of 64 ps and a mean value below 100 ps. This represents a significant improvement over conventional solutions for time synchronization over copper-based Ethernet, which achieve accuracies in the nanosecond range. As a second goal of this work, the PHY-IC is optimized for lowest power consumption. In particular, the line driver in the transmitter and the equalizer in the receiver are systematically optimized to achieve this. Thus, two different topologies of line drivers are investigated and compared. Both have a power consumption of about 24 mW. These represent the two lowest values for line drivers for the 100Base-TX standard compared to the state of the art. The entire PHY-IC is implemented in a 180 nm technology and shows a power consumption below 69 mW due to the numerous optimizations. This also represents a record value compared to the state of the art (80 mW). The individual circuits were verified with simulations and with detailed measurements. For the entire link, a bit error rate better than 10⁻¹² is achieved for various cables up to 120 m length.:Abbildungsverzeichnis Tabellenverzeichnis Abkürzungen Symbole 1 Einleitung 1.1 Zeit und Zeitsynchronisation 1.2 Ziele dieser Arbeit 1.3 Gliederung 2 Grundlagen 2.1 100Base-TX Ethernet-Standard 2.1.1 Schnittstelle zur MAC-Schicht 2.1.2 4B5B-Kodierung 2.1.3 Scrambler und Descrambler 2.1.4 MLT-3-Kodierung 2.1.5 Bitfehlerrate und Signal-Rausch-Verhältnis 2.2 Kanalmodellierung 2.2.1 Dämpfung 2.2.2 Baseline-Wander 2.3 Zeitsynchronisierung 2.3.1 Bestimmung der Zeitdifferenz 2.3.2 Vergrößerung der Synchronisationsgenauigkeit 3 Schaltungsentwurf und Charakterisierung 3.1 Energieeffiziente Leitungstreiber 3.1.1 Vergleich von Leitungstreibern mit passiver Anpassung 3.1.2 Spannungstreiber 3.1.3 Leitungstreiber mit aktiver Anpassung 3.1.4 Vergleich der Leitungstreiber und Fazit 3.2 Takterzeugung 3.2.1 Ringoszillator 3.2.2 Phasenregelschleife 3.2.3 Phaseninterpolator 3.2.4 Messung 3.2.5 Verbesserter 10 Bit DPC 3.3 Takt- und Datenrückgewinnung 3.3.1 Phasendetektor 3.3.2 Modellierung des DPC 3.3.3 Dimensionierung des Schleifenfilters 3.3.4 Implementierung 3.4 Adaptiver Equalizer 3.4.1 Kompensation der Kabeldämpfung 3.4.2 Implementierung des analogen Filters 3.4.3 Digitale Regelung der Equalizer-Parameter 3.4.4 Messung des Equalizers 3.5 Zeitsynchronisation 3.5.1 Uhr und Steuerung der Frequenz 3.5.2 Digitale Schaltungen zur Zeitstempelung 3.5.3 Implementierung der Zeitsynchronisation 3.5.4 Adaptive Unterdrückung eines Eintonstörers 3.5.5 Automatische Kalibrierung von Asymmetrien 3.5.6 Vergleich mit dem Stand der Technik 3.6 Gesamter PHY-Schaltkreis 3.6.1 Leistungsaufnahme 3.6.2 Vergleich mit dem Stand der Technik 4 Zusammenfassung und Ausblick Literaturverzeichnis Eigene Veröffentlichungen
193

Comparative Analysis of Real-Time Industrial Ethernet Protocols : ModbusTCP Protocol Implementation

Maniraj, Roshni January 2022 (has links)
Industrial Ethernet Communication protocols for Real-Time communication is the focus of research in a variety of different industrial Applications. The subject of thesis study is a comprehensive analysis of Industrial Ethernet protocols used in safety-critical real-time environment, comparing these based on performance, safety, diagnostics and error detection features, topology preference, cost incurred and openness of the protocol. The protocols chosen for this comparisons are ModbusTCP, EtherNet/IP, Ethernet Powerlink, Profinet IO, EtherCAT®, Sercos III, and CC-LINK IE, because they are most relevant for real-time applications and they have a widespread global presence in a lot of industrial applications. The industry in focus here is the spacecraft industry, which is a perfect example of a real-time safety-critical environment, where the protocols need to perform under harsh conditions, such as vibrations, exposure to radiation , extreme temperatures and low atmospheric pressure, and have strict timing requirements. The communication protocols for this environment are held to very high standards of performance and communication accuracy. The challenge here is to implement a protocol that can provide deterministic, real-time communication in such extreme conditions. The protocol in focus here is the ModbusTCP protocol , that is implemented on the ESBO-DS Stratospheric Balloon project to establish a communication link with the pointing system on board. ModbusTCP is chosen for this application because it is reliable, has a large support base, it is easy to implement, transparent and extremely interoperable. All these benefits along with providing real-time communication on a space-based application gives us a good reason to continuing the use of ModbusTCP here. The conclusion of the comparison of the selected real-time communication Industrial Ethernet protocols is that there is no “best ” protocol, and the choice of protocol depends on the application in focus. EtherCAT, SERCOS III and PROFINET IRT are all powerful hard real-time protocols, but require dedicated and expensive hardware for implementation. CC-Link IE is also a popular hard real-time protocol that uses special hardware and is well-established in the East Asian countries. Ethernet/IP and ModbusTCP control a large market share in the Industrial Communication domain in addition to providing good performance easily available tools. Ethernet Powerlink is open and provides both implementation and specification royalty free on its organisations website. / Industriella Ethernet-kommunikationsprotokoll för realtidskommunikation är fokus för forskning inom en mängd olika industriella tillämpningar. Ämnet för avhandlingsstudien är en omfattande analys av industriella Ethernet-protokoll som används i säkerhetskritiska realtidsmiljöer, som jämför dessa baserat på prestanda, säkerhet, diagnostik och feldetekteringsfunktioner, topologipreferenser, uppkomna kostnader och protokollets öppenhet. De valda protokollen för dessa jämförelser är ModbusTCP, EtherNet/IP, Ethernet Powerlink, Profinet IO, EtherCAT®, Sercos III och CC-LINK IE, eftersom de är mest relevanta för realtidsapplikationer och de har en utbredd global närvaro i många industriella tillämpningar. Branschen i fokus här är rymdfarkostindustrin, som är ett perfekt exempel på en realtidssäkerhetskritisk miljö, där protokollen måste fungera under tuffa förhållanden, såsom vibrationer, exponering för strålning, extrema temperaturer och lågt atmosfärstryck, och har strikta tidskrav. Kommunikationsprotokollen för denna miljö håller mycket höga standarder för prestanda och kommunikationsnoggrannhet. Utmaningen här är att implementera ett protokoll som kan tillhandahålla deterministisk kommunikation i realtid under sådana extrema förhållanden. Protokollet i fokus här är ModbusTCP-protokollet, som är implementerat i ESBO-DS Stratospheric Balloon-projektet för att upprätta en kommunikationslänk med peksystemet ombord. ModbusTCP är vald för denna applikation eftersom den är pålitlig, har en stor supportbas, den är lätt att implementera, transparent och extremt driftskompatibel. Alla dessa fördelar tillsammans med att tillhandahålla realtidskommunikation på en rymdbaserad applikation ger oss en god anledning att fortsätta använda ModbusTCP här. Slutsatsen av jämförelsen av de valda realtidskommunikationens Industrial Ethernet-protokoll är att det inte finns något bästaprotokoll, och valet av protokoll beror på applikationen i fokus. EtherCAT, SERCOS III och PROFINET IRT är alla kraftfulla hårda realtidsprotokoll, men kräver dedikerad och dyr hårdvara för implementering. CC-Link IE är också ett populärt hårt realtidsprotokoll som använder speciell hårdvara och är väletablerat i de östasiatiska länderna. Ethernet/IP och ModbusTCP kontrollerar en stor marknadsandel inom industriell kommunikationsdomän förutom att de tillhandahåller bra prestanda lättillgängliga verktyg. Ethernet Powerlink är öppet och tillhandahåller både implementering och specifikation royaltyfritt på sin organisations webbplats.
194

ESPGOAL

Schneider, Timo, Eckelmann, Sven 18 May 2011 (has links) (PDF)
Optimized implementations of blocking and nonblocking collective operations are most important for scalable high-performance applications. Offloading such collective operations into the communication layer can improve performance and asynchronous progression of the operations. However, it is most important that such offloading schemes remain flexible in order to support user-defined (sparse neighbor) collective communications. In this work, we describe an operating system kernel-based architecture for implementing an interpreter for the flexible Group Operation Assembly Language (GOAL) framework to offload collective communications. We describe an optimized scheme to store the schedules that define the collective operations and show an extension to profile the performance of the kernel layer. Our microbenchmarks demonstrate the effectiveness of the approach and we show performance improvements over traditional progression in user-space. We also discuss complications with the design and offloading strategies in general.
195

Meteostanice s rozhraním Ethernet / Weather Station with Ethernet Interface

Novák, Pavel January 2013 (has links)
This thesis deals with the design and construction of the meteorological station. The meteorological station is designed and constructed to be able to measure the basic meteorological parameters (temperature, humidity, air pressure) and the other three variables (measuring rainfall, wind speed, wind direction). This thesis will introduce you to meteorology. Meteorology determines the daily weather forecast and the results are used for examples in aviation or maritime affairs. The method of atmospheric origin is given in the theoretical part. Meteorology must use measuring instruments to determine quantities. The dissertation also includes analysis of the measuring instruments. The meteorological station uses the Ethernet technology. In the chapter devoted to Ethernet are described its principles, types and method of power supply over Ethernet. The following section describes the design of the entire meteorological station, selection of all components and description of their connection. The chapter about implementation contains a description of the parts which forms program part of the meteorological station. The aim of the thesis is a summary of the achieved results including price comparison of the renovated meteorological station with other meteorological stations, which can be normally bought.
196

Návrh a realizace managovatelného PoE injektoru / Design and implementation of managed PoE injector

Frkal, Pavel January 2016 (has links)
This study deals with power supply for network devices using existing structured cabling. Various power supplies are analysed including their limitations and also deals with measuring of the consumed energy. The outcome is 24-port passive PoE injector for remote power supply of network equipment. It's suitable namely for remote devices which lacks built-in PoE support as these do not need major modifications (using passive injection). Power options including current measurement may be done via administrative web interface.
197

Optimizing Point-to-Point Ethernet Cluster Communication

Reinhardt, Mirko 28 February 2006 (has links)
This work covers the implementation of a raw Ethernet communication module for the Open MPI message passing library. Thereby it focuses on both the reduction of the communication latency for small messages and maximum possible compatibility. Especially the need for particular network devices, adapted network device drivers or kernel patches is avoided. The work is divided into three major parts: First, the networking subsystem of the version 2.6 Linux kernel is analyzed. Second, an Ethernet protocol family is implemented as a loadable kernel module, consisting of a basic datagram protocol (EDP), providing connection-less and unreliable datagram transport, and a streaming protocol (ESP), providing connection-oriented, sequenced and reliable byte streams. The protocols use the standard device driver interface of the Linux kernel for data transmission and reception. Their services are made available to user-space applications through the standard socket interface. Last, the existing Open MPI TCP communication module is ported atop the ESP. With bare EDP/ESP sockets a message latency of about 30 us could be achieved for small messages, which compared to the TCP latency of about 40 us is a reduction of 25 %.
198

ESPGOAL: A Dependency Driven Communication Framework

Schneider, Timo, Eckelmann, Sven 01 June 2011 (has links)
Optimized implementations of blocking and nonblocking collective operations are most important for scalable high-performance applications. Offloading such collective operations into the communication layer can improve performance and asynchronous progression of the operations. However, it is most important that such offloading schemes remain flexible in order to support user-defined (sparse neighbor) collective communications. In this work, we describe an operating system kernel-based architecture for implementing an interpreter for the flexible Group Operation Assembly Language (GOAL) framework to offload collective communications. We describe an optimized scheme to store the schedules that define the collective operations and show an extension to profile the performance of the kernel layer. Our microbenchmarks demonstrate the effectiveness of the approach and we show performance improvements over traditional progression in user-space. We also discuss complications with the design and offloading strategies in general.:1 Introduction 1.1 Related Work 2 The GOAL API 2.1 API Conventions 2.2 Basic GOAL Functionality 2.2.1 Initialization 2.2.2 Graph Creation 2.2.3 Adding Operations 2.2.4 Adding Dependencies 2.2.5 Scratchpad Buffer 2.2.6 Schedule Compilation 2.2.7 Schedule Execution 2.3 GOAL-Extensions 3 ESP Transport Layer 3.1 Receive Handling 3.2 Transfer Management 3.2.1 Known Problems 4 The Architecture of ESPGOAL 4.1 Control Flow 4.1.1 Loading the Kernel Module 4.1.2 Adding a Communicator 4.1.3 Starting a Schedule 4.1.4 Schedule Progression 4.1.5 Progression by ESP 4.1.6 Unloading the Kernel Module 4.2 Data Structures 4.2.1 Starting a Schedule 4.2.2 Transfer Management 4.2.3 Stack Overflow Avoidance 4.3 Interpreting a GOAL Schedule 5 Implementing Collectives in GOAL 5.1 Recursive Doubling 5.2 Bruck's Algorithm 5.3 Binomial Trees 5.4 MPI_Barrier 5.5 MPI_Gather 6 Benchmarks 6.1 Testbed 6.2 Interrupt coalescing parameters 6.3 Benchmarking Point to Point Latency 6.4 Benchmarking Local Operations 6.5 Benchmarking Collective Communication Latency 6.6 Benchmarking Collective Communication Host Overhead 6.7 Comparing Different Ways to use Ethernet NICs 7 Conclusions and Future Work 8 Acknowledgments
199

Security Analysis of Ethernet in Cars

Talic, Ammar January 2017 (has links)
With the development of advanced driving assistance systems, the amount of data that needs to be transmitted within a car has increased tremendously. Traditional communication bus based systems are unable to meet today’s requirements; hence automotive Ethernet is being developed and standardized. Ethernet has for many years been the de facto standard in interconnecting computers. In that time several vulnerabilities of the networking protocol stack implementations and even the protocols themselves have been discovered. The knowledge from exploiting computer networks can be applied to the automotive domain. Additionally, vehicle manufacturers tend to implement their own stacks, due to copyleft reasons; hence the chances of implementation faults increases as opposed to using well-tested open source solutions. Since the line between security and safety in cars is almost nonexistent, security has to be properly addressed. This thesis investigates the security of automotive Ethernet and its accompanying protocols. It starts with an introduction to computer and automotive networking and protocols. After a solid foundation is laid, it investigates what makes up automotive Ethernet, its application in the field, and the automotive specific components relying on it. After looking at related work, a data network security audit and analysis as defined by the open-source security testing methodology is performed. The system is graded with risk assessment values. Weak points are identified and improvements suggested. The impact of the proposed improvements is shown by reevaluating the system and recalculating the risk assessment values. These efforts further the ultimate goal of achieving increased safety of all traffic participants. / Med utvecklingen av avancerade körningsassisterande system har mängden data som behöver sändas inom en bil ökat enormt. Traditionella kommunikationsbussbaserade system kan inte uppfylla dagens krav. Därmed utvecklas och standardiseras Ethernet för fordon. Ethernet har i många år varit de facto-standarden i sammankopplandet mellan datorer. Under den tiden har flera sårbarheter hos nätverksprotokolls implementeringar och protokoll själva upptäckts. Det finns anledning att tro att kunskapen från att utnyttja datanätverk kan tillämpas på fordonsdomänen. Att tillägga är att fordonstillverkare tenderar att genomföra sina egna staplar. På grund av copyleft skäl, ökar chanserna för implementeringsfel i motsats till att använda testade open source-lösningar. Eftersom människors säkerhet hos bilar är extremt viktigt, måste även dess system hanteras ordentligt. Denna avhandling undersöker säkerheten för Ethernet och kompletterande protokoll hos bilar. Den börjar med en introduktion till datorers och bilars nätverk och protokoll. Efter en stabil grund fastställts, undersöker den vad som utgör Ethernet hos bilar, dess tillämpning inom fältet, och de bilspecifika komponenterna den beror av. Efter att ha tittat på relaterat arbete utförs en säkerhetsgranskning och analys av datanätverk som definieras av säkerhetsmetoden för open-source. Systemet värderas med riskbedömningsvärden. Svaga punkter identifieras och förbättringar föreslås. Effekten av de föreslagna förbättringarna framgår utav omvärdering av systemet och omräkning av riskbedömningsvärdena. Dessa bedömningar leder till det yttersta målet för ökad säkerhet för alla trafikanter.
200

[en] SIGNALS INTEGRITY IN HIGH SPEED PRINTED CIRCUIT BOARDS / [pt] INTEGRIDADE DE SINAIS EM PLACAS DE CIRCUITO IMPRESSO DE ALTAS TAXAS

VANESSA PRZYBYLSKI RIBEIRO MAGRI 14 February 2008 (has links)
[pt] Este trabalho tem como objetivo avaliar a viabilidade técnica para fabricação de placas de circuito impresso de múltiplas camadas com espessuras reduzidas mantendo a integridade dos sinais que se propagam em conexões inter- chip, nas taxas de transmissão de 1Gb/s e 10Gb/s para aplicações em redes de comunicações nos padrões 1GB Ethernet e 10GB Ethernet. A avaliação inclui o projeto de uma placa de 6 camadas de planos condutores, com espessura total de 1,29mm. A placa desenvolvida contém linhas de transmissão, vias e curvas, microcapacitores , microresistores e conectores I/O adequados para a faixa de freqüência em questão. / [en] The main purpose of this work is to evaluate the technical reliability to fabricate a Printed circuit board (PCB) with reduced thickness multilayer keeping signal Integrity on inter-chip connections in 1Gb/s and 10Gb/s (1GB Ethernet and 10GB Ethernet network communications). This evaluation includes the development of a PCB project with 06 layers and 1,29mm thickness. The PCB contains several transmission lines, vias, bends, microcapacitors, microresistors, connectors (I/O) suitable to this frequency band.

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