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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
201

Study of germanium MOSFETs with ultrathin high-k gate dielectrics

Chen, Jer-hueih, Banerjee, Sanjay, Guha, Supratik, January 2004 (has links) (PDF)
Thesis (Ph. D.)--University of Texas at Austin, 2004. / Supervisors: Sanjay K. Banerjee and Supratik Guha. Vita. Includes bibliographical references.
202

Schottky field effect transistors and Schottky CMOS circuitry /

Vega, Reinaldo A. January 2006 (has links)
Thesis (M.S.)--Rochester Institute of Technology, 2006. / Typescript. Includes bibliographical references.
203

Modeling the extrinsic resistance and capacitance of planar and non-planar MOSFETs /

Wu, Wen. January 2007 (has links)
Thesis (Ph.D.)--Hong Kong University of Science and Technology, 2007. / Vita. Includes bibliographical references (leaves 134-143). Also available in electronic version.
204

Effect of gate length in enhancing current in a silicon nanowire wrap around gate MOSFET

Waseem, Akbar. January 2006 (has links)
Thesis (M.S.)--University of Missouri-Columbia, 2006. / The entire dissertation/thesis text is included in the research.pdf file; the official abstract appears in the short.pdf file (which also appears in the research.pdf); a non-technical general description, or public abstract, appears in the public.pdf file. Title from title screen of research.pdf file (viewed on September 14, 2007) Vita. Includes bibliographical references.
205

High-K dielectrics for scaled CMOS and SANOS nonvolatile semiconductor memory devices /

Zhao, Yijie, January 2006 (has links)
Thesis (Ph. D.)--Lehigh University, 2006. / Includes vita. Includes bibliographical references (leaves 121-133).
206

Synthesis and characterization Naphtho[2,1-b:3,4-b']dithiophene-based organic semiconducting molecules for organic electronics

Li, Zhaoguang 25 February 2015 (has links)
Thienoacenes represent an intriguing class of organic semiconducting molecules with potential applications in organic electronics. Some of thienoacenes have been reported with high charge carrier mobility in organic field-effect transistors (OFET). OFETs based on naphtho[2,1-b:3,4-b’]dithiophene (NDT) exhibited moderate device performance and low-band gap donor-acceptor copolymers based on NDT showed a promising solar power conversion efficiency. In this thesis, four novel series of thienoacenes based on naphtho[2,1-b:3,4-b’]dithiophene backbone were designed and synthesized for OFET applications. Firstly, a novel series of p-type semiconducting naphthodithieno[3,2-b]thiophene derivatives (NDTT-n) composed of six-fused aromatic rings were designed and synthesized (Figure 1). The OFETs based on NDTT-10, and NDTT-12 fabricated by vacuum deposition showed a hole mobility of 0.22 and 0.13 cm2/(Vs), respectively with Ion/Ioff above 107 after annealing at 80 oC. Secondly, the derivatives of NDT fused with benzene rings at the flanks of thiophene, namely NBBT-n (Figure 2) were also designed and synthesized. OFETs based on NBBTF-10 fabricated by vacuum deposition exhibited a hole mobility of 0.35 cm2/(Vs) with a current on/off ratio of 106 107 after annealing at 160 oC. Further extension of π-conjugation of NDTT by incorporating with fused thiophenes leading to a new NBTBT-n series was also developed (Figure 3). The OFETs fabricated by NBTBT-10 showed the hole mobility up to 0.25 cm2/(Vs) with a current on/off ratio of 105 106 after annealing at 220 oC. Lastly, two dimensionally π-extended, butterfly-shaped thienoacenes (Figure 4) were also synthesized. The OFETs based on SMB-10 fabricated by spin-coating showed the best performance in this series with an average mobility of 0.027 cm2/(Vs) for five devices and the highest mobility of 0.038 cm2/(Vs) with a current on/off ratio of 106 107 by from chloroform. Key words: organic semiconducting molecules, organic field-effect transistor, thienoacene, charge carrier mobility.
207

Gallium arsenide integrated circuit modeling, layout and fabrication

Rutherford, William C. January 1987 (has links)
The object of the work described in this thesis was to develop GaAs integrated circuit modeling techniques based on a modified version of SPICE 2, then layout, fabricate, model and test ion implanted GaAs MESFET integrated sample and hold circuits. A large signal GaAs MESFET model was used in SPICE to evaluate the relative performance of inverted common drain logic (ICDL) digital integrated circuits compared to other circuit configurations. The integrated sample and hold subsequently referred to as an integrated sampling amplifier block(ISAB), uses a MESFET switch with either one or two guard gates to suppress strobe feedthrough. Performance guidelines suggested by the project sponsor indicate an optimal switch sampling pulse width capability of 25 ps with 5 ps rise and fall time. Guard gates are included in the switch layout to evaluate pulse feedthrough minimization. The project sponsor suggested -20 dB pulse feedthrough isolation and minimum sampling switch off isolation of -20 dB at 10 GHz as project guidelines. Simulations indicate that a 0.5 µm gate length process approaches the suggested performance guidelines. A mask layout was designed and modeled including both selective implant and refractory self aligned gate processes. The refractory self aligned gate process plasma etched t-gate structure produces a sub 0.5 µm gate length. / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate
208

The effects of stress on gallium arsenide device characteristics

Peng, Harry W. January 1988 (has links)
For VLSI applications, it is essential to have consistent device characteristics for devices fabricated on different fabrication runs, on different wafers, and especially across a single wafer. MESFETs fabricated on GaAs have been found to have an orientation dependence in their threshold voltage and other characteristics. For MESFETs with gate length less than 2 μm, changing the device orientation can so significantly alter the device characteristics that it must be considered during the transistor design stage. The causes for the orientation dependence in the device characteristics have been suggested to be the piezoelectric property of GaAs and stress in the substrate. Stress produced by the encapsulating dielectric film generates a polarization charge density in the substrate. If the magnitude of the polarization charge density is large enough to alter the channel doping profile, then the device characteristics are changed. In this thesis, the effects of stress on GaAs MESFET device characteristics were studied by modelling and experimental works. In the modelling part, polarization charge densities under the gate of an encapsulated MESFET were calculated by using the so called distributed force model and the edge concentrated model. The distributed force model is a much better model because it describes more realistically the stress distribution in the film and in the substrate. It should provide a much more accurate calculation of the induced polarization charge density. The results show that the polarizarition charge densities calculated by the two models have similar distribution pattern, but the magnitudes are very different. With an identical set of conditions, a much larger polarization charge density is predicted by the edge concentrated model. In addition, the distributed force model distinguishes different films by a "hardness" value, based on their elastic property, whereas the edge concentrated model does not. A film with a larger "hardness" value is predicted to generate a larger polarization charge density. Two types of film were considered, SiO₂ and Si₃N₄. Using bulk film characteristics, the calculations showed that Si0₂ film is "harder" than Si₃N₄ film. If an equal built-in stress value is assumed, then a larger polarization charge density is predicted for Si0₂ than for Si₃N₄ encapsulated substrates. In the experimental part, stress was applied to test devices by bending strips of GaAs wafers in a cantilever configuration. MESFETs tested were oriented in the [011] or the [011̅] direction. Both static stress and time-varying stress were applied. In the statics stress experiment, the changes in the barrier height and the C-V profile were measured. It was found that, with equal stress applied, Schottky barriers with a larger ideality factor showed a larger change in the barrier height. In the time-varying stress experiment, attempts were made to measure the effect of the polarization charge density on device characteristics by measuring changes in the drain-source current. / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate
209

Advanced Technology for Source Drain Resistance Reduction in Nanoscale FinFETs

Smith, Casey Eben 05 1900 (has links)
Dual gate MOSFET structures such as FinFETs are widely regarded as the most promising option for continued scaling of silicon based transistors after 2010. This work examines key process modules that enable reduction of both device area and fin width beyond requirements for the 16nm node. Because aggressively scaled FinFET structures suffer significantly degraded device performance due to large source/drain series resistance (RS/D), several methods to mitigate RS/D such as maximizing contact area, silicide engineering, and epitaxially raised S/D have been evaluated.
210

Simulation and Characterization of a Graphene Field Effect Transistor Common Source Amplifier

Koudelka, Peter James 23 May 2022 (has links)
No description available.

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