Hiu Yung Wong. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2001. / Includes bibliographical references (leaves 104-111). / Abstracts in English and Chinese. / Abstract --- p.i / Acknowledgments --- p.iii / List of Figures --- p.ix / List of Tables --- p.xiii / Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Motivation and Objectives --- p.1 / Chapter 1.2 --- Contributions --- p.3 / Chapter 1.3 --- Organization of the Thesis --- p.4 / Chapter 2 --- Devices and Fabrication Processes --- p.5 / Chapter 2.1 --- Introduction --- p.5 / Chapter 2.2 --- BJTs --- p.6 / Chapter 2.2.1 --- Structure and Modeling of BJTs --- p.6 / Chapter 2.2.2 --- Standard BJT Process and BJT Characteristics --- p.7 / Chapter 2.3 --- MOSFETs and Complementary MOS (CMOS) --- p.8 / Chapter 2.3.1 --- Structure and Modeling of MOSFETs --- p.8 / Chapter 2.3.2 --- Standard n-well CMOS Process and MOSFETs Charac- teristics --- p.11 / Chapter 2.4 --- BiCMOS Technology --- p.13 / Chapter 2.5 --- Summary --- p.14 / Chapter 3 --- Matching Properties --- p.15 / Chapter 3.1 --- Introduction --- p.15 / Chapter 3.2 --- Importance of Matched Devices in IC Design --- p.15 / Chapter 3.2.1 --- What is Matching? --- p.15 / Chapter 3.2.2 --- Low-power Systems --- p.16 / Chapter 3.2.3 --- Device Size Downward Scaling --- p.16 / Chapter 3.2.4 --- Analog Circuits and Analog Computing --- p.17 / Chapter 3.3 --- Measurement of Mismatch --- p.18 / Chapter 3.3.1 --- Definitions and Statistics of Mismatch --- p.18 / Chapter 3.3.2 --- Types of Mismatches --- p.20 / Chapter 3.3.3 --- Matching Properties of MOSFETs --- p.23 / Chapter 3.3.4 --- Matching Properties of BJTs and CLBTs --- p.27 / Chapter 3.4 --- Summary --- p.30 / Chapter 4 --- CMOS Compatible Lateral Bipolar Transistors (CLBTs) --- p.31 / Chapter 4.1 --- Introduction --- p.31 / Chapter 4.2 --- Structure and Operation --- p.32 / Chapter 4.3 --- DC Model of CLBTs --- p.34 / Chapter 4.4 --- Residual Gate Effect in Accumulation --- p.35 / Chapter 4.5 --- Main Characteristics of CLBTs --- p.37 / Chapter 4.5.1 --- Low Early Voltage --- p.37 / Chapter 4.5.2 --- Low Lateral Current Gain at High Current Levels --- p.38 / Chapter 4.5.3 --- Other Issues --- p.39 / Chapter 4.6 --- Enhanced CLBTs with Cascode Circuit --- p.40 / Chapter 4.7 --- Applications --- p.41 / Chapter 4.8 --- Design and Layout of CLBTs --- p.42 / Chapter 4.9 --- Experimental Results of Single pnp CLBT； nMOSFET and pMOSFET --- p.44 / Chapter 4.9.1 --- CLBT Gains --- p.46 / Chapter 4.9.2 --- Gate Voltage Required for Pure Bipolar Action --- p.47 / Chapter 4.9.3 --- I ´ؤ V and Other Characteristics of Bare pnp CLBTs --- p.49 / Chapter 4.9.4 --- Transfer Characteristics of a Cascoded pnp CLBT --- p.50 / Chapter 4.9.5 --- Transfer Characteristics of an nMOSFET --- p.51 / Chapter 4.9.6 --- Transfer Characteristics of Cascoded and Bare CLBTs Operating as pMOSFETs --- p.52 / Chapter 4.10 --- Summary --- p.53 / Chapter 5 --- Experiments on Matching Properties --- p.54 / Chapter 5.1 --- Introduction --- p.54 / Chapter 5.2 --- Objectives --- p.55 / Chapter 5.3 --- Technology --- p.57 / Chapter 5.4 --- Design of Testing Arrays --- p.57 / Chapter 5.4.1 --- nMOSFET Array --- p.57 / Chapter 5.4.2 --- pnp CLBT Array --- p.59 / Chapter 5.5 --- Design of Input and Output Pads (I/O Pads) --- p.62 / Chapter 5.6 --- Shift Register --- p.62 / Chapter 5.7 --- Experimental Equipment --- p.63 / Chapter 5.8 --- Experimental Setup for Matching Properties Measurements --- p.65 / Chapter 5.8.1 --- Setup for Measuring the Mismatches of the Devices --- p.65 / Chapter 5.8.2 --- Testing Procedures --- p.68 / Chapter 5.8.3 --- Data Analysis --- p.68 / Chapter 5.9 --- Matching Properties --- p.69 / Chapter 5.9.1 --- Matching Properties of nMOSFETs --- p.69 / Chapter 5.9.2 --- Matching Properties of CLBTs --- p.71 / Chapter 5.9.3 --- Matching Properties of pMOSFETs --- p.73 / Chapter 5.9.4 --- "Comments on the Matching Properties of CLBT, nMOSFET, and pMOSFET" --- p.76 / Chapter 5.9.5 --- "Mismatch in CLBT, nMOSFET, and pMOSFET Cur- rent Mirrors" --- p.77 / Chapter 5.10 --- Summary --- p.79 / Chapter 6 --- Conclusion --- p.80 / Chapter A --- Floating Gate Technology --- p.82 / Chapter A.1 --- Floating Gate --- p.82 / Chapter A.2 --- Tunnelling --- p.83 / Chapter A.3 --- Hot Electron Effect --- p.85 / Chapter A.4 --- Summary --- p.86 / Chapter B --- A Trimmable Transconductance Amplifier --- p.87 / Chapter B.1 --- Introduction --- p.87 / Chapter B.2 --- Trimmable Transconductance Amplifier using Floating Gate Com- patible Lateral Bipolar Transistors (FG-CLBTs) --- p.87 / Chapter B.2.1 --- Residual Gate Effect and Collector Current Modulation --- p.89 / Chapter B.2.2 --- Floating Gate CLBTs --- p.92 / Chapter B.2.3 --- Electron Tunnelling --- p.93 / Chapter B.2.4 --- Hot Electron Injection --- p.94 / Chapter B.2.5 --- Experimental Results of the OTA --- p.94 / Chapter B.2.6 --- Experimental Results of the FGOTA --- p.96 / Chapter B.3 --- Summary --- p.97 / Chapter C --- AMI-ABN 1.5μm n-well Process Parameters (First Batch) --- p.98 / Chapter D --- AMI-ABN 1.5μm n-well Process Parameters (Second Batch) --- p.101 / Bibliography --- p.104

by Fong Hon Hang = 超薄二氧化硅的固定電荷分佈和電擊穿特性 / 方漢鏗. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2000. / Includes bibliographical references. / Text in English; abstracts in English and Chinese. / by Fong Hon Hang = Chao bo er yang hua gui de gu ding dian he fen bu he dian ji chuan te xing / Fang Hankeng. / ABSTRACT --- p.i / ACKNOWLEDGEMENTS --- p.iii / TABLE OF CONTENT --- p.iv / LIST OF FIGURES --- p.ix / LIST OF TABLES --- p.xiv / LIST OF SYMBOLS --- p.xv / Chapter Chapter1 --- Background of the thesis work / Chapter 1.1 --- Introduction --- p.1 / Chapter 1.2 --- Stability of charge on oxide --- p.1 / Chapter 1.3 --- Defects in SiO2/Si --- p.2 / Chapter 1.4 --- Objectives of the thesis work --- p.4 / Chapter 1.5 --- Organization of the thesis --- p.5 / Bibliography for Chapter1 --- p.6 / Chapter Chapter2 --- Theory of X-ray Photoelectron Spectroscopy (XPS) and Surface Charge Spectroscopy (SCS) / Chapter 2.1 --- Introduction --- p.7 / Chapter 2.2 --- X-ray photoelectron spectrometry (XPS) --- p.8 / Chapter 2.2.1 --- Binding energy reference for semiconductors --- p.10 / Chapter 2.2.2 --- Measurement of surface Fermi level --- p.15 / Chapter 2.2.3 --- XPS quantitative analysis --- p.17 / Chapter 2.2.3.1 --- Electron Inelastic Mean free Path --- p.16 / Chapter 2.2.3.2 --- Atomic concentration of a homogeneous material --- p.17 / Chapter 2.2.3.3 --- Determination of overlayer thickness --- p.19 / Chapter 2.3 --- Surface charge Spectroscopy (SCS) --- p.21 / Chapter 2.3.1 --- Principle of the SCS technique --- p.21 / Chapter 2.3.2 --- Control of the dielectric surface potential --- p.21 / Chapter 2.3.3 --- Dielectric layer surface potential --- p.22 / Chapter 2.3.4 --- Surface band bending --- p.23 / Chapter 2.3.5 --- Limitation of the dielectric layer thickness --- p.24 / Chapter 2.4 --- Applications of SCS on Metal-Oxide Semiconductor (MOS) --- p.24 / Chapter 2.4.1 --- Measurements of interface state density (Dit) --- p.24 / Chapter 2.4.2 --- Determination of density of fixed-oxide charges --- p.27 / Bibliography for Chapter2 --- p.28 / Chapter Chapter3 --- Instrumentation & methodology / Chapter 3.1 --- X-ray Photoelectron Spectroscopy (XPS) --- p.30 / Chapter 3.1.1 --- General description of the Kratos AXIS - HS XPS system --- p.30 / Chapter 3.1.2 --- X-ray source --- p.32 / Chapter 3.1.3 --- AXIS - HS electron analyzer and transfer lens system --- p.35 / Chapter 3.1.4 --- Laser alignment facility --- p.38 / Chapter 3.1.5 --- In-lens (Micro XPS) aperture --- p.38 / Chapter 3.1.6 --- Iris (Lens input aperture) --- p.39 / Chapter 3.1.7 --- Magnetic immersion lenses --- p.39 / Chapter 3.1.8 --- Lateral resolutions --- p.41 / Chapter 3.1.9 --- Charge neutralizer --- p.53 / Chapter 3.1.10 --- XPS imaging capability --- p.58 / Chapter 3.1.11 --- Angle-resolved X-ray photoelectron spectroscopy (ARXPS) --- p.58 / Chapter 3.1.12 --- Ion sputtering system and depth profiling --- p.59 / Chapter 3.2 --- Methodology for surface charging --- p.59 / Chapter 3.3 --- Sample preparation --- p.61 / Bibliography for Chapter3 --- p.62 / Chapter Chapter4 --- Fixed-oxide charge Qf(z) of thermally-grown SiO2/Si(100) / Chapter 4.1 --- Introduction --- p.63 / Chapter 4.2 --- Experimental results on oxide surface potential as a function of oxide thickness --- p.64 / Chapter 4.3 --- Calculation of fixed-oxide charge distribution --- p.69 / Chapter 4.3.1 --- Gauss's law --- p.69 / Chapter 4.3.2 --- Density of fixed-oxide charge --- p.70 / Chapter 4.4 --- Applications --- p.78 / Bibliography for chapter4 --- p.80 / Chapter Chapter5 --- Observation of dielectric electrical breakdown phenomena of SiO2/Si structure by SCS / Chapter 5.1 --- Introduction to electrical breakdown analysis in device electronics --- p.81 / Chapter 5.2 --- Experimental --- p.82 / Chapter 5.3 --- Results --- p.82 / Chapter 5.3.1 --- Analysis on 1000A Sio2/Si --- p.82 / Chapter 5.3.1.1 --- Variation of C 1s under charging --- p.82 / Chapter 5.3.1.2 --- Stochastic breakdown of SiO2 --- p.84 / Chapter 5.3.2 --- Analysis on 19k SiO2/Si --- p.91 / Chapter 5.4 --- Discussion --- p.93 / Chapter 5.4.1 --- Model of stochastic breakdown of SiO2/Si --- p.93 / Chapter 5.4.2 --- Variation of Si 2p under charging --- p.95 / Chapter 5.5 --- Summary --- p.96 / Bibliography for Chapter5 --- p.99 / Chapter Chapter6 / Conclusion --- p.100

A wide variety of tunable physio-chemical properties make ZnO nanowires a promising candidate for functional device applications. Although bottom-up grown nanowires are producible in volume, their high-throughput device integration requires control over dimensions and, more importantly, of precise placement. Thus development of top-down fabrication routes with accurate device positioning is imperative and hence pursued in this thesis. ZnO thin film transistors (TFT) were fabricated using solution based precursor zinc neodecanoate. A range of ZnO thin films were prepared by varying process parameters, such as precursor concentrations and annealing temperatures, and then analysed for their optical and electrical characteristics. ZnO TFTs prepared from a 15 % precursor concentration and annealing at 700 $^\circ$C exhibited best device performance with a saturation mobility of 0.1 cm$^2$/V.s and an on/off ratio of 10$^7$. Trap limited conduction (TLC) transport was found to be dominant in these devices. A direct-write electron beam lithography (EBL) process was developed using zinc naphthenate and zinc neodecanoate precursors for the top-down synthesis of ZnO nanowires. Nanoscale ZnO patterns with a resolution of 50 nm and lengths up to 25 $\mu$m were fabricated. A linear mobility of 0.5 cm$^2$/V.s and an on/off ratio of $\sim$10$^5$ was achieved in the micro-FETs with 50 $\mu$m channel width. Interestingly, on scaling down the ZnO channel width down to 100 nm, almost two orders of magnitude enhancement in the linear mobility was observed, which reached $\sim$33.75 cm$^2$/V.s. Such increment in the device performance was attributed to the formation of larger grains and thus reduction in the grain-boundary scattering. Six volatile organic compounds (VOCs) were sensed at room temperature using the direct-write EBL fabricated ZnO devices under UV sensitisation. As the surface-to-volume ratio increases with the decreasing channel width (from 50 $\mu$m to 100 nm), sensing response of the ZnO devices becomes more significant. Ppm level detection of various VOCs was observed; with a 25 ppm level Anisole detection being the lowest concentration. Additionally, using 100 nm device, detection of 10 ppm NO$_2$ was achieved at room temperature. The sensing response towards NO$_2$ was found to be increased with UV illumination and sensor temperature. This led to exhibit $\sim$171 % sensing response for a 2.5 ppm level of NO$_2$.

Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1980. / MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING. / Includes bibliographical references. / by Steven Lee Garverick. / M.S.

Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1980. / MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING. / Includes bibliographical references. / by Charles Edward Harm. / M.S.

Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1980. / MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING. / Includes bibliographical references. / by Daniel Dean Kessler. / M.S.

電源管理集成電路被廣泛應用於便攜式電子應用。在同一芯片需要不同的電源電壓水平。由於芯片尺寸，工作速度和所需功耗的要求，低壓差穩壓器（LDO）在快遞瞬態響應，低噪聲，以及高精度的電子產品中具有廣泛的應用。 / LDO的負載瞬間變化取決於功率金氧半場效電晶體的大小、偏置電流和誤差放大器的增益。檢測輸出電壓，並使用大電容和電阻通過電容耦合，增加偏置電流是一個簡單的方法來改善負載瞬間變化。然而，電阻電容佔據較大的芯片面積。 / 權衡功耗和芯片尺寸，本論文中提出用數字檢測電路取代用於瞬態耦合的大電容和電阻。所提出的電路是讓功率金氧半場效電晶體的栅極電容電流增加充電或放電，以提高LDO的負載瞬間響應速度。產生這種電流通過檢測內部的變化，並產生一個電壓脈衝控制迴轉電流，然後通過使用一組數字電路去改變充電或放電的電量。 / 擬議的設計已在UMC0.18微米 CMOS制程技術實現。LDO的輸入電壓為0.9伏至1.3伏和穩壓0.7伏。最大輸出電流為50豪安。經過測量，負載瞬間變化得到改善。負載瞬間的響應時間可以從75微秒（傳統）減少到75納秒。 / Power-management IC is widely used in portable electronic applications. Different supply voltage levels are required in the same chip. Due to the size, speed and power requirements, low-dropout regulator (LDO) is generally adopted for applications which need fast transient response, low noise and high accuracy. / Transient response of a LDO is limited by the size of power MOSFET, biasing current and gain of error amplifier. Detecting the output voltage and using large RC components for capacitive coupling to increase the biasing current is a straightforward method to improve the transient response. However, this requires a large chip size for the RC components. / By considering power consumption and size, digital detection circuit is proposed to replace the large capacitors and resistors used for transient coupling. The proposed circuit is to increase the charging or discharging current to the gate of the power MOSFET to increase the transient speed of LDO. This current is generated by detecting the internal changes and generating a voltage pulse to control the slewing current by using a set of digital circuit. / The proposed design has been realized in UMC 0.18μm CMOS technology. The input voltage of the LDO is 0.9 to 1.3V and the regulated voltage is 0.7V. The maximum output current is 50mA. From the measurement, the transient response is improved. The response time due to load transient changes can be reduced from 75s (conventional) to 75ns. / Detailed summary in vernacular field only. / Detailed summary in vernacular field only. / Detailed summary in vernacular field only. / Detailed summary in vernacular field only. / Kwong, Ka Yee. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2012. / Includes bibliographical references. / Abstracts also in Chinese. / Abstract / Acknowledgments / Table of Content / List of Figures / List of Tables / Chapter Chapter 1 --- LDO regulator research background / Introduction / Chapter Section 1.1 --- Generic LDO regulator structure / Chapter Section 1.2 --- Principle of LDO regulator operation / Chapter Section 1.3 --- Specifications / Chapter References / Chapter Chapter 2 --- Review of state-of-the-art transient-improvement techniques for LDO regulators / Introduction / Chapter Section 2.1 --- Slew rate improvement at power transistor gate / Chapter Section 2.2 --- Frequency compensation / Chapter Section 2.3 --- Short summary / References / Chapter Chapter 3 --- A proposed output-capacitorless LDO regulator with digital voltage spike detection / Chapter Introduction / Chapter Section 3.1 --- LDO regulator core structure / Chapter Section 3.2 --- Digital switches based LDO regulator / Chapter Section 3.3 --- LDO regulator with proposed digital voltage spike detection circuit / Chapter Section 3.4 --- Simulation result / Chapter Section 3.5 --- Short summary / References / Chapter Chapter 4 --- Measurement results / Introduction / Chapter Chapter 5 --- Conclusion and Future Work

Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1977. / MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING. / Includes bibliographical references. / by Robert Philip Gilmore. / M.S.

Optical modulation of the physical properties of materials is important for future development of optical memories and switches, optoelectronics, and smart surfaces. Incorporation of an optically bistable photochromic compound into an electronically bifunctional material is a promising strategy for a development of photoswitchable materials. Photochromic spirooxazine ligands undergo light-induced ring-opening and closure between the closed-spirooxazine (SO) and open-photomerocynanine (PMC) forms. The structural reorganization leads to accompanying changes in electronic structure which can lead to a change in the oxidation/reduction potentials and spin state of a bound metal center. Changes in the ligand field about a metal center in turn can lead to “non-classical” photoinduced magnetic (PIM) effects. The “non-classical” PIM effect is an effect that occurs through ligand-centered processes via the metal center, rather than direct excitation at the metal center. The structural change of the photochromic compounds also results in a change in the frontier orbital energies and donor-acceptor character, which may lead to optically-gated charge-transfer and energy-transfer processes. In this dissertation, the structural factors that govern thermal relaxation of spirooxazines, as optical control units, was investigated toward controlling the photostationary states of this important class of photochromes. The electronic structure of the PMC form of azahomoadamantyl-based spirooxazines was found to control the thermal coloration/decoloration rates of photochromic spirooxazines. A significant charge-separated character of the PMC form was correlated with the slow thermal coloration/decoloration rates in spirooxazines. This concept was then extended to an investigation of the effect of Lewis-acidic metal complexation. Solution study of the charge-separated character of the PMC form via metal complexation of the photochromic spirooxazines supported the correlation between the charge-separated character of the PMC form and the rate of the thermal coloration/decoloration. The studies provide a potential pathway for modulating PMC thermal relaxation rates through optimization of the structure of the spirooxazines and metal complexation. The studies were then extended to an investigation of the photomodulation of charge-transfer processes in cobalt multinuclear clusters by photoisomerization of photochromic spirooxazines. Incorporation of optically bistable phenanthroline-spirooxazine ligands into a magnetically bistable cobalt-dioxolene valence tautomeric cluster resulted in large magnetic moments in the solid and solution states. This study suggests that the redox-isomeric behavior of the cobalt dioxolenes can be coupled to isomerization of the photochromic ligand in the solution state when the π-acceptor ability of the photochromic ligands align with the direction of charge transfer of the cobalt dioxolene components. The potential of these cobalt multinuclear clusters to enhance the relaxivity of water in MRI for biological imaging was investigated. A cobalt tetranuclear cluster was prepared and found to exhibit high magnetic moments in solution at room temperature, and large relaxivities relative to commercially available gadolinium based MRI contrast agents. Lastly, the photomodulation of ionic doping of graphene organic field-effect transistors (OFETs) by photochromic spirooxazines was investigated. The electron donor or acceptor nature of the photochromic isomers modulates the direction and magnitude of ionic doping of graphene, and in turn the gate voltages of graphene OFETs, leading to optical modulation of OFET gate voltages for data processing and memory technologies. / Graduate / 2020-02-08

<div>Since the debut of graphene, many 2D materials have emerged as promising candidates for silicon alternatives to extend Moore’s Law, such as MoS₂ and phosphorene. However, some common shortcomings such as low mobility, instability and lack of massive production methods limit the exploration and applications of these materials. Here, we introduce a novel member to the 2D category – high-mobility air-stable 2D tellurium film (tellurene).</div><div><br></div><div>Tellurium (Te) is a narrow bandgap semiconductor with unique one-dimensional chiral structure. Recently, a hydrothermal synthesizing method was developed to produce large-area tellurene nanofilms with thickness ranging from tens of nanometers down to few layers. In this thesis, a thorough investigation of Te properties in 2D quantum region was first carried out by various material characterization techniques including TEM and Raman spectroscopy. Potential applications of Te-based electronics, optoelectronic and thermoelectric devices were explored, and high-performance Te FETs were achieved with record-high drive current over 1 A/mm via device scaling and contact engineering. Magneto-transport, including weak anti-localization and Shubnikov-de-Haas oscillations was studied at cryogenic temperature. Quantum Hall effect was observed for the first time in both 2D electron and hole gases with mobility of 6,000 and 3,000 cm²/Vs, and non-trivial Berry phase in Te 2D electron system was detected as the first experimental evidence of massive Weyl fermions. This work not only demonstrates the great potential of tellurene films for electronics and quantum device applications, but also expands the spectrum of topological matters into a new material species - Weyl semiconductors.</div>