Submitted by Renata Lopes (renatasil82@gmail.com) on 2016-02-11T13:22:33Z No. of bitstreams: 1 pedrosantosalmeida.pdf: 19972618 bytes, checksum: 95d8213caa2ed63781c9a0e651a913c6 (MD5) / Approved for entry into archive by Adriana Oliveira (adriana.oliveira@ufjf.edu.br) on 2016-02-26T12:01:23Z (GMT) No. of bitstreams: 1 pedrosantosalmeida.pdf: 19972618 bytes, checksum: 95d8213caa2ed63781c9a0e651a913c6 (MD5) / Made available in DSpace on 2016-02-26T12:01:23Z (GMT). No. of bitstreams: 1 pedrosantosalmeida.pdf: 19972618 bytes, checksum: 95d8213caa2ed63781c9a0e651a913c6 (MD5) Previous issue date: 2014-12-11 / CAPES - Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / Este trabalho apresenta um estudo sobre o acionamento de diodos emissores de luz (LEDs) a partir da rede elétrica. Este estudo envolve uma análise sobre as características térmicas, elétricas e fotométricas dos LEDs visando a adequada caracterização estática e dinâmica da carga. Em seguida, com o objetivo de propor conversores com uma eficiência global superior, propõe-se a utilização de conversores ressonantes como estágio de controle de potência. Este estágio é precedido de um estágio pré-regulador do fator de potência, de forma a garantir uma baixa distorção harmônica total da corrente drenada da rede. Um estudo sistemático acerca das topologias de correção do fator de potência e de conversores ressonantes que podem compor cada um destes dois estágios é feito, visando compilar as características, vantagens e desvantagens de cada uma para o acionamento de LEDs. A partir deste estudo, foi possível propor uma estrutura integrada de conversor ressonante com um pré-regulador de alto fator de potência, que se mostrou adequado para acionar uma carga de 72 LEDs associados em série, com uma potência nominal aproximada de 100 W. O protótipo do conversor proposto atingiu uma eficiência global acima de 92%, com um fator de potência superior a 0,97 e distorção harmônica da corrente de entrada de cerca de 20%, com total observância aos parâmetros de qualidade de energia impostas pelas normatizações nacional e internacional. O projeto deste conversor também permitiu a eliminação dos capacitores eletrolíticos no circuito de potência do protótipo através da redução da capacitância; somente foram empregados capacitores de filme metalizado, o que contribui para elevar a vida útil do conversor, compatibilizando-a com a vida útil dos LEDs sendo acionados. / This work presents a study regarding the driving of light-emitting diodes (LEDs) fed from mains power. This study involves an analysis of the thermal, electrical and photometrical characteristics of the LEDs, aiming an adequate static and dynamical characterization of the load. Then, with the goal of proposing driving converters with a superior global efficiency, it is proposed the use of resonant conversion as the power control stage of the LED drivers. This stage is preceded by a power factor pre-regulator stage, so that a low total harmonic distortion on the input current can be achieved. A systematic study of the power factor correction topologies and resonant converters which might compose each of these two stages is done, therefore compiling the characteristics, advantages and disadvantages of each for the driving of LEDs. From this study, it was proposed an integrated converter structure of a resonant converter with a high power factor pre-regulator, which showed good compliance when driving an LED load composed of 72 series-associated LEDs, with nominal power of ca. 100 W. A prototype of the proposed converter has reached a global efficiency above 92%, with a power factor greater than 0.97 and total harmonic distortion of input current of ca. 20%, along with total compliance with the power quality parameters imposed by national and international standards. The design of this converter also permitted the elimination of the electrolytic capacitors from within the power circuitry of the prototype through capacitance reduction; only metalized film capacitors were employed, contributing to enhance the lifespan of the converter, making it compatible with the lifespan of the LEDs being driven.

The master’s thesis deals with design and realization of three-phase inverter for experimental high speed asynchronous motor with a mechanical power of 6 kW. The thesis deals with the design of the individual components of the DC link. The thesis describes the selection of suitable capacitors in the DC link. There is also a complete simulation of the inverter in the Matlab Simulink program. Part of the thesis is also the design and realization of printed circuit boards of this inverter.

Submitted by Geandra Rodrigues (geandrar@gmail.com) on 2018-01-08T12:01:24Z No. of bitstreams: 1 guilhermemárciosoares.pdf: 24810934 bytes, checksum: d538ec8cfbd6bb9363a5aa07343bda48 (MD5) / Approved for entry into archive by Adriana Oliveira (adriana.oliveira@ufjf.edu.br) on 2018-01-22T18:36:09Z (GMT) No. of bitstreams: 1 guilhermemárciosoares.pdf: 24810934 bytes, checksum: d538ec8cfbd6bb9363a5aa07343bda48 (MD5) / Made available in DSpace on 2018-01-22T18:36:10Z (GMT). No. of bitstreams: 1 guilhermemárciosoares.pdf: 24810934 bytes, checksum: d538ec8cfbd6bb9363a5aa07343bda48 (MD5) Previous issue date: 2017-11-18 / CAPES - Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / Este documento apresenta uma nova técnica para a minimização da ondulação de baixa frequência, típica de conversores para o acionamento de LEDs alimentados a partir da rede elétrica. Esta estratégia baseia-se na modulação em baixa frequência da razão cíclica do conversor de modo que a ondulação de corrente possa ser reduzida e, consequentemente, as capacitâncias de filtragem do conversor possam ser minimizadas. Esta técnica foi desenvolvida para a aplicação em conversores de malha única, como é o caso de conversores de estágio único ou mesmo dois estágios integrados. A modulação da razão cíclica é projetada de maneira que o comportamento de baixa frequência das principais variáveis do conversor seja alterado, permitindo uma redução da ondulação da corrente de saída ao custo de um incremento cotrolado no conteúdo harmônico da corrente de entrada. Duas possíveis metodologias para a implementação da técnica proposta são discutidas ao longo do trabalho. A primeira envolve a injeção de harmônicas específicas no sinal da razão cíclica do conversor através de ramos adicionais na estrutura de controle. Esta abordagem foi aplicada para projetar um controlador de LEDs baseado em um conversor flyback e também em uma topologia integrada baseada na conexão cascata de dois conversores Buck-boost. Este estudo inicial foi expandido para outros conversores e uma análise generalizada acerca da influência da modulação da razão cíclica no comportamento de controladores de LED alimentados a partir da rede elétrica é apresentada. A segunda metodologia para a implementação da compensação ativa da ondulação de baixa frequência do conversor é baseada na otimização de um controlador proporcional-integral a fim de que tal elemento influencie não só no comportamento dinâmico do circuito, mas também na característica de baixa frequência do conversor. Por fim são discutidas as principais contribuições da tese e algumas propostas para trabalhos futuros são apresentadas / This document presents a novel approach for low-frequency output current ripple minimization in off-line light-emitting diode (LED) drivers. This strategy is based on the large-signal modulation of the duty-cycle so that the output ripple can be reduced and, consequently, the required filtering capacitances of the converter can be somehow decreased. This technique is devised to be used on converters in which a single control loop is employed, such as off-line single-stage or integrated converters. The duty-cycle modulation is used to change the shape of the main waveforms of the converter, especially the input and output currents. This allows for a reduction of the output current peak-to-peak ripple while the harmonic content of the input current is increased but kept within the limits imposed by the IEC standard. Two methodologies for implementing the proposed technique are discussed along the text. The first one is related to the injection of harmonic components to the duty cycle signal by means of additional branches inserted in the conventional control structure. This approach was applied to design an off-line flyback-based LED driver and also a circuit based on the Integrated Double Buck-boost converter. This first study was expanded to other topologies and a generalized analysis regarding the impact of the duty cycle modulation on off-line converters is then presented. The second methodology for implementing the ripple compensation is based on the optimization of a proportional-integral controller so that this element is designed to influence not only in the dynamic behavior of the circuit, but also in its low-frequency characteristic. Finally, the main contributions of this work are discussed and the proposals for future works are presented.

Submitted by Renata Lopes (renatasil82@gmail.com) on 2016-07-12T12:29:15Z No. of bitstreams: 1 pedrosantosalmeida.pdf: 11306492 bytes, checksum: 80bd2f9ab4af41e3889b7bc91e4391b9 (MD5) / Approved for entry into archive by Adriana Oliveira (adriana.oliveira@ufjf.edu.br) on 2016-07-13T16:48:06Z (GMT) No. of bitstreams: 1 pedrosantosalmeida.pdf: 11306492 bytes, checksum: 80bd2f9ab4af41e3889b7bc91e4391b9 (MD5) / Made available in DSpace on 2016-07-13T16:48:06Z (GMT). No. of bitstreams: 1 pedrosantosalmeida.pdf: 11306492 bytes, checksum: 80bd2f9ab4af41e3889b7bc91e4391b9 (MD5) Previous issue date: 2012-03-23 / CAPES - Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / Este trabalho apresenta um estudo acerca da alimentação de diodos emissores de luz (LEDs) a partir da rede elétrica empregando conversores eletrônicos com correção do fator de potência. O estudo visa o desenvolvimento de um conversor que pode ser aplicado em iluminação pública, que atenda às demandas típicas de alto fator de potência, alta eficiência, reduzido número de componentes, baixa distorção harmônica da corrente de entrada e possa atingir uma elevada vida útil, através da substituição de capacitores eletrolíticos no circuito de potência por capacitores de filme. É proposta uma nova topologia de conversor para implementar tal acionamento, baseado em uma integração entre dois estágios, que passam a compartilhar um único interruptor estático. Os conversores SEPIC e buck-boost operando em modo de condução descontínua (DCM) são escolhidos para compor cada um destes estágios, atuando o primeiro na correção do fator de potência e o segundo na regulação de corrente na carga. Uma metodologia de projeto que visa excluir os capacitores eletrolíticos é desenvolvida, partindo de dados fotométricos que permitem aplicar nos LEDs uma ondulação limite de 50% em amplitude, sem causar prejuízos ao seu desempenho fotométrico. Um protótipo de 70 W é apresentado, cujos resultados experimentais demonstram alto fator de potência (0,998), baixa distorção harmônica de corrente (3,2%) e alta eficiência (90,2%), enquanto empregando somente capacitores de filme metalizado, de longa vida útil, no circuito de potência. Uma abordagem das possibilidades de se implementar um controlador digital para o novo conversor proposto é feita, partindo de um modelo de pequenos sinais para o conversor operando em DCM. / This work presents a study regarding the feeding of light-emitting diodes (LEDs) from mains (grid power) employing electronic drivers with power factor correction. The study aims the development of an LED driver which can be applied to public and street lighting, complying with the typical demands of high power factor, high efficiency, reduced component count, low total harmonic distortion (THD) of input current and which can attain long lifespan, through the substitution of electrolytic capacitors within the power circuit by film capacitors. It is proposed a new converter topology to implement such driver, based on an integration between two stages which share a common static power switch. The SEPIC and buck-boost converters operating in discontinuous conduction mode (DCM) are chosen to make up each of these two stages, the first acting as a power factor corrector and the second as a load currentcontrolling stage. A design methodology which aims the exclusion of electrolytic capacitors is developed, stemming from photometric data which allow the LEDs to be operated with current ripples up to 50% in amplitude, without causing any harm to their photometric performance. A 70 W prototype is presented, whose experimental results demonstrate high power factor (0.998), low current harmonic distortion (3.2%) and high efficiency (90.2%), while employing only long-life metallised-film capacitors on the power circuit. An approach to the possibilities of implementing a digital controller for the proposed novel converter is done, starting from a small-signal model for the converter operating in DCM.

Ce mémoire est consacré à la modélisation des condensateurs électrolytiques aluminium dédiés à des applications à hautes températures ainsi qu’à la compréhension de leur vieillissement lors d’utilisations réalistes. En effet, dans le cas d’onduleur de traction de véhicule électrique, les sollicitations, notamment en température, peuvent être parfois très variables. Or, il se trouve que pour ce type d’applications, ces derniers sont la plupart du temps de type électrolytiques aluminium, technologie étant parmi les plus fragiles. Par conséquent, ce manuscrit propose tout d’abord une nouvelle modélisation électrique s’appuyant des phénomènes de diffusion permettant d’obtenir une représentation très précise de l’impédance de ces condensateurs. Compte-tenu de leur forte dépendance en température, la modélisation thermique couplée au modèle électrique est également traitée. Le but premier est de développer un outil permettant d’estimer précisément les pertes à chaque instant pour permettre au contrôleur d’ajuster la température de ce dernier par une modification de la stratégie MLI. Une méthode d’identification en ligne est alors proposée par l’utilisation de filtres de Kalman conjoints avec de très bons résultats obtenus en simulation. Le dimensionnement ainsi que la création d’un banc de cyclage accéléré est développé et une comparaison du vieillissement obtenu après 12 000 heures entre des composants cyclés thermiquement et d’autres non cyclés est donnée. Les résultats montrent une très bonne tenue dans le temps des condensateurs étudiés que ce soit au niveau de l’impédance ou bien visuellement avec néanmoins un impact du cyclage thermique non négligeable / This thesis is devoted to the modeling of aluminum electrolytic capacitors dedicatedto high temperatures. The purpose is also to understand their ageing while submitted to realistic use. Indeed, in the case of electric vehicle traction inverter, solicitations like temperature can vary a lot. This type of stress has already been studied for active components, but not yet on passive ones such as decoupling capacitors. However, it turns out that for this kind of application, they are most of the time aluminum electrolytic capacitors which is among the weakest technology. Consequently, this manuscript proposes at first a new electric model based on a diffusion phenomena which leads to a very accurate impedance description. It permits also a better understanding of the physical phenomena involved in these components. Because of their important temperature dependence, thermal modeling coupled to the electric model is also discussed. The very first purpose is to develop a tool that is able to estimate losses accurately at every moment. Thanks to it, the controller could so change the PWM strategy in order to act on the temperature. An online identification method is then proposed with the use of joint Kalman filters which led to very good results in simulation. The design and the creation of an accelerated cycling bench is developed and comparisons about the ageing obtained after 12 000 hours between thermally cycled components and others non-cycled are given. Results show a very good stability over time of the studied capacitors (PEG225MF470Q Kemet©) either on the impedance or visually. Nevertheless a significant impact can be observed on the cycled ones.

Three-level diode-clamped inverter is being widely used these days. Extensive research has been carried out on pulse width modulation (PWM) strategies for a three-level inverter. The most widely used PWM strategies are sine-triangle pulse width modulation (SPWM) and centered space vector pulse width modulation (CSVPWM). The influence of these PWM strategies on the DC-link capacitor current and voltage ripple is studied in this thesis. The sizing of the DC capacitor depends on value of the maximum RMS current flowing through it. In this work, an analytical expression for capacitor RMS current is derived as a function of operating conditions like modulation index, power factor angle of the load and peak load current. The worst case current stress on the capacitor is evaluated using the analytical expression. The capacitor RMS current is found to be the same in SPWM and CSVPWM schemes. The analytical expression is validated through simulations and experiments on a 3kVA MOSFET based three-level inverter. Harmonic analysis of the capacitor current is helpful in better evaluation of capacitor power loss. Therefore, harmonic analysis of the capacitor current is carried out, using the techniques of geometric wall model and double Fourier integral for SPWM and CSVPWM schemes. The theoretical predictions are validated through experiments. The capacitor RMS current is divided into low-frequency RMS current (where low frequency component is defined as a component whose frequency is less than half the switching frequency) and high-frequency RMS current. The capacitor voltage ripple is estimated analytically for SPWM and CSVPWM schemes, using the low-frequency and high-frequency capacitor RMS current. The voltage ripples due to SPWM and CSVPWM schemes are compared. It is found that the voltage ripple with SPWM is higher than that with CSVPWM. A simplified method to estimate the capacitor power loss, without the requirement of FFT analysis of capacitor current, is proposed. The results from this simplified method agree reasonably well with the results from the detailed method. A space vector based modulation scheme is proposed, which reduces the capacitor RMS current at high power factor angles. However, the proposed method leads to higher total harmonic distortion (THD) than CSVPWM. Simulation and experimental results, comparing CSVPWM and the proposed PWM, are presented.

Extracellular neuroelectronic interfacing has important applications in the fields of neural prosthetics, biological computation and whole-cell biosensing for drug screening and toxin detection. While the field of neuroelectronic interfacing holds great promise, the recording of high-fidelity signals from extracellular devices has long suffered from the problem of low signal-to-noise ratios and changes in signal shapes due to the presence of highly dispersive dielectric medium in the neuron-microelectrode cleft. This has made it difficult to correlate the extracellularly recorded signals with the intracellular signals recorded using conventional patch-clamp electrophysiology. For bringing about an improvement in the signalto-noise ratio of the signals recorded on the extracellular microelectrodes and to explore strategies for engineering the neuron-electrode interface there exists a need to model, simulate and characterize the cell-sensor interface to better understand the mechanism of signal transduction across the interface. Efforts to date for modeling the neuron-electrode interface have primarily focused on the use of point or area contact linear equivalent circuit models for a description of the interface with an assumption of passive linearity for the dynamics of the interfacial medium in the cell-electrode cleft. In this dissertation, results are presented from a nonlinear dynamic characterization of the neuroelectronic junction based on Volterra-Wiener modeling which showed that the process of signal transduction at the interface may have nonlinear contributions from the interfacial medium. An optimization based study of linear equivalent circuit models for representing signals recorded at the neuron-electrode interface subsequently iv proved conclusively that the process of signal transduction across the interface is indeed nonlinear. Following this a theoretical framework for the extraction of the complex nonlinear material parameters of the interfacial medium like the dielectric permittivity, conductivity and diffusivity tensors based on dynamic nonlinear Volterra-Wiener modeling was developed. Within this framework, the use of Gaussian bandlimited white noise for nonlinear impedance spectroscopy was shown to offer considerable advantages over the use of sinusoidal inputs for nonlinear harmonic analysis currently employed in impedance characterization of nonlinear electrochemical systems. Signal transduction at the neuron-microelectrode interface is mediated by the interfacial medium confined to a thin cleft with thickness on the scale of 20-110 nm giving rise to Knudsen numbers (ratio of mean free path to characteristic system length) in the range of 0.015 and 0.003 for ionic electrodiffusion. At these Knudsen numbers, the continuum assumptions made in the use of Poisson-Nernst-Planck system of equations for modeling ionic electrodiffusion are not valid. Therefore, a lattice Boltzmann method (LBM) based multiphysics solver suitable for modeling ionic electrodiffusion at the mesoscale neuron-microelectrode interface was developed. Additionally, a molecular speed dependent relaxation time was proposed for use in the lattice Boltzmann equation. Such a relaxation time holds promise for enhancing the numerical stability of lattice Boltzmann algorithms as it helped recover a physically correct description of microscopic phenomena related to particle collisions governed by their local density on the lattice. Next, using this multiphysics solver simulations were carried out for the charge relaxation dynamics of an electrolytic nanocapacitor with the intention of ultimately employing it for a simulation of the capacitive coupling between the neuron and the v planar microelectrode on a microelectrode array (MEA). Simulations of the charge relaxation dynamics for a step potential applied at t = 0 to the capacitor electrodes were carried out for varying conditions of electric double layer (EDL) overlap, solvent viscosity, electrode spacing and ratio of cation to anion diffusivity. For a large EDL overlap, an anomalous plasma-like collective behavior of oscillating ions at a frequency much lower than the plasma frequency of the electrolyte was observed and as such it appears to be purely an effect of nanoscale confinement. Results from these simulations are then discussed in the context of the dynamics of the interfacial medium in the neuron-microelectrode cleft. In conclusion, a synergistic approach to engineering the neuron-microelectrode interface is outlined through a use of the nonlinear dynamic modeling, simulation and characterization tools developed as part of this dissertation research.

<p dir="ltr">The short lifespan of capacitors in power electronics converters is a significant challenge. These capacitors, often electrolytic, are vital for voltage smoothing and frequency filtering. However, their susceptibility to heat, ripple current, and aging can lead to premature faults. This can cause issues like output voltage instability and short circuits, ultimately resulting in catastrophic failure and system shutdown. Capacitors are responsible for 30% of power electronics failures.</p><p dir="ltr">To tackle this challenge, scientists, researchers, and engineers are exploring various approaches detailed in technical literature. These include exploring alternative capacitor technologies, implementing active and passive cooling solutions, and developing advanced monitoring techniques to predict and prevent failures. However, these solutions often come with drawbacks such as increased complexity, reduced efficiency, or higher upfront costs. Additionally, research in material science is ongoing to develop corrosion-resistant capacitors, but such devices are not readily available.</p><p dir="ltr">This dissertation presents a capacitorless solution for dc-dc and dc-ac converters. The proposed solution involves harnessing parasitic elements and integrating them as intrinsic components in power converter technology. This approach holds the promise of enhancing power electronics reliability ratings, thereby facilitating breakthroughs in electric vehicles, compact power processing units, and renewable energy systems. The central scientific premise of this proposal is that the capacitance requirement in a power converter can be met by deliberately augmenting parasitic components.</p><p dir="ltr">Our research hypothesis that incorporating high dielectric material-based thin-films, fabricated using nanotechnology, into planar magnetics will enable the development of a family of capacitorless electronic converters that do not rely on discrete capacitors. This innovative approach represents a departure from the traditional power converter schemes employed in industry.</p><p dir="ltr">The first family of converters introduces a novel capacitorless solid-state power filter (SSPF) for single-phase dc-ac converters. The proposed configuration, comprising a planar transformer and an H-bridge converter operating at high frequency, generates sinusoidal ac voltage without relying on capacitors. Another innovative dc-ac inverter design is the twelve step six-level inverter, which does not incorporate capacitors in its structure.</p><p dir="ltr">The second family of capacitorless topologies consists of non-isolated dc-dc converters, namely the buck converter and the buck-boost converter. These converters utilize alternative materials with high dielectric constants, such as calcium copper titanate (CCTO), to intentionally enhance specific parasitic components, notably inter capacitance. This innovative approach reduces reliance on external discrete capacitors and facilitates the development of highly reliable converters.</p><p dir="ltr">The study also includes detailed discussions on the necessary design specifications for these parasitic capacitors. Furthermore, comprehensive finite element analysis solutions and detailed circuit models are provided. A design example is presented to demonstrate the practical application of the proposed concept in electric vehicle (EV) low voltage side dc-dc power converters used to supply EVs low voltage loads.</p>