Este trabalho descreve o estudo de preparação dos filmes de polianilina, Pani, depositados pelo método de polimerização in-situ para serem utilizados em dispositivos poliméricos emissores de luz (PLEDs) e em sensores químicos e de flexão mecânica. É descrita a síntese química da Pani, a produção de filmes pelo método de polimerização in-situ, o estudo do seu crescimento usando a espectroscopia de UV-Vis e as características morfológicsa da superfície pela técnica de varredura de AFM. Filmes de Pani depositados pela técnica in-situ sobre eletrodos interdigitados foram caracterizados através de medidas de condutividade elétrica contínua e alternada em função da temperatura e da dopagem do material. Os resultados elétricos obtidos, típicos de sistemas sólidos desordenados, foram interpretados usando o modelo de condução de Dyre. Investigou-se o uso de filmes finos de Pani como camada injetora de portadores de carga em PLEDs para diferentes métodos de conversão do precursor poli(xilideno tetrahidrotiofeno), PTHT, em poli(-fenileno vinileno), PPV. Mostrou-se que a camada de Pani pode ser usada como janela transparente da emissão luminosa do PPV, o que diminui a tensão de operação do PLED e protege o eletrodo de ITO contra a corrosão durante o processo de conversão. São mostrados estudos exploratórios de sensores de Pani depositados sobre o substrato de poli (tereftalato de etileno) (PET) para aplicação em dispositivos para medidas de pH de solução e de flexão mecânica. / This work shows the study of Pani film prepared by the in-situ deposition technique aiming its use im polymeric light emission diodes (PLEDs) and in chemical sensors and of flection mechanics. The sysnthesis of the Pani, the production of films by the in-situ method, the film growth probed by UV-Vis spectroscopy and its surface morphology characteristics probed by the scanning AFM microscope are presented. Such in-situ films were deposited on the top of interdigitated electrodes and characterized usign ac and dc conductivity measurements as function of temperature and of the material doping level. The electric results were typical of non ordered materials and interpreted using the Dyre´s conduction model. It was investigated the use of Pani films as carrier layer injection in PLEDs employing different of conversion of poly(xylylidene tetrahydrothiophenium), PTHT, in to poly(-phenylene vinylene), PPV. It was showed that the Pani film act as a transparent window for the PPV light emission, the onset voltage of the PLED decreased and the Pani layers protects the ITO electrode against the corrosion during the conversion of the PTHT in to PPV. Exploratory studies were also performed using the Pani layer deposited on the top of a poly (ethylene terephtalate) substrate aiming its application for measuring the pH of a solution and as mechanical bending sensor.

Cal Poly’s ongoing Energy Harvesting from Exercise Machines (EHFEM) project is a very convenient and cost-effective way for generating DC power from physical exercise and sending it back to the electrical grid as AC power, providing a renewable energy source for the future. The EHFEM project consists of numerous subprojects involving converting different types of exercise machines for power generation. This project is a continuation of one of the previous subprojects, specifically involving an elliptical machine, and focuses on improving system functionality at different machine settings without altering the elliptical user’s experience by selecting a new DC-DC converter design, while keeping the other system components intact. The new proposed DC-DC converter design is based on a non-isolated, PWM-switching single-ended primary inductor converter (SEPIC) topology, as opposed to the resonant zero-current switching/zero-voltage switching (ZCS/ZVS) topology-based off-the-shelf DC-DC converter that the previous project utilized, which had poor system functionality at high physical input levels (greater than 30V input) from the elliptical trainer. This project proves that a PWM-switching SEPIC topology provides a functional DC-DC converter design for DC power generation and inverter interfacing from a dynamic input voltage generator because of its wide input voltage range, high power driving capability and inherent voltage step-up and step-down functions. The proposed DC-DC converter supplies up to 288 watts of power and outputs 36 volts, and simultaneously takes 5-65 volts from its input depending on the elliptical user’s physical input level. This project details the new DC-DC converter’s design and construction processes, compares its topology to other existing DC-DC converter topologies and analyzes unfeasible designs as well as the overall system’s performance when converting the generated DC power to AC power, and documents any potential problems when used for this specific application.

Gallium Nitride (GaN) high electron mobility transistors (HEMTs) are becoming increasingly popular in power amplifier systems as an alternative to bulkier vacuum tube technologies. GaN offers advantages over other III-V semiconductor heterostructures such as a large bandgap energy, a low dielectric constant, and a high critical breakdown field. The aforementioned qualities make GaN a prime candidate for high-power and radiation-hardened applications using a smaller form-factor. Several different types of semiconductor substrates have been considered for their thermal properties and cost-effectiveness, and Silicon (Si) has been of increasing interest due to a balance between both factors. In this thesis, the DC, RF, and thermal characteristics of GaN HEMTs grown on Si-substrates will be investigated through a series of accelerated lifetime experiments. A figure of merit known as the critical voltage is explored and used as the primary means by which the GaN-on-Si devices are electrically strained. The critical voltage is defined as the specific voltage bias by which a sudden change in device performance is experienced due to a deformation of the target GaN HEMT’s epitaxial structure. Literature on the topic details the inevitable formation of pits and cracks localized under the drain-side of the gate contact that promote electrical degradation of the devices via the inverse piezoelectric effect. Characteristic changes in device performance due to high field strain are recorded and physical mechanisms behind observed degraded performance are investigated. The study assesses the performance of roughly 60 GaN-on-Si HEMTs in four experimental settings. The first experiment investigates the critical voltage of the device in the off-state mode of operation and explores device recovery post-stress. The second experiment analyzes alterations in DC and RF performance under varying thermal loads and tracks the dependence of the critical voltage on temperature. The third experiment examines electron trapping within the HEMTs as well as detrapping methodologies. The final experiment links the changes in RF performance induced by high field strain to the small-signal parameters of the HEMT. Findings from the research conclude the existence of process-dependent defects that originate during the growth process and lead to inherent electron traps in unstressed devices. Electron detrapping due to high electric field stress applied to the HEMTs was observed, potentially localized within the AlGaN layer or GaN buffer of the HEMT. The electron detrapping in turn contributed to drain current recovery and increased unilateral performance of the transistor in the RF regime. Thermal experiments resulted in a positive shift in critical voltage, which enhanced gate leakage current at lower gate voltage drives.

Future computing will require significant development in new computing device paradigms. This is motivated by CMOS devices reaching their technological limits, the need for non-Von Neumann architectures as well as the energy constraints of wearable technologies and embedded processors. The first device proposal, an energy-efficient voltage-controlled domain wall device for implementing an artificial neuron and synapse is analyzed using micromagnetic modeling. By controlling the domain wall motion utilizing spin transfer or spin orbit torques in association with voltage generated strain control of perpendicular magnetic anisotropy in the presence of Dzyaloshinskii-Moriya interaction (DMI), different positions of the domain wall are realized in the free layer of a magnetic tunnel junction to program different synaptic weights. Additionally, an artificial neuron can be realized by combining this DW device with a CMOS buffer. The second neuromorphic device proposal is inspired by the brain. Membrane potential of many neurons oscillate in a subthreshold damped fashion and fire when excited by an input frequency that nearly equals their Eigen frequency. We investigate theoretical implementation of such “resonate-and-fire” neurons by utilizing the magnetization dynamics of a fixed magnetic skyrmion based free layer of a magnetic tunnel junction (MTJ). Voltage control of magnetic anisotropy or voltage generated strain results in expansion and shrinking of a skyrmion core that mimics the subthreshold oscillation. Finally, we show that such resonate and fire neurons have potential application in coupled nanomagnetic oscillator based associative memory arrays.

Copper zinc tin sulfide (Cu2ZnSnS4 or CZTS) kesterite compound has attracted much attention in the last years as a new abundant, low cost, and environmentally benign material with desirable optoelectronic properties for Photovoltaic (PV) thin film solar cell applications. Among various synthesis routes for CZTS thin films, sol-gel processing is one of the most attractive routes to obtain CZTS films with superior quality and low cost. In this study, sol-gel sulfurization process parameters for CZTS thin films were systematically investigated to identify the proper process window. In addition, temperature dependent Raman spectroscopy was employed to monitor the CZTS sulfurization process in real time and gain fundamental information about the phase formation and degradation mechanisms of CZTS under the relevant processing conditions. It was found that CZTS thin films with different Cu stoichiometry can be prepared using parts-per-million (ppm) level of hydrogen sulfide (H2S) gas as opposed to high percentage level of H2S (e.g., ≥ 5%) in all previous studies. Samples sulfurized at lower temperatures of ~350°C and 125°C revealed the formation of CZTS phase as confirmed by XRD, Raman micro-spectroscopy, and sheet resistance measurement. Local EDS analysis indicates that CZTS films prepared at those low temperatures have a near-stoichiometric composition and are sometimes accompanied by the formation of Cu2-xS phase(s). Also, stoichiometric and Cu-rich precursor solutions tend to yield CZTS samples with better crystallinity and superior optical properties compared with the Cu-deficient solution. Moreover, in situ Raman monitoring of phase formation of CZTS material was carried out from room temperature up to 350°C in a 100 ppm H2S+4%H2+N2 gas mixture. The results showed that CZTS phase formed in about 30 min via a direct reaction between the metal oxide precursor film and the H2S-H2 gas mixture at an intermediate temperature of 350°C and remained stable upon extended exposure. In comparison, at a lower temperature (170°C), the oxide precursor film had to be reduced first (e.g., in 4% H2/N2 forming gas) and then the CZTS phase emerged. However, continued sulfurization at a lower temperature (e.g., 170°C) led to the disintegration of CZTS and the formation of CuS impurity, which remains stable upon cooling the sample down to room temperature. Furthermore, results of in situ Raman monitoring of CZTS films in an oxygen-rich atmosphere at elevated temperatures up to 600°C suggested that CZTS oxidizes first at ~400°C to form tin oxide (SnO2) and binary sulfides of mainly copper sulfide (Cu2-xS) and zinc sulfide (ZnS). Then, at temperatures higher than 400°C, the remaining sulfides oxidize to form zinc oxide (ZnO). The outcomes of the current study set the directions for optimizing the CZTS film structure and stoichiometry toward developing low cost and high-performance CZTS solar cells in future.

To isolate and study various components of a nuclear reaction, elaborate equipment must be developed to aid in this process. This thesis presents the design and implementation of an ultra-high slew rate Bradbury-Nielsen gate driver circuit with high-voltage input isolation. This design will be used in a multi-pass time-of-flight isomer spectrometer and separator application integrated into an overall instrument called the Oak Ridge Isomer Spectrometer and Separator (ORISS). The output drive signals of this circuit are transmitted through a vacuum feed-through system to supply the necessary signals to the Bradbury-Nielsen gate contained within the vacuum. A differential driving signal with a 100-V magnitude and switching times on the order of nanoseconds is presented in this design. The “on time” of this signal is comparable to the amount of time required for it to transition states, creating complex design constraints. The implementation of this design is based on a 4-layer printed circuit board and the use of commercial off-the-shelf (COTS) components.

We demonstrate the use of embedded CdS nanowires in improving spectral transmission loss and the low mechanical and electrical robustness of planar CdS window layer and thus enhancing the quantum efficiency and the reliability of the CdS-CdTe solar cells. CdS nanowire window layer enables light transmission gain at 300nm-550nm. A nearly ideal spectral response of quantum efficiency at a wide spectrum range provides an evidence for improving light transmission in the window layer and enhancing absorption and carrier generation in absorber. Nanowire CdS/CdTe solar cells with Cu/graphite/silver paste as back contacts, on SnO2/ITO-soda lime glass substrates, yield the highest efficiency of 12% in nanostructured CdS-CdTe solar cells. Reliability is improved by approximately 3 times over the cells with the traditional planar CdS counterpart. Junction transport mechanisms are delineated for advancing the basic understanding of device physics at the interface. Our results prove the efficacy of this nanowire approach for enhancing the quantum efficiency and the reliability in window-absorber type solar cells (CdS-CdTe, CdS-CIGS and CdS-CZTSSe etc) and other optoelectronic devices. We further introduce MoO3-x as a transparent, low barrier back contact. We design nanowire CdS-CdTe solar cells on flexible foils of metals in a superstrate device structure, which makes low-cost roll-to-roll manufacturing process feasible and greatly reduces the complexity of fabrication. The MoO3 layer reduces the valence band offset relative to the CdTe, and creates improved cell performance. Annealing as-deposited MoO3 in N2 reduces series resistance from 9.98 Ω/cm2 to 7.72 Ω/cm2, and hence efficiency of the nanowire solar cell is improved from 9.9% to 11%, which efficiency comparable to efficiency of planar counterparts. When the nanowire solar cell is illuminated from MoO3-x /Au side, it yields an efficiency of 8.7%. This reduction in efficiency is attributed to decrease in Jsc from 25.5mA/cm2 to 21mA/cm2 due to light transmission loss in the MoO3-x /Au electrode. Even though these nanowire solar cells, when illuminated from back side exhibit better performance than that of nanopillar CdS-CdTe solar cells, further development of transparent back contacts of CdTe could enable a low-cost roll-to-roll fabrication process for the superstrate structure-nanowire solar cells on Al foil substrate.

The progress of the silicon-based complementary-metal-oxide-semiconductor (CMOS) technology is mainly contributed to the scaling of the individual component. After decades of development, the scaling trend is approaching to its limitation, and there is urgent needs for the innovations of the materials and structures of the MOS devices, in order to postpone the end of the scaling. Atomic layer deposition (ALD) provides precise control of the deposited thin film at the atomic scale, and has wide application not only in the MOS technology, but also in other nanostructures. In this dissertation, I study rapid thermal processing (RTP) treatment of thermally grown SiO2, ALD growth of SiO2, and ALD growth of high-k HfO2 dielectric materials for gate oxides of MOS devices. Using a lateral heating treatment of SiO2, the gate leakage current of SiO2 based MOS capacitors was reduced by 4 order of magnitude, and the underlying mechanism was studied. Ultrathin SiO2 films were grown by ALD, and the electrical properties of the films and the SiO2/Si interface were extensively studied. High quality HfO2 films were grown using ALD on a chemical oxide. The dependence of interfacial quality on the thickness of the chemical oxide was studied. Finally I studied growth of HfO2 on two innovative interfacial layers, an interfacial layer grown by in-situ ALD ozone/water cycle exposure and an interfacial layer of etched thermal and RTP SiO2. The effectiveness of growth of high-quality HfO2 using the two interfacial layers are comparable to that of the chemical oxide. The interfacial properties are studied in details using XPS and ellipsometry.

Body mounted germanium substrate solar cell arrays form the faces of many small satellite designs to provide the primary power source on orbit. High efficiency solar cells are made affordable for university satellite programs as triangular devices trimmed from wafer scale solar cells. The smaller cells allow array designs to pack tightly around antenna mounts and payload instruments, giving the board design flexibility. One objective of this work is to investigate the reliability of solar cells attached to FR-4 printed circuit boards. FR-4 circuit boards have significantly higher thermal expansion coefficients and lower thermal conductivities than germanium. This thermal expansion coefficient mismatch between the FR-4 board and the components causes concern for the power system in terms of failures seen by the solar cells. These failures are most likely to occur with a longer orbital lifetime and an extended exposure to harsh environments. This work compares various methods of attaching solar cells to printed circuit boards, using solder paste alone and with a silicone adhesive, and considering the application of these adhesives by comparing the solder joints when printed by screen versus a stencil. An environmental test plan was used to compare the survivability and performance of the solar arrays.

The frequency demands of radiating systems are moving into the terahertz band with potential applications that include sensing, imaging, and extremely broadband communication. One commonly used method for generating and detecting terahertz waves is to excite a voltage-biased photoconductive antenna with an extremely short laser pulse. The pulsed laser generates charge carriers in a photoconductive substrate which are swept onto the metallic antenna traces to produce an electric current that radiates or detects a terahertz band signal. Therefore, analysis of a photoconductive antenna requires simultaneous solutions of both semiconductor physics equations (including drift-diffusion and continuity relations) and Maxwell’s equations. A multi-physics analysis scheme based on the Discontinuous-Galerkin Finite-Element Time-Domain (DGFETD) is presented that couples the semiconductor drift-diffusion equations with the electromagnetic Maxwell’s equations. A simple port model is discussed that efficiently couples the two equation sets. Various photoconductive antennas were fabricated using TiAu metallization on a GaAs substrate and the fabrication process is detailed. Computed emission intensities are compared with measured data. Optimized antenna designs based on the analysis are presented for a variety of antenna configurations.