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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
91

Integrated Logic Synthesis Using Simulated Annealing

Färm, Petra January 2007 (has links)
A conventional logic synthesis flow is composed of three separate phases: technologyindependent optimization, technology mapping, and technology dependentoptimization. A fundamental problem with such a three-phased approach is thatthe global logic structure is decided during the first phase without any knowledge ofthe actual technology parameters considered during later phases. Although technologydependent optimization algorithms perform some limited logic restructuring,they cannot recover from fundamental mistakes made during the first phase, whichoften results in non-satisfiable solutions.We present a global optimization approach combining technology independentoptimization steps with technology dependent objectives in an annealing-basedframework. We prove that, for the presented move set and selection distribution, detailedbalance is satisfied and thus the annealing process asymptotically convergesto an optimal solution. Furthermore, we show that the presented approach cansmoothly trade-off complex, multiple-dimensional objective functions and achievecompetitive results. The combination of technology independent and technologydependent objectives is handled through dynamic weighting. Dynamic weightingreflects the sensitivity of the local graph structures with respect to the actual technologyparameters such as gate sizes, delays, and power levels. The results showthat, on average, the presented advanced annealing approach can improve the areaand delay of circuits optimized using the Boolean optimization technique providedby SIS with 11.2% and 32.5% respectively.Furthermore, we demonstrate how the developed logic synthesis framework canbe applied to two emerging technologies, chemically assembled nanotechnology andmolecule cascades. New technologies are emerging because a number of physicaland economic factors threaten the continued scaling of CMOS devices. Alternativesto silicon VLSI have been proposed, including techniques based on molecularelectronics, quantum mechanics, and biological processes. We are hoping that ourresearch in how to apply our developed logic synthesis framework to two of theemerging technologies might provide useful information for other designers movingin this direction. / QC 20100709
92

Design of control system for metal dosing and transfer

Haichun, Cao January 2009 (has links)
Developing an automatic control system from original stage is quite time consuming, a lot of works must be done before the final result, in order to save designing time and money, a systematic way to carry through development is necessary. This project will give an experience about using a systemic method to develop an automatic control system for metal dosing and transfer from original stage. The project will be divided into several different phases, and each phase focuses on some different important tasks. In this project a research of PLCs and stepper motors and then give suitable suggestions of selection of them have been done. One of important roles for this project is to develop a prototype machine and use computer to model and simulate prototype and whole machine, therefore, in this project, using SDL assistant with Matlab to model and simulate both prototype and whole machine have been processed. Because of some unexpected condition, this project doesn’t include real PLC programming.
93

Investigation of Skew on Differential High Speed Links

Ji, Jie January 2008 (has links)
Skew in telecommunication normally means the difference in arrival time of bits transmitted at the same time in differential transmission. As an increasing of transmission data bit rate and more importantly, a data and clock signal rise time of become faster, digital system interconnects became behaving as transmission line. The high speed signals become microwave in nature. The problem is that modern digital designs and verifications require knowledge that has formerly not been needed for a data bit rate of below than 100Mbit but also at the higher frequency range as 5 to 15GHz, however, most references on the necessary subjects are too abstract to be immediately applicable to the skew. For this reason a new method to investigate the skew were introduced, and with which, test board were measured. Since the test boards are made in devise material, and lines on the boards are configured out in distinct structures. In this paper, several methods were applied to find out the skew, and by comparing the results, it could be found that how factors affect the skew, not only the material factor, but some manufactory reason.
94

Detektering samt minskning av Underhållsskuld / Detection and reduction of maintenancefaults

Hansson, Erik January 2008 (has links)
Detta exjobb är skapat utifrån ett uppdrag av ABB´s underhållssida på CloettaFazers fabrik i Ljungsbro utanför Linköping. Uppdraget består av att skapa en mall som ska användas för att detektera och minska underhållsskulden på en typisk industrilina. Den skapade underhållsskuldsmallen ska sedan realiseras på en verklig industrilina i CloettaFazers fabrik i Ljungsbro.Exjobbet är uppdelat i fyra delar, där den första delen behandlar bakgrunden, syftet och metoden. Den andra delen behandlar hur själva skapandet av mallen går till, samt hur den ska användas för att detektera och minska underhållsskuld i en typisk industrilina. Den tredje delen behandlar hur mallen fungerar i praktiken, i detta fall realiseras mallen på industrilinan Bridgepack. Den fjärde och avslutande delen behandlar exjobbets resultat och avslutande diskussion.Tanken bakom skapandet av mallen var att skapa en lättförstålig mall som hjälper till att hitta grundorsaken till problemet. Alltså inte bara lösning som löser det direkta felet, utan även att man hittar grundorsaken som hindrar att felet uppstår igen. Idéer och inspiration till detta tillvägagångssätt har mestadels hämtats från filosofin ”The Toyota Way” som Toyota använder sig av i sin verkstadsindustri.Realiseringen av mallen på den aktuella industrilinan Bridgepack har gett blandade resultat. Dels för att i början av exjobbet antogs att många av orsakerna varför inte Bridgepacken fungerade som önskats, berodde på att dom elektriska systemen som styr Bridgepacken började bli slitna och inte lika tillförlitliga som dom en gång varit. Dock så har det visat sig under exjobbets gång att industrilinans brister snarare har berott på mer mekaniska fel än dom elektroniska systemen. Resultaten som exjobbet främst har visat, är att många enklare mekaniska lösningar kommer att påverka effektiviseringen av produktionskörningen avsevärt.
95

Flit Synchronous Aelite Network on Chip

Subburaman, Mahesh Balaji January 2008 (has links)
The deep sub micron process technology and application convergence increases the design challenges in System-on-Chip (SoC). The traditional bus based on chip communication are not scalable and fails to deliver the performance requirements of the complex SoC. The Network on Chip (NoC) has been emerged as a solution to address these complexities of a efficient, high performance, scalable SoC design. The Aethereal NoC provides the latency and throughput bounds by pipelined timedivision multiplexed (TDM) circuit switching architecture. A global synchronous clock defines the timing for TDM, which is not beneficial for decreasing process geometry and increasing clock frequency. This thesis work focuses on the Aelite NoC architecture. The Aelite NoC offering guaranteed services exploits the complexities of System-on-Chip design with real time requirements. The Aelite NoC implements flit synchronous communication using mesochronous and asynchronous links.
96

AC Ion Current Interface

Nilsson, Johan January 2009 (has links)
An effective way to extract combustion parameters from a spark ignited engine is to measure the level of ionization. One way to do this is to use the spark plug as a sensor. Until now this has been achieved by applying a DC voltage over the spark gap which causes an electrical field. The electrical field together with the ionization process gives cause to an ion current which can be measured and analyzed. Previous research suggests that it would be beneficial to replace the DC voltage with an AC voltage. The focus in this thesis is on the hardware and how to best implement an AC voltage to the existing ion sensing system. Both simulation- and hardware models will be constructed. These models will be tested and analyzed to evaluate both benefits and drawbacks of an AC ion current sensing system.
97

Design av stimuligenerator för radarmålsökare / Design of a stimuli generator for radar target seekers

Brodin, Johan January 2009 (has links)
During the development of microwave based sensors such as radar target seekers, input signals are needed to verify the performance of the system. Therefore, a channel board has been developed by previous thesis projects at Saab Bofors Dynamics. It uses a technique called Digital Radio Frequency Memory (DRFM). The purpose of this board is to sample and digitally store radio frequency signals in order to reconstruct them after a certain delay. The aim of this thesis project was to use the channel board named above to construct a portable instrument for generation of stimuli signals. This assignment has been divided into two tasks: firstly, to construct and put together the hardware components and secondly, to implement a graphical user interface for the instrument. An embedded computer from VIATechnologies with the form factor Nano-ITX was chosen. Since Ethernet is the communication interface on the channel board, a commercial network router was used establish the connection between the channel board and the computer. In order to simplify future development the first step was to implement device drivers that support all functions of the channel board. These drivers where then used for the design of a graphical user interface. The result of this project was a portable stimuli generator with a graphical user interface which can be used for target echo generation as well as a generic signal generator. The functionality of the instrument was verified through generation of known signal patterns which were measured and proven to be correct with a digital oscilloscope. / Under utvecklingen av sensorer baserade på mikrovågsteknik, exempelvis radarmålsökare behövs insignaler som efterliknar verkligheten för att verifiera systemens prestanda. För detta ändamål har Saab Bofors Dynamics i samband med tidigare examensarbeten utvecklat ett kanalkort med en teknik som kallas Digitalt Radiofrekvent Minne (DRFM). Syftet med detta kort är att sampla och lagra högfrekventa radiovågor digitalt, för att efter en valbar tidsfördröjning rekonstruera dessa signaler. I detta examensarbete har kanalkorten använts för att konstruera ett portabelt instrument för generering av godtyckliga stimulisignaler. Arbetet har bestått av två större delmoment, konstruktion och sammansättning av instrumentet samt implementation av ett grafiskt användargränssnitt. Ett inbyggt moderkort på formatet Nano-ITX från VIA Technologies valdes som inbyggd dator och kommunicerar med kanalkorten över Ethernet via en nätverksrouter. För att förenkla utvecklingen av mjukvara inleddes arbetet med att ta fram drivrutiner med stöd för kanalkortets samtliga funktioner. Dessa utnyttjades sedan för att bygga upp instrumentets användargränssnitt och kan med fördel användas vid framtida vidareutveckling. Resultatet blev en portabel stimuligenerator som med det grafiska användargränssnittet kan användas för målekogenerering och som en generisk signalgenerator. Instrumentets funktionalitet verifierades genom att generera kända signalmönster vilka sedan mättes och kontrollerades med ett digitalt oscilloskop.
98

Development of equipment for measuring Ocular Micro-Tremor

Muqdisi, Menhal January 2009 (has links)
No description available.
99

Mean Value Model of the Gas Temperature at the Exhaust Valve / Medelvärdesmodell av gastemperaturen vid avgasventilen

Ainouz, Filip, Vedholm, Jonas January 2009 (has links)
Over the years many investigations of the gas temperature at the exhaust valve have been made. Nevertheless the modeling of the gas temperature still remains an unsolved problem. This master thesis approaches the problem by attempting to model the exhaust gas temperature by using the standard sensors equipped in SI engines, together with an in-cylinder pressure sensor which is needed in order to develop certain models. The concept in the master thesis is based upon a parameterization of the ideal Otto cycle with tuning parameters which all have physical meanings. Input variables required for the parameterization model is obtained from a fix point iteration method. This method was developed in order to improve the estimates of residual gas fraction, residual gas temperature and variables dependent of those, such as temperature at intake valve closing. The mean value model of the temperature, at the exhaust valve, is based upon the assumption of the ideal gas law, and that the burned gases undergoe a polytropic expansion into the exhaust manifold. Input variables to the entire model are intake manifold pressure, exhaust manifold pressure, intake manifold temperature, engine speed, air mass flow, cylinder pressure, air-to-fuel equivalence ratio, volume, and ignition timing. A useful aspect with modeling the exhaust gas temperature is the possibility to implement it in turbo modeling. By modeling the exhaust gas temperature the control of the turbo can be enhanced, due to the fact that energy is temperature dependent. Another useful aspect with the project is that the model can be utilized in diagnostics, to avoid hardware redundency in the creation of the desired residuals.
100

Design och implementation av ett stamningsförebyggande system med DSP teknik

Lindqvist, Fredrik, Bolin, Anders January 2007 (has links)
Uppgiften består i att konstruera och designa en DSP lösning för att förebygga stamning. Genom att en signal tas in på en mikrofon och bearbetas i en DSP därefter skickas ut på en hörlur. Signalen som behandlas i DSP:n ska frekvenshöjas och fördröjas. Pitch och fördröjning ska kunna justeras m.h.a. en omkopplare. Till hjälp fanns utvecklingskortet eZdspF2808 från Texas Instruments och en in/utgångsförstärkare. Tidigare erfarenheter av DSP från Texas Instruments saknades. Att lära känna utvecklingskortet var därför en del av arbetet. Det bestod mest i att läsa användarguider från Texas Instruments hemsida. Utvecklingskortet saknar en DA-omvandlare, en sådan konstruerades. / This thesis describes a system that uses DSP technology to reduce stuttering. One eZdspF2808 development card is used as a test platform. The lack of a DA-converter forced us to construct our own. A software algorithm producing a delay and a pitch was implemented in DSP C programming language.

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