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Sistemas de levitação magnética são inerentemente não-lineares e, quando con- trolados digitalmente, normalmente, esbarram em limitações do hardware empregado. O objetivo desta tese é apresentar aspectos teóricos e práticos durante a aplicação da teoria de controle H1 não-linear em sistemas de levitação magnética. A primeira con- tribuição desta tese é apresentar um procedimento de projeto de um controlador H1 não-linear que utiliza funções de ponderação com dinâmica, obtidas a partir do projeto de um controlador H1 linear. Assim como no caso linear, essas funções de ponderação possibilitam a rejeição de perturbações, ruídos de sensor, aumento da robustez, den- tre outras especificações. A segunda contribuição é apresentar um procedimento de conversão de uma rotina implementada em ponto-flutuante para ponto-fixo, utilizando minimização de norma l1, que foi implementada em um DSP de 32 bits em ponto- fixo. Resultados experimentais também são apresentados, nos quais a performance do controlador não-linear é especificamente avaliada na fase inicial de levitação. / Electromagnetic suspension systems are inherently nonlinear and often face hard- ware limitation when digitally controlled. The goal of this thesis is to present theoretical and practical aspects during the nonlinear H1 control applied on an electromagnetic suspension system. The first contribution is the design of a nonlinear H1 controller, including dynamic weighting functions, obtained from a linear H1 controller. Just as in the linear case, this dynamic weighting functions provide the disturbance and noise sensor rejection, robustness improvement, among other specifications. The second con- tribution is to present a procedure able to translate a floating-point algorithm into a fixed-point algorithm by using l1 norm minimization due to conversion error, which was then implemented into a 32-bit fixed-point DSP. Experimental results are also pre-sented, in which the performance of the nonlinear controller is evaluated specifically in the initial suspension phase.

O principal objetivo deste trabalho é estudar a existência de soluções para alguns problemas de valores de contorno de equações diferenciais ordinárias não lineares em dimensão finita e infinita. Todos os sistemas considerados nesta investigação são transformados em equações funcionais nas quais o objetivo é encontrar um ponto fixo de um oportuno operador definido em um espaço de funções (que depende do problema estudado). Para isso, faremos uso do grau de Leray-Schauder e de um conceito de grau topológico, devido a R. Nussbaum, para perturbações não compactas da identidade em espaços de Banach. / The main purpose of this work is to study the existence of solutions to some boundary value problems for nonlinear ordinary differential equations in finite and infinite dimension. All systems considered in this research are transformed into functional equations in which the objective is to find a fixed point of a suitable operator defined in a space of functions (which depends on the studied problem). To do this, we use the Leray-Schauder degree and a concept of topological degree due to R. Nussbaum for non-compact perturbations of identity in Banach spaces.

L'accélération matérielle désigne l'utilisation d'architectures spécialisées pour effectuer certaines tâches plus vite ou plus efficacement que sur du matériel générique. Les accélérateurs ont traditionnellement été utilisés dans des environnements contraints en ressources, comme les systèmes embarqués. Cependant, avec la fin des règles empiriques ayant régi la conception de matériel pendant des décennies, ces quinze dernières années ont vu leur apparition dans les centres de calcul et des environnements de calcul haute performance. Les FPGAs constituent une plateforme d'implémentation commode pour de tels accélérateurs, autorisant des compromis subtils entre débit/latence, surface, énergie, précision, etc. Cependant, identifier de bons compromis représente un défi, dans la mesure où l'espace de recherche est généralement très large. Cette thèse propose des techniques de conception pour résoudre ce problème. Premièrement, nous nous intéressons aux compromis entre performance et précision pour la conversion flottant vers fixe. L'utilisation de l'arithmétique en virgule fixe au lieu de l'arithmétique flottante est un moyen efficace de réduire l'utilisation de ressources matérielles, mais affecte la précision des résultats. La validité d'une implémentation en virgule fixe peut être évaluée avec des simulations, ou en dérivant des modèles de précision analytiques de l'algorithme traité. Comparées aux approches simulatoires, les méthodes analytiques permettent une exploration plus exhaustive de l'espace de recherche, autorisant ainsi l'identification de solutions potentiellement meilleures. Malheureusement, elles ne sont applicables qu'à un jeu limité d'algorithmes. Dans la première moitié de cette thèse, nous étendons ces techniques à des filtres linéaires multi-dimensionnels, comme des algorithmes de traitement d'image. Notre méthode est implémentée comme une analyse statique basée sur des techniques de compilation polyédrique. Elle est validée en la comparant à des simulations sur des données réelles. Dans la seconde partie de cette thèse, on se concentre sur les stencils itératifs. Les stencils forment un motif de calcul émergeant naturellement dans de nombreux algorithmes utilisés en calcul scientifique ou dans l'embarqué. À cause de cette diversité, il n'existe pas de meilleure architecture pour les stencils de façon générale : chaque algorithme possède des caractéristiques uniques (intensité des calculs, nombre de dépendances) et chaque application possède des contraintes de performance spécifiques. Pour surmonter ces difficultés, nous proposons une famille d'architectures pour stencils. Nous offrons des paramètres de conception soigneusement choisis ainsi que des modèles analytiques simples pour guider l'exploration. Notre architecture est implémentée sous la forme d'un flot de génération de code HLS, et ses performances sont mesurées sur la carte. Comme les résultats le démontrent, nos modèles permettent d'identifier les solutions les plus intéressantes pour chaque cas d'utilisation. / Hardware acceleration is the use of custom hardware architectures to perform some computations faster or more efficiently than on general-purpose hardware. Accelerators have traditionally been used mostly in resource-constrained environments, such as embedded systems, where resource-efficiency was paramount. Over the last fifteen years, with the end of empirical scaling laws, they also made their way to datacenters and High-Performance Computing environments. FPGAs constitute a convenient implementation platform for such accelerators, allowing subtle, application-specific trade-offs between all performance metrics (throughput/latency, area, energy, accuracy, etc.) However, identifying good trade-offs is a challenging task, as the design space is usually extremely large. This thesis proposes design methodologies to address this problem. First, we focus on performance-accuracy trade-offs in the context of floating-point to fixed-point conversion. Usage of fixed-point arithmetic instead of floating-point is an affective way to reduce hardware resource usage, but comes at a price in numerical accuracy. The validity of a fixed-point implementation can be assessed using either numerical simulations, or with analytical models derived from the algorithm. Compared to simulation-based methods, analytical approaches enable more exhaustive design space exploration and can thus increase the quality of the final architecture. However, their are currently only applicable to limited sets of algorithms. In the first part of this thesis, we extend such techniques to multi-dimensional linear filters, such as image processing kernels. Our technique is implemented as a source-level analysis using techniques from the polyhedral compilation toolset, and validated against simulations with real-world input. In the second part of this thesis, we focus on iterative stencil computations, a naturally-arising pattern found in many scientific and embedded applications. Because of this diversity, there is no single best architecture for stencils: each algorithm has unique computational features (update formula, dependences) and each application has different performance constraints/requirements. To address this problem, we propose a family of hardware accelerators for stencils, featuring carefully-chosen design knobs, along with simple performance models to drive the exploration. Our architecture is implemented as an HLS-optimized code generation flow, and performance is measured with actual execution on the board. We show that these models can be used to identify the most interesting design points for each use case.

O principal objetivo deste trabalho é estudar a existência de soluções para alguns problemas de valores de contorno de equações diferenciais ordinárias não lineares em dimensão finita e infinita. Todos os sistemas considerados nesta investigação são transformados em equações funcionais nas quais o objetivo é encontrar um ponto fixo de um oportuno operador definido em um espaço de funções (que depende do problema estudado). Para isso, faremos uso do grau de Leray-Schauder e de um conceito de grau topológico, devido a R. Nussbaum, para perturbações não compactas da identidade em espaços de Banach. / The main purpose of this work is to study the existence of solutions to some boundary value problems for nonlinear ordinary differential equations in finite and infinite dimension. All systems considered in this research are transformed into functional equations in which the objective is to find a fixed point of a suitable operator defined in a space of functions (which depends on the studied problem). To do this, we use the Leray-Schauder degree and a concept of topological degree due to R. Nussbaum for non-compact perturbations of identity in Banach spaces.

Em Complexidade Descritiva investigamos o uso de logicas para caracterizar classes problemas pelo vies da complexidade. Desde 1974, quando Fagin provou que NP e capturado pela logica existencial de segunda-ordem, considerado o primeiro resultado da area, outras relac~oes entre logicas e classes de complexidade foram estabelecidas. Os resultados mais conhecidos normalmemte envolvem logica de primeira-ordem e suas extens~oes, e classes de complexidade polinomiais em tempo ou espaco. Alguns exemplos sÃo que a logica de primeira-ordem estendida com o operador de menor ponto xo captura a clsse P e que a logica de segunda-ordem estendida com o operador de fecho transitivo captura a classe PSPACE. Nesta dissertaÃÃo, analisaremos inicialmente a expressividade de algumas logicas modais com relacÃo ao problema de decisÃo REACH e veremos que e possvel expressa-lo com as logicas temporais CTL e CTL. Analisaremos tambem o uso combinado de logicas de ordem superior com o operador de menor ponto xo e obteremos como resultado que cada nvel dessa hierarquia captura cada nvel da hierarquia determinstica em tempo exponencial. Como corolario, provamos que a hierarquia de HOi(LFP) nÃo colapsa, ou seja, HOi(LFP) HOi+1(LFP) / In Descriptive Complexity, we investigate the use of logics to characterize computational classes os problems through complexity. Since 1974, when Fagin proved that the class NP is captured by existential second-order logic, considered the rst result in this area, other relations between logics and complexity classes have been established. Wellknown results usually involve rst-order logic and its extensions, and complexity classes in polynomial time or space. Some examples are that the rst-order logic extended by the least xed-point operator captures the class P and the second-order logic extended by the transitive closure operator captures the class PSPACE. In this dissertation, we will initially analyze the expressive power of some modal logics with respect to the decision problem REACH and see that is possible to express it with temporal logics CTL and CTL. We will also analyze the combined use of higher-order logics extended by the least xed-point operator and obtain as result that each level of this hierarchy captures each level of the deterministic exponential time hierarchy. As a corollary, we will prove that the hierarchy of HOi(LFP), for i 2, does not collapse, that is, HOi(LFP) HOi+1(LFP)

Sistemas de levitação magnética são inerentemente não-lineares e, quando con- trolados digitalmente, normalmente, esbarram em limitações do hardware empregado. O objetivo desta tese é apresentar aspectos teóricos e práticos durante a aplicação da teoria de controle H1 não-linear em sistemas de levitação magnética. A primeira con- tribuição desta tese é apresentar um procedimento de projeto de um controlador H1 não-linear que utiliza funções de ponderação com dinâmica, obtidas a partir do projeto de um controlador H1 linear. Assim como no caso linear, essas funções de ponderação possibilitam a rejeição de perturbações, ruídos de sensor, aumento da robustez, den- tre outras especificações. A segunda contribuição é apresentar um procedimento de conversão de uma rotina implementada em ponto-flutuante para ponto-fixo, utilizando minimização de norma l1, que foi implementada em um DSP de 32 bits em ponto- fixo. Resultados experimentais também são apresentados, nos quais a performance do controlador não-linear é especificamente avaliada na fase inicial de levitação. / Electromagnetic suspension systems are inherently nonlinear and often face hard- ware limitation when digitally controlled. The goal of this thesis is to present theoretical and practical aspects during the nonlinear H1 control applied on an electromagnetic suspension system. The first contribution is the design of a nonlinear H1 controller, including dynamic weighting functions, obtained from a linear H1 controller. Just as in the linear case, this dynamic weighting functions provide the disturbance and noise sensor rejection, robustness improvement, among other specifications. The second con- tribution is to present a procedure able to translate a floating-point algorithm into a fixed-point algorithm by using l1 norm minimization due to conversion error, which was then implemented into a 32-bit fixed-point DSP. Experimental results are also pre-sented, in which the performance of the nonlinear controller is evaluated specifically in the initial suspension phase.

Abstract The controversy about the monetary regime of the EC between the Britain and the other member countries made economists to study currency competition and currency substitution widely. This dissertation constructs a one-good, two-currency Brock model in discrete time. In the determinate model, we show the Gresham’s Law results as those in Weil’s. And we demonstrate the existence and uniqueness of a class of first-order Markov stationary sunspot equilibria. The existence of sunspot equilibria expresses another situation of currency competition that future situations may depend on the possibility of people’s expectations, not the growth rates of currencies and tries to provide another explain for the phenomena above.Britain and the other member countries made economists totudy currency competition and currency substitution widely .his dissertation constructs a one - good , two - currencyrock model in discrete time . In the determinate model , wehow the Gresham' s Law results as those in Weil's . And weemonstrate the existence and uniqueness of a class of firstorder Markov stationary sunpot equilibria . The existencef sunspot equilibria expresses another situation of currencyompetition that future situations may depend on the possibi-ity of people' s expectations , not the growth rates of cu -rencies and tries to provide another explain for the pheno -ena above .

The thesis deals with a general access to topological transversality in uniform spaces. / Die Arbeit behandelt einen allgemeinen Zugang zur Topologischen Transversalität in uniformen Räumen.

Η χρήση πολλαπλών κεραιών παίζει πλέον ένα πολύ σημαντικό ρόλο στη βελτίωση των ραδιοτηλεπικοινωνιών. Για το λόγο αυτό, ο τομέας των τηλεπικοινωνιακών συστημάτων πολλαπλών κεραιών μετάδοσης – λήψης (συστήματα ΜΙΜΟ) βρίσκεται στο προσκήνιο της ασύρματης έρευνας. Πρόσφατα, αποτελέσματα ερευνών έδειξαν ότι υπάρχει δυνατότητα αύξησης της χωρητικότητας στα ασύρματα τηλεπικοινωνιακά συστήματα χρησιμοποιώντας τεχνικές διαφοροποίησης μεταξύ πομπού – δέκτη (antenna diversity), δηλαδή δημιουργίας πολλαπλών ανεξάρτητων καναλιών ανάμεσα τους. Στην παρούσα εργασία μελετούνται τεχνικές κωδικοποίησης που εκμεταλλεύονται τη χωρική διαφοροποίηση κάνοντας χρήση χωροχρονικών κωδικών (space – time coding). Η μελέτη εστιάζεται στη χρήση χωροχρονικών κωδικών ανά μπλοκ από την πλευρά του πομπού, εξαιτίας της απλότητας υλοποίησης τους καθώς και της ικανότητας υποστήριξης πολλαπλών κεραιών από τη πλευρά του σταθμού βάσης. Η ανάλυσή τους γίνεται με βάση την εφαρμογή τους σε συστήματα που χρησιμοποιούν διαμόρφωση με πολυπλεξία ορθογώνιων φερουσών (OFDM). Η διαμόρφωση αυτή επιλέχθηκε γιατί υποστηρίζει υψηλούς ρυθμούς δεδομένων στα ασύρματα συστήματα και δείχνει άριστη συμπεριφορά σε κανάλια με επιλεκτική παραμόρφωση στη συχνότητα. Στη συνέχεια μελετώνται αλγόριθμοι επαναληπτικής αποκωδικοποίησης, δίνοντας έμφαση σε ένα ευρέως διαδεδομένο αλγόριθμο, τον Μέγιστο εκ των Υστέρων (MAP). Αναλύονται διεξοδικά τα βήματα του, καθώς και διάφορες τροποποιήσεις – βελτιστοποιήσεις του. Οι επαναληπτικοί αλγόριθμοι αποκωδικοποίησης αποτελούν πλέον ένα πολύ ισχυρό εργαλείο για την αποκωδικοποίηση Forward Error Correction κωδικοποιήσεων με χρήση συνελικτικών κωδικών, προσδίδοντας στα συστήματα αποδόσεις κοντά στο όριο του Shannon. Τέλος, πραγματοποιούνται κατάλληλες υλοποιήσεις που προέκυψαν από το συνδυασμό των εν λόγω αλγορίθμων επαναληπτικής αποκωδικοποίησης με τους χωροχρονικούς κώδικες ανά μπλοκ πάνω σε ένα σύστημα κεραιών με χρήση OFDM. Γίνεται σύγκριση της απόδοσης των συστημάτων αυτών με βάση την αντίστοιχη υλοποίηση του εκάστοτε αλγορίθμου επαναληπτικής αποκωδικοποίησης και μελετούνται σε βάθος διάφορες τροποποιήσεις που μπορούν δεχθούν με κριτήριο τη χαμηλή πολυπλοκότητα υλοποίησης. Για την αξιολόγηση της απόδοσης, γίνεται μία περαιτέρω σύγκριση με χρήση αναπαράστασης σταθερής υποδιαστολής και εξάγονται σειρά συμπερασμάτων από τις πειραματικές μετρήσεις που προέκυψαν. / The use of multiple antennas is an essential issue in telecommunications, nowadays. So, multiple input – multiple output systems (MIMO) has attracted a lot of attention in wireless research. Lately, it has been shown that it can be an improvement in the capacity of wireless communication systems by using antenna diversity, that’s different independent channels between transmitter and receiver. In this thesis, we study coding techniques that exploit space diversity by using space – time codes. Particularly, we focus on space – time block coding (STBC) from the transmitter’s point of view, because of the simplicity of its implementation and the ability to support multiple antennas at the base stations. The analysis is based on the systems that use Orthogonal Frequency Division Multiplexing Systems (OFDM). This technique was chosen because it can support high data rates and it behaves very well in a frequency selective fading channel. Moreover, we study iterative decoding algorithms and we focus on a very well known algorithm, the Maximum A Posteriori (MAP). There, we analyze its steps and its modifications and improvements. The iterative decoding algorithms are a cornerstone on decoding Forward Error Correction codes, such as Convolutional codes, almost reaching the Shannon limit. Finally, there are different kinds of implementations using suitable iterative decoding algorithms in concatenation with space – time block coding with antennas and ODFM. We compare the performance of the corresponding systems and investigate the complexity trying to maintain it in a low level. For a thorough investigation, we also use fixed point arithmetic in these implementations.