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Temperature robust programmable subthreshold circuits through a balanced force approachDegnan, Brian Paul 18 January 2013 (has links)
The subthreshold region of operation has simple physics which allows for a balanced-force approach to behavioral modeling that has shown to be robust to temperature, and a model that encapsulates MOSFET behavior across all operational regions has been developed. The subthreshold region of operation also allows for injection of charge onto floating nodes that allows for persistent storage that can be used in a variety of applications. The combination of charge storage and device modeling has allowed for the development of programmable circuits for digital applications.
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Adaptive Analog VLSI Signal Processing and Neural NetworksDugger, Jeffery Don 26 November 2003 (has links)
Research presented in this thesis provides
a substantial leap from the study of interesting
device physics to fully adaptive analog networks
and lays a solid foundation for future development
of large-scale, compact, low-power adaptive parallel
analog computation systems.
The investigation described here started with
observation of this potential learning capability
and led to the first derivation and characterization of
the floating-gate pFET correlation learning rule.
Starting with two synapses sharing the same error signal,
we progressed from phase correlation experiments
through correlation experiments involving harmonically related sinusoids,
culminating in learning the Fourier series coefficients
of a square wave cite{kn:Dugger2000}.
Extending these earlier two-input node experiments to the general case
of correlated inputs required dealing with
weight decay naturally exhibited by the learning rule.
We introduced a source-follower floating-gate synapse
as an improvement over our earlier source-degenerated floating-gate synapse
in terms of relative weight decay cite{kn:Dugger2004}.
A larger network of source-follower floating-gate synapses was fabricated
and an FPGA-controlled testboard was designed and built.
This more sophisticated system provides an excellent
framework for exploring applications to multi-input, multi-node
adaptive filtering applications.
Adaptive channel equalization provided
a practical test-case illustrating the use
of these adaptive systems in solving real-world problems.
The same system could easily be applied to noise and echo cancellation
in communication systems and system identification tasks in
optimal control problems.
We envision the commercialization of these adaptive analog VLSI
systems as practical products within a couple of years.
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Low-Power Audio Input Enhancement for Portable DevicesYoo, Heejong 13 January 2005 (has links)
With the development of VLSI and wireless communication
technology, portable devices such as personal digital assistants
(PDAs), pocket PCs, and mobile phones have gained a lot of
popularity. Many such devices incorporate a speech recognition
engine, enabling users to interact with the devices using
voice-driven commands and text-to-speech synthesis.
The power consumption of DSP microprocessors has been
consistently decreasing by half about every 18 months, following
Gene's law. The capacity of signal processing, however, is still
significantly constrained by the limited power budget of these
portable devices. In addition, analog-to-digital (A/D) converters
can also limit the signal processing of portable devices. Many
systems require very high-resolution and high-performance A/D
converters, which often consume a large fraction of the limited
power budget of portable devices.
The proposed research develops a low-power audio signal
enhancement system that combines programmable analog signal
processing and traditional digital signal processing. By
utilizing analog signal processing based on floating-gate
transistor technology, the power consumption of the overall
system as well as the complexity of the A/D converters can be
reduced significantly. The system can be used as a front end of
portable devices in which enhancement of audio signal quality
plays a critical role in automatic speech recognition systems on
portable devices. The proposed system performs background audio
noise suppression in a continuous-time domain using analog
computing elements and acoustic echo cancellation in a
discrete-time domain using an FPGA.
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Programmable Analog Techniques For Precision Analog Circuits, Low-Power Signal Processing and On-Chip LearningSrinivasan, Venkatesh 10 July 2006 (has links)
In this work, programmable analog techniques using floating-gate transistors have been developed to design precision analog circuits, low-power signal processing primitives and adaptive systems that learn on-chip. Traditional analog implementations lack programmability with the result that issues such as mismatch are corrected at the expense of area. Techniques have been proposed that use floating-gate transistors as an integral part of the circuit of interest to provide both programmability and the ability to correct for mismatch. Traditionally, signal processing has been performed in the digital domain with analog circuits handling the interface with the outside world. Such a partitioning of responsibilities is inefficient as signal processing involves repeated multiplication and addition operations that are both very power efficient in the analog domain. Using programmable analog techniques, fundamental signal processing primitives such as multipliers have been developed in a low-power fashion while preserving accuracy. This results in a paradigm shift in signal processing. A co-operative analog/digital signal processing framework is now possible such that the partitioning of tasks between the analog and digital domains is performed in a power efficient manner. Complex signal processing tasks such as adaptive filtering that learn the weight coefficients are implemented by exploiting the non-linearities inherent with floating-gate programming. The resulting floating-gate synapses are compact, low-power and offer the benefits of non-volatile weight storage. In summary, this research involves developing techniques for improving analog circuit performance and in developing power-efficient techniques for signal processing and on-chip learning.
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