Present day data processing technology requires very high speed signal processing and data conversion rates. One such application which requires high speed is switched capacitor circuits used in Sigma-Delta modulators. A major active component of switched capacitor circuits is the monolithic operational amplifier(opamp). Because of the relatively poor speed performance of the currently available silicon based technology, such high speed circuits can not be designed. GaAs technology appears to be a promising alternative technology for high speed switched capacitor circuits. One problem with GaAs is the lack of complementary technology. Until now, most of the design of GaAs analog integrated circuits has been implemented using depletion mode n-MESFETs, where operational amplifiers and switched capacitors have been developed by various groups. This thesis develops the techniques for implementation of analog integrated circuits using complementary GaAs Heterojunction Field Effect Transistors(HFETs). Several operational amplifiers have been designed and their performance studied via simulation. The designs studied predict superior high frequency performance for C-HFETs over conventional GaAs MESFET and Silicon CMOS technology. The opamp designs are currently being implemented at Oregon State University for fabrication in the future. / Graduation date: 1993

Present day data processing technology requires very high speed signal processing and data conversion rates. Traditionally, these circuits have been implemented in silicon MOS technology, whose high speed performance is limited, due to inherent material properties. Though relatively immature compared to silicon technology, GaAs integrated circuit technology appears to be a potential vehicle for realizing high-speed circuits because of its high electron mobility and low parasitic capacitance. One major drawback of GaAs technology has been the lack of complementary technology in contrast to silicon where CMOS technology has greatly facilitated the development of analog ICs. This thesis investigates the suitability of complementary GaAs Heterojunction FET integrated circuit technology for the realization of high sample-rate switched-capacitor circuits. In order to yield an accurate device model for the design work, model parameters of both n and p GaAs Heterojunction FET devices are extracted from measurement results. Based on the extraction results, a set of analog building blocks are presented. These circuits include a high bandwidth operational amplifier and a fast settling switch which are essential for high sample-rate circuits. A second order switched-capacitor low pass filter sampling at a clock rate of 100MHz is designed using the above building blocks. The designs studied predict better high frequency performance for C-HFETs compared to Si CMOS technology. / Graduation date: 1994

A study of deep levels of the emitter region of a heterojunction bipolar transistor is investigated using deep level transient spectroscopy (DLTS), deep level admittance spectroscopy (DLAS), thermally stimulated capacitance (TSCAP), and capacitance-voltage (C-V) profiling. The DX center, with an activation energy of 0.45 eV, is the only deep level detected. By varying the DLTS rate window and filling pulse widths, DX is found to be comprise of two closely spaced DX centers, denoted DX1 and DX2. A positive peak observed in the DLTS spectra is attributed to electron capture, not minority carrier emission, and, thus, is an experimental artifact. Finally, the reduction of current gain (β) at low collector current and the effect of the DX center on the switching characteristics of HBTs are briefly discussed. / Graduation date: 1993

Graduation date: 1992

High speed photodetectors are a necessary element in broad band digital and analog optical communication systems. In this thesis easily integrable planar high speed photodetectors made on undoped semi-insulating (SI) GaAs substrates are modeled and tested. The fabrication process of the detectors is fully compatible with GaAs metal-semiconductor field effect transistor (MESFET) processing technology. Interdigitated fingers are used as the contacts to achieve both high sensitivity and large bandwidth. Detectors made with both ohmic and Schottky contacts are fabricated and tested. The equivalent circuit elements of the interdigitated structure are modeled using accurate lumped element circuit models associated with the various discontinuities of the structure. The results of the model agree well with the experimental results as well as with other published results. Numerical simulation of the SI-GaAs metal-semiconductor- metal (MSM) photodetector is performed. The carriers are tracked after an ideal optical pulse is applied and the intrinsic current as a function of time is computed. Then the influence of all the external circuit elements is included and the output current across the load resistor is computed. The simulated response is compared with other published models. The electrical and optical characteristics of the detectors are measured. For ohmic contact detectors, the dark current increases linearly with bias until some critical field is reached beyond which the dark current increases nonlinearly with bias. The time response of the detectors is measured with a 10 ps pulsed laser operating at - 600 nm and also with a pulsed GaAs /AlGaAs semiconductor laser operating at 850 nm. The ohmic and Schottky contact detectors have approximately the same rise time. The fall time of the Schottky contact detector is much smaller than the fall time of ohmic contact detector. The long fall time of the ohmic detector does not depend on the spacing between contacts. This long fall time is due to the large barrier that exists near the ohmic metal/SI-GaAs cathode contact. No such barrier exists for SI-GaAs MSM photodetector. The simulated impulse response of the SI-GaAs MSM photodetector is compared with the measured impulse response. / Graduation date: 1991

The objective of this research has been the study of device properties for emerging wide-bandgap cubic-phase semiconductors. Though the wide-bandgap semiconductors have great potential as high-power microwave devices, many gaps remain in the knowledge about their properties. The simulations in this work are designed to give insight into the performance of microwave high-power devices constructed from the materials in question. The simulation are performed using a Monte Carlo simulator which was designed from the ground up to include accurate, numerical band structures derived from an empirical pseudo-potential model. Improvements that have been made to the simulator include the generalized device structure simulation, the fully numerical final state selector, and the inclusion of the overlap integrals in the final-state selection. The first comparison that is made among the materials is direct-current breakdown. The DC voltage at which breakdown occurs is a good indication of how much power a transistor can provide. It is found that GaAs has the smallest DC breakdown, with 3C-SiC and ZB-GaN being over 3 times higher. This follows what is expected and is discussed in detail in the work. The second comparison made is the radio-frequency breakdown of the transistors. When devices are used in high-frequency applications it is possible to operate them beyond DC breakdown levels. This phenomenon is caused by the reaction time of the carriers in the device. It is important to understand this effect if these materials are used in a high-frequency application, since this effect can cause a change in the ability of a material to produce high-power devices. MESFETs made from these materials are compared and the results are discussed in detail.

The performance scaling of metal-oxide-semiconductor field-effect-transistors (MOSFETs) has been historically achieved through shrinking the gate length of transistors for over four decades. Addressing the current challenges with CMOS scaling, the 2005 edition of International Technology Roadmap for Semiconductors has predicted the need for so-called technology boosters involving new materials for the gate dielectric and the channel as well as innovative structures. Theoretical studies suggest that the incorporation of high-mobility channel materials such as germanium and III-Vs could outperform bulk Si technology in terms of switching characteristics. Hence, this has recently led to tremendous research activity to explore the prospects of III-V materials for CMOS applications. Nevertheless, technological challenges such as formation of highquality interface between gate dielectric and III-V channel have hindered the demonstration of enhancement-mode III-V MOSFETs. Hence, tremendous effort has been devoted to study the exact origin of Fermi level pinning at the oxide/III-V interface. On the other hand, the advent of high-k materials has opened up the possibility of exploring new channel materials, for which it is challenging to achieve high-quality interface analogous to that of SiO2 on Si. Lately, III-Vs have been extensively explored in order to find compatible gate dielectrics which can unpin the Fermi level at the interface. Amongst various schemes, atomic layer deposition of high-k dielectrics offers some unique advantages such as reduction of GaAs interfacial oxides upon high-k deposition through an appropriate choice of precursor chemistry. The chief focus of this dissertation is to develop a simple wet clean process prior to high-k deposition, suitable for III-V substrates. The impact of various chemical treatments of GaAs substrates on the properties of high-k/GaAs interface was studied through extensive material and electrical characterization methods. The suitability of the ALD-grown high-k gate dielectrics on GaAs for MOSFET fabrication was explored. Charge trapping was found to result in significant errors in mobility extraction in high-k GaAs interface, where the role of high-k is not well understood. Hence, pulsed I-V and QV measurements and galvanomagnetic effects were utilized in order to directly measure the inversion charge in the channel without being affected by the charge traps as much as possible. It was also found that the material studies on GaAs substrates can be readily extended to other III-V channels, such as InGaAs. / text

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We present experimental studies based on all three methods by which the generation of squeezed light in semiconductors has thus far been demonstrated experimentally: Fourwave mixing, multi-photon absorption and direct generation at the source. Four-wave mixing was used to generate femtosecond-pulsed quadrature squeezed light by cross-phase modulation in single-crystal hexagonal CdSe at wavelengths between 1.42 and 1.55 μm. We measured 0.4 dB squeezing (1.1 dB is inferred at the crystal) using 100 fs pulses. The wavelength and the intensity dependence, as well as variations in the local oscillator configuration were investigated. At higher intensities squeezing was shown to deteriorate owing to competing nonlinear processes. We also characterised the nonlinear optical properties of CdSe in this wavelengths range using an interferometric autocorrelator. In addition, we studied the feasibility of extending this technique to AlGaAs waveguides. The key problems are addressed and solutions are proposed. In a different experiment we used an AlGaAs waveguide to demonstrate for the first time photon-number squeezing by multi-photon absorption. By tuning the pump energy through the half bandgap energy we could effectively select two- or three-photon absorption as the dominant mechanism. Squeezing by these two mechanisms could be clearly distinguished and was found to be in good agreement with longstanding theoretical predictions. We also established the generality of the effect, by demonstrating the same mechanism in organic semiconductors, where it led to the first ever observation of squeezed light in an organic material. Finally, we present our measurements of photon-number squeezing in high-efficiency double heterojunction AlGaAs light-emitting diodes. We measured squeezing of up to 2.0 dB. In addition, we observed quantum noise correlations when several of these devices were connected in series.

Bibliography: leaves 200-207. / xi, 207 leaves : ill. ; 20 cm. / Title page, contents and abstract only. The complete thesis in print form is available from the University Library. / The aim of this thesis is to design and implement the hardware mapping of critical paths of a GaAs Core Processor for a Solid Modelling Accelerator. The solid modelling accelerator is designed using GaAs/CMOS/B:CMOS unified technology. High speed GaAs technology is used in the core processor to deal with floating point intensive calculations, while CMOS technology is used where high speed outputs are not required. / Thesis (Ph.D.)--University of Adelaide, Dept. of Electrical and Electronic Engineering, 1996