Thesis (M. Phil.)--Hong Kong University of Science and Technology, 2002. / Includes bibliographical references (leaves 35-37). Also available in electronic version. Access restricted to campus users.

Thesis (Ph. D.)--Oregon Graduate Institute of Science & Technology, 1994.

Thesis (M. Phil.)--University of Hong Kong, 2005. / Title proper from title frame. Also available in printed format.

Thesis (Ph. D.)--Florida State University, 2005. / Advisor: Dr. Jim P. Zheng, Florida State University, College of Engineering, Dept. of Electrical and Computer Engineering. Title and description from dissertation home page (viewed Sept. 15, 2005). Document formatted into pages; contains xii, 96 pages. Includes bibliographical references.

Thesis (Ph. D. in Physics)--Vanderbilt University, Dec. 2006. / Title from title screen. Includes bibliographical references.

Thesis (Ph. D.)--University of Texas at Austin, 2004. / Supervisor: Dennis G. Deppe. Vita. Includes bibliographical references.

Thesis (Ph. D.)--University of Oregon, 2006. / Typescript. Includes vita and abstract. Includes bibliographical references (leaves 128-137). Also available for download via the World Wide Web; free to University of Oregon users.

The objective of this dissertation is the development of the necessary processing steps needed to manufacture infrared photodiodes on InAs1-xSbx material. Preliminary surface preparation steps were performed on both InAs and InSb material, thus covering both possible extremes of the antimony mole fraction. The first experiments endeavoured to characterise the effect of several possible etchants with regards to etch rate, repeatability, limitations for photolithographic patterning and the resultant surface roughness. The etchants investigated include a lactic acid based etchant, a sulphuric acid based etchant, an acetic acid based etchant, an ammonium based etchant, a hydrochloric acid based etchant as well as an organic rinse procedure. These cleaning and etching steps were evaluated at several temperatures. Measurements were performed on an Alpha Step stylus profiler as well as an atomic force microscope. Metal-insulator-semiconductor capacitor devices were manufactured, on both InAs and InSb material, in order to investigate the effects of the above-mentioned etchants combined with surface passivation techniques in terms of surface state densities. Capacitance-versus-bias voltage measurements were done to determine the resultant surface state densities and to compare these to the surface state density of an untreated reference sample. The surface passivation techniques included KOH, Na2S as well as (NH4)2S anodisation. Auger electron spectroscopy measurements were done on InAs and InSb material in order to examine possible surface contamination due to the etchants as well as combinations of these etching and anodisation procedures. The extent of surface coverage by contaminants as well as by the intrinsic elements was measured. The results of the cleaning and etching as well as the surface passivation studies were used to manufacture photovoltaic infrared diodes on an MOCVD (metal oxide chemical vapour deposition) grown p-InAs0.91Sb0.09/i- InAs0.91Sb0.09/n-GaSb structure. Current-versus-voltage and electro-optical measurements were performed on the these diodes in order to evaluate the effect of sulphuric acid based etching combined with KOH, Na2S or (NH4)2S anodisation on the detector performance. The results of surface passivated structures were compared to those of an unpassivated reference detector.

The object of the work described in this thesis was to develop GaAs integrated circuit modeling techniques based on a modified version of SPICE 2, then layout, fabricate, model and test ion implanted GaAs MESFET integrated sample and hold circuits. A large signal GaAs MESFET model was used in SPICE to evaluate the relative performance of inverted common drain logic (ICDL) digital integrated circuits compared to other circuit configurations. The integrated sample and hold subsequently referred to as an integrated sampling amplifier block(ISAB), uses a MESFET switch with either one or two guard gates to suppress strobe feedthrough. Performance guidelines suggested by the project sponsor indicate an optimal switch sampling pulse width capability of 25 ps with 5 ps rise and fall time. Guard gates are included in the switch layout to evaluate pulse feedthrough minimization. The project sponsor suggested -20 dB pulse feedthrough isolation and minimum sampling switch off isolation of -20 dB at 10 GHz as project guidelines. Simulations indicate that a 0.5 µm gate length process approaches the suggested performance guidelines. A mask layout was designed and modeled including both selective implant and refractory self aligned gate processes. The refractory self aligned gate process plasma etched t-gate structure produces a sub 0.5 µm gate length. / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate

For VLSI applications, it is essential to have consistent device characteristics for devices fabricated on different fabrication runs, on different wafers, and especially across a single wafer. MESFETs fabricated on GaAs have been found to have an orientation dependence in their threshold voltage and other characteristics. For MESFETs with gate length less than 2 μm, changing the device orientation can so significantly alter the device characteristics that it must be considered during the transistor design stage. The causes for the orientation dependence in the device characteristics have been suggested to be the piezoelectric property of GaAs and stress in the substrate. Stress produced by the encapsulating dielectric film generates a polarization charge density in the substrate. If the magnitude of the polarization charge density is large enough to alter the channel doping profile, then the device characteristics are changed. In this thesis, the effects of stress on GaAs MESFET device characteristics were studied by modelling and experimental works. In the modelling part, polarization charge densities under the gate of an encapsulated MESFET were calculated by using the so called distributed force model and the edge concentrated model. The distributed force model is a much better model because it describes more realistically the stress distribution in the film and in the substrate. It should provide a much more accurate calculation of the induced polarization charge density. The results show that the polarizarition charge densities calculated by the two models have similar distribution pattern, but the magnitudes are very different. With an identical set of conditions, a much larger polarization charge density is predicted by the edge concentrated model. In addition, the distributed force model distinguishes different films by a "hardness" value, based on their elastic property, whereas the edge concentrated model does not. A film with a larger "hardness" value is predicted to generate a larger polarization charge density. Two types of film were considered, SiO₂ and Si₃N₄. Using bulk film characteristics, the calculations showed that Si0₂ film is "harder" than Si₃N₄ film. If an equal built-in stress value is assumed, then a larger polarization charge density is predicted for Si0₂ than for Si₃N₄ encapsulated substrates. In the experimental part, stress was applied to test devices by bending strips of GaAs wafers in a cantilever configuration. MESFETs tested were oriented in the [011] or the [011̅] direction. Both static stress and time-varying stress were applied. In the statics stress experiment, the changes in the barrier height and the C-V profile were measured. It was found that, with equal stress applied, Schottky barriers with a larger ideality factor showed a larger change in the barrier height. In the time-varying stress experiment, attempts were made to measure the effect of the polarization charge density on device characteristics by measuring changes in the drain-source current. / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate