<p>Quite often modelers with constraint programming (CP) use the same modelling patterns for different problems, possibly from different domains. This results in recurring idioms in constraint programs. Our approach can be seen as a three-step approach. First, we identify some of these recurring patterns in constraint programs. Second, we propose a general way of describing these patterns by introducing proper constructs that would cover a wide range of applications. Third, we propose automating the process of reproducing these idioms from these higher-level descriptions. The whole process can be seen as a way of encapsulating some of the expertise and knowledge often used by CP modelers and making it available in much simpler forms. Doing so, we are able to extend current CP languages with high-level abstractions that open doors for automation of some of the modelling processes.</p><p>In particular, we introduce function variables and allow the statement of constraints on these variables using function operations. A <i>function variable</i> is a decision variable that can take a value from a set of functions as opposed to an <i>integer variable</i> that ranges over integers, or a <i>set variable</i> that ranges over a set of sets. We show that a function variable can be mapped into different representations in terms of integer and set variables, and illustrate how to map constraints stated on a function variable into constraints on integer and set variables. As a result, a function model expressed using function variables opens doors to the automatic generation of alternate CP models. These alternate models either use a different variable representation, or have extra implied constraints, or employ different constraint formulation, or combine different models that are linked using channelling constraints. A number of heuristics are also developed that allow the comparison of different constraint formulations. Furthermore, we present an extensive theoretical comparison of models of injection problems supported by asymptotic and empirical studies. Finally, a practical modelling tool that is built based on a high-level language that allows function variables is presented and evaluated. The tool helps users explore different alternate CP models starting from a function model that is easier to develop, understand, and maintain.</p>

The allocation of resources over time, referred to as resource scheduling, in large-scale construction environments is a challenging problem. Although traditional network scheduling techniques are the most popular scheduling techniques in the construction industry, they are ineffective in modeling the dynamic nature and resource interactions of large projects. Simulation based modeling or optimization techniques are also time-consuming, complicated and costly to be implemented in large-scale projects. This research is focused on developing a new framework to insert artificial intelligence inside construction simulations for facilitating the resource allocation process. The first stage in this study was developing a framework to solve resource scheduling problems in large scale construction projects. This framework, called the Simulation Based Auction Protocol (SBAP), integrates Multi-Agent Resource Allocation (MARA) in a simulation environment. This hybrid framework deploys centralized MARA (i.e., auction protocols) whereby agents bid on different combinations of resources at the start of a simulation cycle. Agents attempt to improve their individual welfare by acquiring a combination of resources. An auctioneer is designed to allocate resources to the agents by maximizing the overall welfare of the society. Simulation is also employed to track the availability of resources, and manage resource oriented activities. This framework is implemented in two large construction applications of scheduling module assembly yard and multiple heavy lift planning in modular construction. The second objective of this project is to develop a generic resource allocation component for addressing optimized resource allocation in various construction projects. This component is developed in a large scale model using High Level Architecture (HLA), instead of traditional simulation environments. HLA allows splitting a large scale model, known as a federation, into a number of manageable components (i.e., federates), while maintaining interoperability between them. A generic Resource Allocation (RA) federate is designed to act as an auctioneer for federates developed based on the SBAP. Another generic federate is also built to automate the communication with the RA federate. These two generic federates can be reused in various construction federations. This framework is successfully implemented in an industrial construction process that involves different supply chains including spool fabrication, module assembly and heavy crane lifts in site construction. / Construction Engineering and Management

Quite often modelers with constraint programming (CP) use the same modelling patterns for different problems, possibly from different domains. This results in recurring idioms in constraint programs. Our approach can be seen as a three-step approach. First, we identify some of these recurring patterns in constraint programs. Second, we propose a general way of describing these patterns by introducing proper constructs that would cover a wide range of applications. Third, we propose automating the process of reproducing these idioms from these higher-level descriptions. The whole process can be seen as a way of encapsulating some of the expertise and knowledge often used by CP modelers and making it available in much simpler forms. Doing so, we are able to extend current CP languages with high-level abstractions that open doors for automation of some of the modelling processes. In particular, we introduce function variables and allow the statement of constraints on these variables using function operations. A function variable is a decision variable that can take a value from a set of functions as opposed to an integer variable that ranges over integers, or a set variable that ranges over a set of sets. We show that a function variable can be mapped into different representations in terms of integer and set variables, and illustrate how to map constraints stated on a function variable into constraints on integer and set variables. As a result, a function model expressed using function variables opens doors to the automatic generation of alternate CP models. These alternate models either use a different variable representation, or have extra implied constraints, or employ different constraint formulation, or combine different models that are linked using channelling constraints. A number of heuristics are also developed that allow the comparison of different constraint formulations. Furthermore, we present an extensive theoretical comparison of models of injection problems supported by asymptotic and empirical studies. Finally, a practical modelling tool that is built based on a high-level language that allows function variables is presented and evaluated. The tool helps users explore different alternate CP models starting from a function model that is easier to develop, understand, and maintain.

The technological development is enabling the production of increasingly complex electronic systems. All such systems must be verified and tested to guarantee their correct behavior. As the complexity grows, testing has become one of the most significant factors that contribute to the total development cost. In recent years, we have also witnessed the inadequacy of the established testing methods, most of which are based on low-level representations of the hardware circuits. Therefore, more work has to be done at abstraction levels higher than the classical gate and register-transfer levels. At the same time, the automatic test equipment based solutions have failed to deliver the required test quality. As a result, alternative testing methods have been studied, which has led to the development of built-in self-test (BIST) techniques. In this thesis, we present a novel hybrid BIST technique that addresses several areas where classical BIST methods have shortcomings. The technique makes use of both pseudorandom and deterministic testing methods, and is devised in particular for testing modern systems-on-chip. One of the main contributions of this thesis is a set of optimization methods to reduce the hybrid test cost while not sacrificing test quality. We have devel oped several optimization algorithms for different hybrid BIST architectures and design constraints. In addition, we have developed hybrid BIST scheduling methods for an abort-on-first-fail strategy, and proposed a method for energy reduction for hybrid BIST. Devising an efficient BIST approach requires different design modifications, such as insertion of scan paths as well as test pattern generators and signature analyzers. These modifications require careful testability analysis of the original design. In the latter part of this thesis, we propose a novel hierarchical test generation algorithm that can be used not only for manufacturing tests but also for testability analysis. We have also investigated the possibilities of generating test vectors at the early stages of the design cycle, starting directly from the behavioral description and with limited knowledge about the final implementation. Experiments, based on benchmark examples and industrial designs, have been carried out to demonstrate the usefulness and efficiency of the proposed methodologies and techniques.

Dynamic balancing of computation and communication load is vital for the execution stability and performance of distributed, parallel simulations deployed on shared, unreliable resources of large-scale environments. High Level Architecture (HLA) based simulations can experience a decrease in performance due to imbalances that are produced initially and/or during run-time. These imbalances are generated by the dynamic load changes of distributed simulations or by unknown, non-managed background processes resulting from the non-dedication of shared resources. Due to the dynamic execution characteristics of elements that compose distributed simulation applications, the computational load and interaction dependencies of each simulation entity change during run-time. These dynamic changes lead to an irregular load and communication distribution, which increases overhead of resources and execution delays. A static partitioning of load is limited to deterministic applications and is incapable of predicting the dynamic changes caused by distributed applications or by external background processes. Due to the relevance in dynamically balancing load for distributed simulations, many balancing approaches have been proposed in order to offer a sub-optimal balancing solution, but they are limited to certain simulation aspects, specific to determined applications, or unaware of HLA-based simulation characteristics. Therefore, schemes for balancing the communication and computational load during the execution of distributed simulations are devised, adopting a hierarchical architecture. First, in order to enable the development of such balancing schemes, a migration technique is also employed to perform reliable and low-latency simulation load transfers. Then, a centralized balancing scheme is designed; this scheme employs local and cluster monitoring mechanisms in order to observe the distributed load changes and identify imbalances, and it uses load reallocation policies to determine a distribution of load and minimize imbalances. As a measure to overcome the drawbacks of this scheme, such as bottlenecks, overheads, global synchronization, and single point of failure, a distributed redistribution algorithm is designed. Extensions of the distributed balancing scheme are also developed to improve the detection of and the reaction to load imbalances. These extensions introduce communication delay detection, migration latency awareness, self-adaptation, and load oscillation prediction in the load redistribution algorithm. Such developed balancing systems successfully improved the use of shared resources and increased distributed simulations' performance.

The main objective of this research is to estimate internal and external wage effects associated with a changing share of college graduates in Canada. This paper uses data drawn from the Canadian 1991, 1996, and 2001 Public Use Microdata File for 25 to 65 years old individuals working full-time and full-year in metropolitan areas. These workers are then separated into four different levels of education groups in order to estimate the effect of change in the share of college-educated workers on their earnings. <p>The Ordinary Least Squares (OLS) estimates, controlling for potential work experience, total years of schooling, individual occupation, employment industry, immigration status, visible minority status, show a significant positive relationship between the percentage change of the share of college-educated workers and the percentage change of individuals real weekly wage rates. We found that one percentage point increase in a census metropolitan areas share of college-graduated workers was associated with a 0.35 percentage change in all workers wage rates in that city. For separated education groups, our results showed that a one percentage expansion in the supply of college-graduated workers raised less than high schools wage rate by 0.245 percent, raised high-school graduates wage rate by 0.363 percent, raised more than college-educated workers wage rate by 0.385 percent, and raised college-educated wage rate by 0.326 percentage. These results are consistent with the conclusion arrived at by E. Moretti, (2004) that all types of workers earnings increased when a citys share of college graduates rose.

A hardware implementation can bring orders of magnitude improvements in performance and energy consumption over a software implementation. Hardware design, however, can be extremely difficult. High-level synthesis, the process of compiling software to hardware, promises to make hardware design easier. However, compiling an entire software program to hardware can be inefficient. This thesis proposes hardware/software co-design, where computationally intensive functions are accelerated by hardware, while remaining program segments execute in software. The work in this thesis builds a framework where user-designated software functions are automatically compiled to hardware accelerators, which can execute serially or in parallel to work in tandem with a processor. To support multiple parallel accelerators, new multi-ported cache designs are presented. These caches provide low-latency high-bandwidth data to further improve the performance of accelerators. An extensive range of cache architectures are explored, and results show that certain cache architectures significantly outperform others in a processor/accelerator system.

A hardware implementation can bring orders of magnitude improvements in performance and energy consumption over a software implementation. Hardware design, however, can be extremely difficult. High-level synthesis, the process of compiling software to hardware, promises to make hardware design easier. However, compiling an entire software program to hardware can be inefficient. This thesis proposes hardware/software co-design, where computationally intensive functions are accelerated by hardware, while remaining program segments execute in software. The work in this thesis builds a framework where user-designated software functions are automatically compiled to hardware accelerators, which can execute serially or in parallel to work in tandem with a processor. To support multiple parallel accelerators, new multi-ported cache designs are presented. These caches provide low-latency high-bandwidth data to further improve the performance of accelerators. An extensive range of cache architectures are explored, and results show that certain cache architectures significantly outperform others in a processor/accelerator system.

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The main objective of this research is to estimate internal and external wage effects associated with a changing share of college graduates in Canada. This paper uses data drawn from the Canadian 1991, 1996, and 2001 Public Use Microdata File for 25 to 65 years old individuals working full-time and full-year in metropolitan areas. These workers are then separated into four different levels of education groups in order to estimate the effect of change in the share of college-educated workers on their earnings. <p>The Ordinary Least Squares (OLS) estimates, controlling for potential work experience, total years of schooling, individual occupation, employment industry, immigration status, visible minority status, show a significant positive relationship between the percentage change of the share of college-educated workers and the percentage change of individuals real weekly wage rates. We found that one percentage point increase in a census metropolitan areas share of college-graduated workers was associated with a 0.35 percentage change in all workers wage rates in that city. For separated education groups, our results showed that a one percentage expansion in the supply of college-graduated workers raised less than high schools wage rate by 0.245 percent, raised high-school graduates wage rate by 0.363 percent, raised more than college-educated workers wage rate by 0.385 percent, and raised college-educated wage rate by 0.326 percentage. These results are consistent with the conclusion arrived at by E. Moretti, (2004) that all types of workers earnings increased when a citys share of college graduates rose.