In order to correctly perform circuit simulation, it is crucial that parasitic capacitances near devices are accurately extracted and are consistent with the SPICE models. Although 3D device simulation can be used to extract such parasitics, it is expensive and does not consider the effects of nearby interconnect and devices in a layout. Conventional rule-based layout parasitic extraction (LPE) tools which are used for interconnect extraction are inaccurate in modeling 3D effects near devices. In this thesis, we propose a methodology which combines 3D field solver based extraction with the ability to exclude specific parasitics from among the parameters in the SPICE model. We use this methodology to extract parasitics due to fringing fields and sidewall capacitances in MOSFETs, bipolar transistors and FinFETs in advanced process nodes. We analyze the importance of considering layout and process variables in device extraction by comparing with standard SPICE models. The results are validated by circuit simulation using predictive technology models and test chips. We also demonstrate the versatility of this flow by modeling the capacitance contributions of the raised gate profile in nanoscale FinFETs.

Magnetic components, such as inductors and transformers, have important effects on the efficiency and performance of switching power supplies; their parasitic properties directly impact the high frequency properties which can cause lot-to-lot variation or unanticipated and non-ideal operation. They are also amongst the most problematic components to design, often requiring numerous design-prototype-test interactions. The electrostatic and electromagnetic analysis of wound components has become more important recently to predict their performance and frequency behavior. Accurate prediction and design of winding parasitic parameters of leakage inductance and winding capacitance for high frequency inductors and transformers in switching power supplies is fundamental to improve performance, lower cost, and speed time to market. This thesis presents a methodology and process to obtain accurate prediction of the inter- and intra-winding capacitances of high frequency magnetic components. Application examples considered are a single-winding choke, a coupled inductor filter, and a multi-winding transformer. Analytical approach for determination of parasitic capacitances in high frequency magnetic components will be covered also. Comparison of the FEA results using JMAG with experimental and empirical formula results show good agreement, supporting the method as a model-based design tool with the potential to significantly reduce the design-prototype-test cycle commonly needed with sophisticated magnetic designs.

An electrochemical double-layer capacitor (EDLC) is a potential buffer for current power and energy supply. In this work, activated carbon derived from fluid coke as a brand new electrode material was studied due to its high specific surface area (SSA) and large portion of mesopores. A suitable electrode material formula, current collector, and cell configuration were investigated to fabricate a testable system and ensure the reproducibility of measurements. Cyclic voltammetry (CV) and constant current charge/discharge (CD) techniques were used to characterize the performance of the electrode material, as well as to study its fundamental behaviour. A new procedure was established for quantifying the capacitance (Cc) of EDLC from CV which isolates the effect of internal resistance on the measured capacitance (CM). The specific capacitance of single electrode made of activated carbon (~1900 m2/g) with approximately 80% mesopores and macropores was able to reach 180 F/g at scan rate of 0.5mV/s.

Cemented Paste Backfill (CPB) is a relatively new backfilling technology for which a better understanding of binder hydration is required. This research uses electromagnetic (EM) wave-based techniques to non-destructively study a CPB consisting of tailings, sand, process water and binder (90% blast-furnace slag; 10% Portland cement). EM experiments were performed using a broadband network analyzer (20 MHz to 1.3 GHz) in the lab and capacitance probes (70 MHz) in the lab and field. Results showed that the EM properties are sensitive to curing time, operating frequency and specimen composition including binder content. The volumetric water content interpreted from dielectric permittivity varied little with curing. Temporal variations in electrical conductivity reflected the different stages of hydration. Laboratory results aided interpretation of field data and showed that a reduction in binder content from 4.5% to 2.2% delays setting of CPB from 0.5 days to over 2 days, which has important implications for mine design.

Cemented Paste Backfill (CPB) is a relatively new backfilling technology for which a better understanding of binder hydration is required. This research uses electromagnetic (EM) wave-based techniques to non-destructively study a CPB consisting of tailings, sand, process water and binder (90% blast-furnace slag; 10% Portland cement). EM experiments were performed using a broadband network analyzer (20 MHz to 1.3 GHz) in the lab and capacitance probes (70 MHz) in the lab and field. Results showed that the EM properties are sensitive to curing time, operating frequency and specimen composition including binder content. The volumetric water content interpreted from dielectric permittivity varied little with curing. Temporal variations in electrical conductivity reflected the different stages of hydration. Laboratory results aided interpretation of field data and showed that a reduction in binder content from 4.5% to 2.2% delays setting of CPB from 0.5 days to over 2 days, which has important implications for mine design.

An electrochemical double-layer capacitor (EDLC) is a potential buffer for current power and energy supply. In this work, activated carbon derived from fluid coke as a brand new electrode material was studied due to its high specific surface area (SSA) and large portion of mesopores. A suitable electrode material formula, current collector, and cell configuration were investigated to fabricate a testable system and ensure the reproducibility of measurements. Cyclic voltammetry (CV) and constant current charge/discharge (CD) techniques were used to characterize the performance of the electrode material, as well as to study its fundamental behaviour. A new procedure was established for quantifying the capacitance (Cc) of EDLC from CV which isolates the effect of internal resistance on the measured capacitance (CM). The specific capacitance of single electrode made of activated carbon (~1900 m2/g) with approximately 80% mesopores and macropores was able to reach 180 F/g at scan rate of 0.5mV/s.

This thesis presents thermodynamic studies performed by electrochemical methods (cyclic voltammetry, electrochemical impedance and chronopotenciometry) in three of the most important electrochromic materials: a-WO3, conducting polymers and viologens. Electrochromic materials are very promising as a low-consuming technology. By incorporating these materials in windows of buildings or vehicles, approximately a 30% of the consumed energy in these systems can be saved.Regarding the a-WO3, apart from other contributions, a new model based on lattice distortions, able to explain the intercalation thermodynamic in this material, is proposed. In the conducting polymers field, a Gaussian energy distribution is proved to account for the initial part of the so broad oxidation peaks observed in cyclic voltammetry. Finally, the coloration kinetics of the viologen modified n-TiO2 electrode is explained.

El estudio del transporte de carga en semiconductores orgánicos contribuye al desarrollo y optimización de LEDs orgánicos y nuevas células solares. En OLEDs de un sólo portador se ha encontrado una fórmula explícita de la característica densidad de corriente y potencial (J-V) con movilidad dependiente del campo eléctrico. Un test para diferenciar la movilidad dependiente del campo y de la densidad ha sido dado por medio de una ley universal de escalado. Los espectros de capacidad y los tiempos de tránsito han sido examinados con la inclusión de la movilidad dependiente del campo eléctrico y comparado con los datos experimentales, verificándose el modelo teórico planteado. Se ha descrito la movilidad de portadores de carga a través de un modelo de transporte con una densidad exponencial de trampas. Se han utilizado técnicas de espectroscopía de impedancia para explicar la movilidad dependiente del campo eléctrico en términos del múltiple atrapamiento ejercido por los estados energéticamente localizados. Este modelo ha explicado de forma coherente los espectros de capacidad recogidos en medidas experimentales, particularmente su comportamiento a bajas e intermedias frecuencias. La respuesta de los OLED (polímero SY) ha sido estudiada en los regímenes estacionario y transitorio. En el régimen estacionario, se han descrito las corrientes de fuga a bajos potenciales. Se ha analizado la existencia de mayor corriente circulando por el perímetro que por el área del dispositivo. En el régimen transitorio, se ha proporcionado una explicación sobre las colas de luz emitida observadas al cesar la perturbación de potencial escalón: procede de la inyección limitada de electrones en el cátodo.

This thesis work investigates the effects of crosstalk on on-chip interconnects. We use optimal repeater insertion as a reference and derive analytical expressions for signal latency, maximum data-rate and power consumption. Through calculations and simulations we show that despite large uncertainties in arrival time of a signal that is subject to crosstalk, we are able to make predictions about the maximum data-rate on a bus. We also show that data-rates can exceed the classical limit of the latency inverted by using wave pipelining. To increase the data-rate, we can increase the number of repeaters to a limit, at the cost of additional latency and power. Savings in power consumption can be achieved by using fewer repeaters, paying in latency and data-rate. Through fewer repeaters, the top metal layer shows better performance in all investigated aspects.

The goal of this thesis is to experimentally characterize the flyability of current generation read/write heads over media patterned to densities above the superparamagnetic limit. The superparamagnetic limit is the physical limit to magnetic storage density. In magnetic storage, superparamagnetism is the uncontrollable switching of stored bits during the lifespan of a hard disk. Theoretical analysis has predicted that densities of ~50 Gbit/in2 are not possible using traditional continuous media. One strategy to achieve high storage density, above the superparamagnetic limit, is patterned media. With patterned media the physical separation of magnetic domains increases their stability. One of the major challenges of development of patterned media is achieving acceptable flyability of the read/write head. In that vein, a test stand is built to measure head liftoff speed, head to disk intermittent contact and head fly height. Tangential friction, an indicator of head liftoff is measured by a Wheatstone bridge strain circuit attached to a cantilever beam. Intermittent contact is quantified by the amount of noise emanating from the interface, which is measured by a high frequency acoustic emission sensor. Head fly height is measured indirectly with a capacitance circuit built around the head to disk interface. Experimental samples of current generation read/write heads and media are obtained from industry. Current generation media is patterned using focused ion beam milling to a density of 10 Gbit/in2. Other, extremely dense samples, above 700 Gbit/in2, are created via thin film self assembly on silicon substrate. Conclusions on slider head flyability over patterned media are based on comparison with flyability over non-patterned media. It is demonstrated that loss of hydrodynamic lubrication is small for small pattern regions with high conserved surface area ratio. Conserved surface area ratio is defined as total surface area minus etched surface area all divided by the total surface area of the storage media. For wafer scale patterned media with low conserved surface area ratio, head liftoff cannot be achieved at designed normal load. However, a 50% reduction of load allows slider head liftoff.