The objective of this research is to develop and demonstrate low-complexity, robust, frequency-scalable, wide-band waveform acquisition techniques for testing high speed com- munication systems. High resolution waveform capture is a versatile testing tool that enables flexible test strategies. However, waveform capture at high data rates requires costly hardware because the increased bandwidth of the signal waveform leads to an increase in the sampling rate requirement, cost of front-end components, and sensitivity to phase errors in traditional (source) synchronous Nyquist-rate tester architectures. The hardware cost and complexity of wide-band waveform acquisition systems can, however, be significantly reduced by using (trigger-free) incoherent undersampling to achieve reduced sampling rates and robustness to phase errors in signal paths. Reducing the hardware cost of such a system using incoherent undersampling requires increased signal processing at the back end. This research proposes computationally-efficient, time-domain waveform reconstruction algorithms to improve both performance, and scope of existing incoherent undersampling- based test instrumentation. Supporting hardware architectures are developed to extend the application of incoherent undersampling-based waveform acquisition techniques to linearity testing of high-speed radio-frequency components without any synchronization between the signals involved, and to the acquisition of wide-band signals beyond the track-and-hold bandwidth barrier of the traditional incoherent undersampling architectures, using multi-channel bandwidth interleaving. The bandwidth is extended in a source-incoherent framework by using mixers to down convert high-frequency signal components to base band followed by digitization using undersampling, and back-end signal processing to reconstruct the original wide-band signal from multiple band-pass components.

Test strategies were developed to reduce the overall production testing cost of high-performance data converters. A static linearity testing methodology, aimed at reducing the test time of A/D converters, was developed. The architectural information of A/D converters was used, and specific codes were measured. To test a high-performance A/D converters using low-performance and low-cost test equipment a dynamic testing methodology was developed. This involved post processing of measurement data. The effect of ground bounce on accuracy of specification measurement was analyzed, and a test strategy to estimate the A/D converter specifications more accurately in presence of ground bounce noise was developed. The proposed test strategies were simulated using behavioral modeling techniques and were implemented on commercially available A/D converter devices. The hardware experiments validated the proposed test strategies. The test cost analysis was done. It suggest that a significant reduction in cost can be obtained by using the proposed test methodologies for data converter production testing.

The advent of deep submicron technology coupled with ever increasing demands from the customer for more functionality on a compact silicon real estate has led to a proliferation of highly complex integrated RF system-on-chip (SoC) and system-on-insulator (SoI) solutions. The use of scaled CMOS technologies for high frequency wireless applications is posing daunting technological challenges both in design and manufacturing test. To ensure market success, manufacturers need to ensure the quality of these advanced RF devices by subjecting them to a conventional set of production test routines that are both time consuming and expensive. Typically the devices are tested for parametric specifications such as gain, linearity metrics, quadrature mismatches, phase noise, noise figure (NF) and end-to-end system level specifications such as EVM (error vector magnitude), BER (bit-error-rate) etc. Due to the reduced visibility imposed by high levels of integration, testing for parametric specifications are becoming more and more complex. To offset the yield loss resulting from process variability effects and reliability issues in RF circuits, the use of self-healing/self-tuning mechanisms will be imperative. Such self-healing is typically implemented as a test/self-test and self-tune procedure and is applied post-manufacture. To enable this, simple test routines that can accurately diagnose complex performance parameters of the RF circuits need to be developed first. After diagnosing the performance of a complex RF system appropriate compensation techniques need to be developed to increase or restore the system performance. Moreover, the test, diagnosis and compensation approach should be low-cost with minimal hardware and software overhead to ensure that the final product is economically viable for the manufacturer. The main components of the thesis are as follows: 1) Low-cost specification testing of advanced radio frequency front-ends: Methodologies are developed to address the issue of test cost and test time associated with conventional production testing of advanced RF front-ends. The developed methodologies are amenable for performing self healing of RF SoCs. Test generation algorithms are developed to perform alternate test stimulus generation that includes the artifacts of test signal path such as response capture accuracy, load-board DfT etc. A novel cross loop-back methodology is developed to perform low cost system level specification testing of multi-band RF transceivers. A novel low-cost EVM testing approach is developed for production testing of wireless 802.11 OFDM front-ends. A signal transformation based model extraction technique is developed to compute multiple RF system level specifications of wireless front-ends from a single data capture. The developed techniques are low-cost and facilitate a reduction in the overall contribution of test cost towards the manufacturing cost of advanced wireless products. 2)Analog tuning methodologies for compensating wireless RF front ends: Methodologies for performing low-cost self tuning of multiple impairments of wireless RF devices are developed. This research considers for the first time, multiple analog tuning parameters of a complete RF transceiver system (transmitter and receiver) for tuning purposes. The developed techniques are demonstrated on hardware components and behavioral models to improve the overall yield of integrated RF SoCs.

This thesis proposes a multifaceted production test and post-manufacture yield enhancement framework for RF systems. This framework uses low-cost test and post-manufacture calibration/tuning techniques. Since the test cost and the yield of the RF circuits/sub-system directly contribute to the manufacturing cost of RF systems, the proposed framework minimizes overall RF systems' manufacturing cost by taking two approaches. In the first approach, low-cost testing methodologies are proposed for RF amplifiers and integrated RF substrates with an embedded RF passive filter and interconnect. Techniques are developed to test RF circuits by the analysis of low-frequency signal of the order of few MHz and without using any external RF test-stimulus. Oscillation principles are used to enable testing of RF circuits without any external test-stimulus. In the second approach, to increase the yield of the RF circuits for parametric defects, RF circuits are tuned to compensate for a performance loss during production test using on-board or on-chip resources. This approach includes a diagnosis algorithm to identify faulty circuits within the system, and performs a compensation process that adjusts tunable components to enhance the performance of the RF circuits. In the proposed yield improvement methodologies, the external test stimulus is not required because the stimulus is generated by the RF circuit itself with the help of additional circuitry and faulty circuits are detected using low-cost test methods developed in this research. As a result, the proposed research enables low-cost testing and self-healing of RF systems.