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GaN-based heterostructure field effect transistors and MMICs for high frequency applicationsSeo, Sanghyun January 2009 (has links)
Zugl.: Darmstadt, Techn. Univ., Diss., 2009
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Ein Beitrag zu Entwurf und Modellierung von Anpassschaltungen für breitbandige Mikrowellen-LeistungsverstärkerHorn, Johannes. Unknown Date (has links) (PDF)
Techn. Universiẗat, Diss., 2005--Berlin.
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Computergestützter Entwurf nichtlinearer Transmissionsleitungen zur Erzeugung elektrischer Transienten im Picosekunden-BereichLanger, Thomas. Unknown Date (has links) (PDF)
Techn. Universiẗat, Diss., 2001--Berlin.
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Die Perfectly-Matched-Layer-Randbedingung in der Finite-Differenzen-Methode im Frequenzbereich Implementierung und Einsatzbereiche /Tischler, Thorsten. Unknown Date (has links) (PDF)
Techn. Universiẗat, Diss., 2003--Berlin.
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Ein Beitrag zu Entwurf und Modellierung von Anpassschaltungen für breitbandige Mikrowellen-LeistungsverstärkerHorn, Johannes. Unknown Date (has links)
Techn. Universiẗat, Diss., 2005--Berlin.
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THREE-DIMENSIONAL MONOLITHIC MEMS COILSUN, JING January 2003 (has links)
No description available.
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Design and Characterization of Liquid Metal Flip Chip Interconnections for Heterogeneous Microwave AssembliesRalston, Parrish Elaine 08 May 2013 (has links)
Flip chip interconnections have superior performance for microwave applications compared to wire bond interconnections because of their reduced parasitics, more compact architecture, and flexibility in laying out flip chip bond pads. Reduction in interconnect parasitics enables these interconnects to support broadband signals, therefore increasing the bandwidth capabilities of flip chip-assembled systems. Traditional flip chip designs provide mechanical and electrical connections from a top chip to a carrier substrate with rigid solder joints. For heterogeneous assemblies, flip chip connections suffer from thermo-mechanical failures caused by coefficient of thermal expansion mismatches. As an alternative, flexible flip chip interconnections incorporating a metal, which is liquid at room temperature, mitigates the possibility of such thermo-mechanical failures. Additionally, liquid metal, flip chip interconnections allow for room temperature assembly, simplifying assembly and rework processes.
This dissertation focuses on the design and characterization of liquid metal interconnections, specifically using Galinstan, an alloy of gallium indium and tin, for the heterogeneous assembly of active monolithic microwave integrated circuits (MMICs) onto a CTE mismatched substrate. Carrier substrates designed for liquid metal transitions were fabricated on high resistivity Si and on three dimensional copper structures. The three dimensional copper structures were fabricated in the PolyStrata™ process. Individual MMIC chips were post-processed to mate with carrier substrates in a liquid metal, flip chip configuration. S-parameter measurements of prototype MMIC assemblies with liquid metal, flip chip interconnections showed an average transition loss of 0.7dB over the MMIC's frequency of operation (4.9 - 8.5 GHz). Passive assemblies were also fabricated to characterize the power and temperature performance of liquid metal transitions. Liquid metal interconnections show excellent power handling, maintaining consistent RF performance while transmitting 100W of continuous wave power for an hour. Liquid metal interconnections were also tested following 200 temperature cycles over the -140°C – 125°C range. A comparison of S parameter measurements taken before and after temperature cycling, over a frequency range of 10MHz - 40GHz showed no significant changes in performance. These passive assemblies were also used to develop a lumped element model of the interconnection which is useful for the verification the interconnection\'s performance and for comparison of liquid metal interconnection parasitic to wire bond and flip chip interconnect parasitics.
The experimental results presented in this dissertation confirm that liquid metal interconnect are viable for wider use in military and commercial applications. In the future, additional environmental testing and further refinement of the processing flow, such as improved contact metallurgy, are needed to make this interconnect approach more viable for large volume manufacturing. / Ph. D.
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Ultra-Compact mm-Wave Monolithic IC Doherty Power Amplifier for Mobile HandsetsSajedin, M., Elfergani, Issa T., Rodriguez, Jonathan, Abd-Alhameed, Raed, Fernandez-Barciela, M., Violas, M. 07 September 2021 (has links)
Yes / This work develops a novel dynamic load modulation Power Amplifier (PA) circuity that can provide an optimum compromise between linearity and efficiency while covering multiple cellular
frequency bands. Exploiting monolithic microwave integrated circuits (MMIC) technology, a fully integrated 1W Doherty PA architecture is proposed based on 0.1 µm AlGaAs/InGaAs Depletion- Mode (D-Mode) technology provided by the WIN Semiconductors foundry. The proposed wideband DPA
incorporates the harmonic tuning Class-J mode of operation, which aims to engineer the voltage waveform via second harmonic capacitive load termination. Moreover, the applied post-matching technique not only reduces the impedance transformation ratio of the conventional DPA, but also restores its proper load modulation. The simulation results indicate that the monolithic drive load modulation PA at 4 V operation voltage delivers 44% PAE at the maximum output power of 30 dBm at
the 1 dB compression point, and 34% power-added efficiency (PAE) at 6 dB power back-off (PBO). A power gain flatness of around 14 ± 0.5 dB was achieved over the frequency band of 23 GHz to 27 GHz. The compact MMIC load modulation technique developed for the 5G mobile handset occupies the die
area of 3.2. / This research was funded by the European Regional Development Fund (FEDER), through COMPETE 2020, POR ALGARVE 2020, Fundação para a Ciência e a Tecnologia (FCT) under i-Five Project (POCI-01-0145-FEDER-030500). This work is also part of the POSITION-II project funded by the ECSEL joint Undertaking under grant number Ecsel-345 7831132-Postitio-II-2017-IA. This work is supported by FCT/MCTES through national funds and when applicable co-funded EU funds under the project UIDB/50008/2020-UIDP/50008/2020. The authors would like to thank the WIN Semiconductors foundry for providing the MMIC GaAs pHEMT PDKs and technical support. This work is supported by the Project TEC2017-88242-C3-2-R- Spanish Ministerio de Ciencia, Innovación e Universidades and EU-FEDER funding.
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Projeto de osciladores de microondas distribuídos com realimentação reversa. / Design of distributed microwave oscillators with reverse feedback.Barros, Alexandre Della Santa 27 September 2005 (has links)
Esta dissertação propõe uma metodologia de projeto de osciladores distribuídos controlados por tensão - DVCO - com realimentação reversa em freqüência de microondas. Estes constituem uma nova classe de osciladores recentemente proposta, a qual é obtida através da realimentação reversa de amplificadores distribuídos e tem como principal vantagem a possibilidade de sintonia em faixa ultra-larga de freqüência. São apresentados os fundamentos teóricos de operação do circuito e é proposta uma extensão da análise linear apresentada na literatura, considerando linhas de transmissão artificiais m-derivadas, a qual permite prever as transcondutâncias mínimas necessárias dos transistores e a freqüência inicial de oscilação. O método de projeto proposto é direcionado a DVCOs com realimentação reversa empregando transistores de efeito de campo dos tipos MESFET (Metal Semiconductor Field Effect Transistor) e PHEMT (Pseudomorfic High Electron Mobility Transistor), bem como ao uso de tecnologia de circuitos híbridos de microondas - MICs, e circuitos integrados monolíticos de microondas - MMICs. A metodologia proposta definiu critérios para implementar a topologia deste circuito através de componentes reais, considerando-se os parasitas associados aos mesmos. Para validação do procedimento de projeto, concebeu-se e simulou-se através do programa ADS da Agilent um oscilador intitulado DVCO 3 GHz, cuja faixa de freqüência especificada estende-se de 1 a 3 GHz e a potência mínima de saída especificada é de 10 dBm. Um protótipo foi construído em circuito híbrido e seus resultados experimentais foram comparados aos simulados. A freqüência de oscilação medida foi de 1,04 GHz a 3,05 GHz e a potência obtida esteve entre 9,8 e 14,3 dBm, apresentando boa concordância com as simulações. O ruído de fase foi medido entre 100 kHz e 1 MHz de distância da portadora, observando-se uma inclinação proporcional a 1/f3. Verificou-se que a diminuição da corrente de polarização Ids dos transistores, através da redução de sua tensão de polarização de porta-fonte Vgs, melhorou o ruído de fase. Na condição de polarização de menor ruído de fase, observaram-se valores entre -84 e -93 dBc/Hz a 100 kHz da portadora. / In this dissertation, a design methodology applied to microwave reverse feedback distributed voltage controlled oscillators - DVCO - is proposed. This circuit constitutes a new class of oscillators, obtained from reverse feeding back of the distributed amplifier. The main advantage of this topology is its capacity to achieve ultra-wideband frequency tuning. Circuit theoretical background is presented and an extension of the linear analysis presented in the literature is proposed. It allows predicting transistor minimum transconductances and the oscillation initial frequency, considering m-derived artificial transmission lines. The proposed design method is applicable to reverse feedback DVCOs employing field effect transistors MESFET (Metal Semiconductor Field Effect Transistor) and PHEMT (Pseudomorfic High Electron Mobility Transistor), as well as using MIC (Microwave Integrated Circuits) and MMIC (Monolithic Microwave Integrated Circuits) technology. The proposed methodology defined criterion to employ real components, considering the component parasitics. In order to validate the design method, an oscillator named DVCO 3 GHz was designed and simulated through software Agilent ADS, with specified band from 1 up to 3 GHz and minimum output power of 10 dBm. A prototype was implemented in hybrid circuit technology and the measurements were compared to the simulation results. The measured oscillation frequency varied from 1,04 GHz up to 3,05 GHz and the output power was 9,8 to 14,3 dBm, presenting good agreement with simulations. Phase noise was measured in the range between 100 kHz and 1 MHz shift from carrier; in which it was observed a 1/f3 slope. It was verified that decreasing the transistor bias current Ids through decreasing its gate bias voltage Vgs reduced phase noise. In the biasing condition for lowest phase noise, values between -84 and -93 dBc/Hz at 100 kHz off-set from carrier were measured.
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Projeto de osciladores de microondas distribuídos com realimentação reversa. / Design of distributed microwave oscillators with reverse feedback.Alexandre Della Santa Barros 27 September 2005 (has links)
Esta dissertação propõe uma metodologia de projeto de osciladores distribuídos controlados por tensão - DVCO - com realimentação reversa em freqüência de microondas. Estes constituem uma nova classe de osciladores recentemente proposta, a qual é obtida através da realimentação reversa de amplificadores distribuídos e tem como principal vantagem a possibilidade de sintonia em faixa ultra-larga de freqüência. São apresentados os fundamentos teóricos de operação do circuito e é proposta uma extensão da análise linear apresentada na literatura, considerando linhas de transmissão artificiais m-derivadas, a qual permite prever as transcondutâncias mínimas necessárias dos transistores e a freqüência inicial de oscilação. O método de projeto proposto é direcionado a DVCOs com realimentação reversa empregando transistores de efeito de campo dos tipos MESFET (Metal Semiconductor Field Effect Transistor) e PHEMT (Pseudomorfic High Electron Mobility Transistor), bem como ao uso de tecnologia de circuitos híbridos de microondas - MICs, e circuitos integrados monolíticos de microondas - MMICs. A metodologia proposta definiu critérios para implementar a topologia deste circuito através de componentes reais, considerando-se os parasitas associados aos mesmos. Para validação do procedimento de projeto, concebeu-se e simulou-se através do programa ADS da Agilent um oscilador intitulado DVCO 3 GHz, cuja faixa de freqüência especificada estende-se de 1 a 3 GHz e a potência mínima de saída especificada é de 10 dBm. Um protótipo foi construído em circuito híbrido e seus resultados experimentais foram comparados aos simulados. A freqüência de oscilação medida foi de 1,04 GHz a 3,05 GHz e a potência obtida esteve entre 9,8 e 14,3 dBm, apresentando boa concordância com as simulações. O ruído de fase foi medido entre 100 kHz e 1 MHz de distância da portadora, observando-se uma inclinação proporcional a 1/f3. Verificou-se que a diminuição da corrente de polarização Ids dos transistores, através da redução de sua tensão de polarização de porta-fonte Vgs, melhorou o ruído de fase. Na condição de polarização de menor ruído de fase, observaram-se valores entre -84 e -93 dBc/Hz a 100 kHz da portadora. / In this dissertation, a design methodology applied to microwave reverse feedback distributed voltage controlled oscillators - DVCO - is proposed. This circuit constitutes a new class of oscillators, obtained from reverse feeding back of the distributed amplifier. The main advantage of this topology is its capacity to achieve ultra-wideband frequency tuning. Circuit theoretical background is presented and an extension of the linear analysis presented in the literature is proposed. It allows predicting transistor minimum transconductances and the oscillation initial frequency, considering m-derived artificial transmission lines. The proposed design method is applicable to reverse feedback DVCOs employing field effect transistors MESFET (Metal Semiconductor Field Effect Transistor) and PHEMT (Pseudomorfic High Electron Mobility Transistor), as well as using MIC (Microwave Integrated Circuits) and MMIC (Monolithic Microwave Integrated Circuits) technology. The proposed methodology defined criterion to employ real components, considering the component parasitics. In order to validate the design method, an oscillator named DVCO 3 GHz was designed and simulated through software Agilent ADS, with specified band from 1 up to 3 GHz and minimum output power of 10 dBm. A prototype was implemented in hybrid circuit technology and the measurements were compared to the simulation results. The measured oscillation frequency varied from 1,04 GHz up to 3,05 GHz and the output power was 9,8 to 14,3 dBm, presenting good agreement with simulations. Phase noise was measured in the range between 100 kHz and 1 MHz shift from carrier; in which it was observed a 1/f3 slope. It was verified that decreasing the transistor bias current Ids through decreasing its gate bias voltage Vgs reduced phase noise. In the biasing condition for lowest phase noise, values between -84 and -93 dBc/Hz at 100 kHz off-set from carrier were measured.
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