With increasing data sets for processing, there is a requirement to build faster and smaller arithmetic circuits. One of the ways to improve the performance of higher order arithmetic units is to reduce the carry propagation levels. Multi-valued logic enables this by reducing the number of digits required to represent a range of numbers. Area reduction is also obtained through fewer operations and signals required to realise a function. Though theoretically multi-valued logic has these advantages, implementation of the multi-valued logic using CMOS has not been efficient. The main reason is because multi-valued logic is emulated in CMOS using binary switches. Two main approaches are followed in CMOS in implementing multi-valued logic using CMOS. Voltage mode logic, where the logic states are encoded using the node voltages suffer from low noise margins and limitation of radix due to the power supply. Current mode logic, where the branch currents are used to represent the logic levels suffer from high power consumption due to static current flow and requirement of restoration devices. The mindset of the post-CMOS approaches explored so far for multi-valued logic circuit design has been to replace the CMOS switches with their novel nano switches. Hence they too suffer from the same issues as CMOS implementation. Our value proposition is through the use of a truly multi-state device based on electron spin. Spin waves, which are a collection of electron spins of an atom enables multi-valued logic by allowing encoding information in the amplitude and phase of the wave.Another advantage of the spin wave fabric is that the computation is through wave propagation and interference which does not involve any movement of charge. This enables building low energy,smaller and faster multi-valued circuits. In this thesis, implementation of the basic building blocks of multi-valued logic using these novel spin wave based devices is shown. Building of arithmetic circuits like adders using these building blocks have also been demonstrated. To quantify the benefits of spin wave based multi-valued circuits, they are benchmarked with CMOS. For 32-bits, our projected comparisons show a 5X increased performance, 125X area improvement and 1717X power reduction for hexa-decimal spin wave based adders compared to binary CMOS. Similarly there is a 4X increase in performance of hexa-decimal SPWF multiplier compared to CMOS for 16 bits. Finally, we have implemented the I/O circuits for smooth interface between binary CMOS and multi-valued SPWF logic.

We investigate weighted finite automata over strings and strong bimonoids. Such algebraic structures satisfy the same laws as semirings except that no distributivity laws need to hold. We define two different behaviors and prove precise characterizations for them if the underlying strong bimonoid satisfies local finiteness conditions. Moreover, we show that in this case the given weighted automata can be determinized.

Les horizons sont des éléments indispensables à la création d’un modèle structural pour l’exploration d’hydrocarbures. Ces horizons peuvent avoir des formes complexes, les rendant difficiles voire impossibles à manipuler par les logiciels d’exploration. La gestion de ces horizons “multivalués” dans l’interprétation structural passe par deux axes de travail. Il faut premièrement trouver un modèle pour les représenter. Un état de l’art des modèles de données et un programme de comparaison automatique montrent ainsi comment les systèmes de patch et les surfaces triangulées sont les plus adaptés pour représenter les horizons avec failles inverses et les dômes de sel, respectivement. Dans un second temps, il faut pouvoir reconstruire les surfaces de ces horizons multivalués à partir de données d’interprétation, qui sont à la fois peu denses et non-uniformément distribuées. Nous proposons deux algorithmes de reconstruction, un pour chaque type d’horizon. Ces méthodes sont basées sur les approches classiques en géoscience, et forment donc une extension naturelle de l’état de l’art. Avec ces modèles et leurs méthodes de reconstruction, la gestion des horizons multivalués est désormais possible et pratique, permettant de considérer des champs plus complexes / Horizons are first-class elements of the structural models used for Oil & Gasexploration. When they have a complex shape, they become difficult or even outright impossibleto manage within typical software packages. Handling those so-called “multivalued”horizons indeed requires tackling two problems. First, data models must be found to representthem. A review of the state of the art, complemented by a benchmark, led us to promotethe use of patch systems and triangulated surfaces in order to represent reverse-faulted horizonsand salt domes, respectively. Second, multivalued surfaces must be reconstructed fromsparse and non-uniformly distributed interpretation data. We developed two reconstructionmethods, each targeting a multivalued horizon type. They are based on standard geoscienceinterpolation methods, making them both fast and natural extensions of the state of the art.Using the proposed models along with the reconstruction methods, it is now possible to efficientlytackle the more complex fields were they are typically found.

We propose a paraconsistent declarative semantics of possibly inconsistent generalized logic programs which allows for arbitrary formulas in the body and in the head of a rule (i.e. does not depend on the presence of any specific connective, such as negation(-as-failure), nor on any specific syntax of rules). For consistent generalized logic programs this semantics coincides with the stable generated models introduced in [HW97], and for normal logic programs it yields the stable models in the sense of [GL88].

Nuel Belnap schlug 1977 eine vierwertige Logik vor, die -- im Gegensatz zur klassischen Logik -- die Faehigkeit haben sollte, sowohl mit widerspruechlicher als auch mit fehlender Information umzugehen. Diese Logik hat jedoch den Nachteil, dass sie Saetze der Form "wenn ..., dann ..." nicht ausdruecken kann. Ausgehend von dieser Beobachtung analysieren wir die beiden nichtklassischen Aspekte, Widerspruechlichkeit und fehlende Information, indem wir eine dreiwertige Logik entwickeln, die mit widerspruechlicher Information umgehen kann und eine Modallogik, die mit fehlender Information umgehen kann. Beide Logiken sind nicht monoton. Wir untersuchen Eigenschaften, wie z.B. Kompaktheit, Entscheidbarkeit, Deduktionstheoreme und Berechnungkomplexitaet dieser Logiken. Es stellt sich heraus, dass die dreiwertige Logik, nicht kompakt und ihre Folgerungsmenge im Allgemeinen nicht rekursiv aufzaehlbar ist. Beschraenkt man sich hingegen auf endliche Formelmengen, so ist die Folgerungsmenge rekursiv entscheidbar, liegt in der Klasse $\Sigma_2^P$ der polynomiellen Zeithierarchie und ist DIFFP-schwer. Wir geben ein auf semantischen Tableaux basierendes, korrektes und vollstaendiges Berechnungsverfahren fuer endliche Praemissenmengen an. Darueberhinaus untersuchen wir Abschwaechungen der Kompaktheitseigenschaft. Die nichtmonotone auf S5-Modellen basierende Modallogik stellt sich als nicht minder komplex heraus. Auch hier untersuchen wir eine sinnvolle Abschwaechung der Kompaktheitseigenschaft. Desweiteren studieren wir den Zusammenhang zu anderen nichtmonotonen Modallogiken wie Moores autoepistemischer Logik (AEL) und McDermotts NML-2. Wir zeigen, dass unsere Logik zwischen AEL und NML-2 liegt. Schliesslich koppeln wir die entworfene Modallogik mit der dreiwertigen Logik. Die dabei enstehende Logik MKT ist eine Erweiterung des nichtmonotonen Fragments von Belnaps Logik. Wir schliessen unsere Betrachtungen mit einem Vergleich von MKT und verschiedenen informationstheoretischen Logiken, wie z.B. Nelsons N und Heytings intuitionistischer Logik ab.

Orientador: Alberto Martins Jorge / Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica e de Computação / Made available in DSpace on 2018-08-07T17:31:45Z (GMT). No. of bitstreams: 1 Bertone_OsvaldoHugo_M.pdf: 1638189 bytes, checksum: de96158c2363994f79a61d1d7ce1e9aa (MD5) Previous issue date: 2005 / Resumo: Neste trabalho é proposto um Registrador Cíclico para circuitos MVL (Multi-valued Logic) utilizando transistores NMOS e PMOS para uma configuração de quatro níveis lógicos. Este circuito usa certas características secundárias (normalmente indesejadas) dos transistores MOS. Uma particularidade deste registrador são os níveis lógicos auto-definidos com uma alta precisão. Isto permite incrementar a Lógica para mais valores, não estando limitada somente a Lógica Ternária ou Quaternária (as mais usadas em circuitos MVLs), seu uso pode ser estendido para Decimal, Hexadecimal ou mais. O Registrador Cíclico proposto, alem de armazenar um dado multi-valor com um nível de tensão preciso, ainda, fornece a saída com qualquer possível deslocamento lógico sem degradação da precisão. Este registrador permitirá o desenvolvimento de circuitos lógicos como contadores, toggle switches, shift registers, flip-flops em vários níveis, deslocamentos de valores (negação de Post), conversores D/A e A/D, etc¿ Algumas vantagens que este circuito oferece é sua alta resposta em freqüência e sua pouca dependência dos parâmetros do transistor, alcançando uma robustez comparável com os circuitos binários. Como uma aplicação deste registrador proposto é apresentado um Multiplicador Quaternário e comparado com um Multiplicador Binário utilizando a mesma tecnologia. Neste texto serão desenvolvidos os circuitos e simulados no OrCad (PSpice [01]) utilizando um modelo de transistor NMOS e outro PMOS fornecidos pela foundry AMS (Austria Micro Systems) descritos no Apêndice I. O Registrador Cíclico para circuitos MVL foi apresentado pelo autor no Congresso SUCESU 2005 no dia 31 de março de 2005 em Belo Horizonte, MG, Brasil / Abstract: The Cyclical Register for MVL circuits (Multi-valued Logic) proposed is composed by NMOS and PMOS Transistors. This circuit uses the advantage of certain secondary characteristics (normally undesirable) of the MOS transistors. One peculiarity of this register is that the logical levels are defined by itself with a very high precision ; this, permits to increase the logic to many values. Since it is not limited to ternary or quaternary logic (more used MVLs), its use can be extended to decimal, hexadecimal and others. The proposed cyclical register, besides storing the multi-value data with precise voltage level, still, supplies the output with any possible logical shift without the degradation of precision. This register will allow the development of logical circuits as counter, toggle switch, shift register, flip-flop in several levels, shift of value, D/A and A/D converter, etc¿ Some advantages that this circuit offers is its high frequency response and its minor dependency of the parameter of the transistors, providing a robustness comparable to the current binary circuits. As an application of this proposed Register a Quaternary Multiplier is presented and compared with the Binary Multiplier with the same technology. On this paper the circuits will be developed and simulated in the OrCad (Pspice [01]), using the transistors models NMOS and PMOS supplied by foundry AMS (Austria Micro Systems) detailed in the Appendix I. The Cyclical Register for MVL circuits was presented by the author in the Congress SUCESU 2005 in March 31st, 2005 in Belo Horizonte, MG, Brazil / Mestrado / Microeletronica / Mestre em Engenharia Elétrica

We investigate weighted asynchronous cellular automata with weights in valuation monoids. These automata form a distributed extension of weighted finite automata and allow us to model concurrency. Valuation monoids are abstract weight structures that include semirings and (non-distributive) bounded lattices but also offer the possibility to model average behaviors. We prove that weighted asynchronous cellular automata and weighted finite automata which satisfy an I-diamond property are equally expressive. Depending on the properties of the valuation monoid, we characterize this expressiveness by certain syntactically restricted fragments of weighted MSO logics. Finally, we define the quantitative model-checking problem for distributed systems and show how it can be reduced to the corresponding problem for sequential systems.

This thesis proposes a novel directed hypergraph based model for any database. We introduce the notion of association rules for multi-valued attributes, which is an adaptation of the definition of quantitative association rules known in the literature. The association rules for multi-valued attributes are integrated in building the directed hypergraph model. This model allows to capture attribute-level associations and their strength. Basing on this model, we provide association-based similarity notions between any two attributes and present a method for finding clusters of similar attributes. We then propose algorithms to identify a subset of attributes known as a leading indicator that influences the values of almost all other attributes. Finally, we present an association-based classifier that can be used to predict values of attributes. We demonstrate the effectiveness of our proposed model, notions, algorithms, and classifier through experiments on a financial time-series data set (S&P 500).

Nuel Belnap schlug 1977 eine vierwertige Logik vor, die -- im Gegensatz zur klassischen Logik -- die Faehigkeit haben sollte, sowohl mit widerspruechlicher als auch mit fehlender Information umzugehen. Diese Logik hat jedoch den Nachteil, dass sie Saetze der Form 'wenn ..., dann ...' nicht ausdruecken kann. Ausgehend von dieser Beobachtung analysieren wir die beiden nichtklassischen Aspekte, Widerspruechlichkeit und fehlende Information, indem wir eine dreiwertige Logik entwickeln, die mit widerspruechlicher Information umgehen kann und eine Modallogik, die mit fehlender Information umgehen kann. Beide Logiken sind nicht monoton. Wir untersuchen Eigenschaften, wie z.B. Kompaktheit, Entscheidbarkeit, Deduktionstheoreme und Berechnungkomplexitaet dieser Logiken. Es stellt sich heraus, dass die dreiwertige Logik, nicht kompakt und ihre Folgerungsmenge im Allgemeinen nicht rekursiv aufzaehlbar ist. Beschraenkt man sich hingegen auf endliche Formelmengen, so ist die Folgerungsmenge rekursiv entscheidbar, liegt in der Klasse $\Sigma_2^P$ der polynomiellen Zeithierarchie und ist DIFFP-schwer. Wir geben ein auf semantischen Tableaux basierendes, korrektes und vollstaendiges Berechnungsverfahren fuer endliche Praemissenmengen an. Darueberhinaus untersuchen wir Abschwaechungen der Kompaktheitseigenschaft. Die nichtmonotone auf S5-Modellen basierende Modallogik stellt sich als nicht minder komplex heraus. Auch hier untersuchen wir eine sinnvolle Abschwaechung der Kompaktheitseigenschaft. Desweiteren studieren wir den Zusammenhang zu anderen nichtmonotonen Modallogiken wie Moores autoepistemischer Logik (AEL) und McDermotts NML-2. Wir zeigen, dass unsere Logik zwischen AEL und NML-2 liegt. Schliesslich koppeln wir die entworfene Modallogik mit der dreiwertigen Logik. Die dabei enstehende Logik MKT ist eine Erweiterung des nichtmonotonen Fragments von Belnaps Logik. Wir schliessen unsere Betrachtungen mit einem Vergleich von MKT und verschiedenen informationstheoretischen Logiken, wie z.B. Nelsons N und Heytings intuitionistischer Logik ab.

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