A new shallow junction formation process, based on selective silicon etching followed by selective growth of in situ B-doped SiGe, is presented. The approach is advantageous compared to conventional ion implantation followed by thermal activation, because perfectly abrupt, low resistivity junctions of arbitrary depth can be obtained. In B-doped SiGe layers, the active doping concentration can exceed the solid solubility in silicon because of strain compensation. In addition, the compressive strain induced in the Si channel can improve drivability through increased hole mobility. The process is integrated by performing the selective etching and the selective SiGe growth in the same reactor. The main advantage of this is that the delicate gate oxide is preserved. The silicon etching process (based on HCl) is shown to be highly selective over SiO2 and anisotropic, exhibiting the densely packed (100), (311) and (111) surfaces. It was found that the process temperature should be confined between 800 ºC, where etch pits occur, and 1000 ºC, where the masking oxide is attacked. B-doped SiGe layers with a resistivity of 5×10-4 Ωcm were obtained. Well-behaved pMOS transistors are presented, yet with low layer quality. Therefore integration issues related to the epitaxial growth, such as selectivity, loading effect, pile-up and defect generation, were investigated. Surface damage originating from reactive-ion etching of the sidewall spacer and nitride residues from LOCOS formation were found to degrade the quality of the SiGe layer. Various remedies are discussed. Nevertheless, high-quality selective epitaxial growth could not be achieved with a doping concentration in the 1021 cm-3 range. The maximum doping level resulting in a high-quality layer, with the loading effect taken into account, was 6×1020 cm-3. After this careful process optimization, a high-quality layer was obtained in the recessed areas. Finally, Ni mono-germanosilicide was investigated as a material for contact formation to the epitaxial SiGe layers in the recessed source and drain areas. The formation temperature is 550 ºC and it is stable up to 700 ºC. The observation of a recessed step and lateral growth of the silicide led to a detailed treatment of the contact resistivity of the NiSi0.8Ge0.2/Si0.8Ge0.2 interface using 2-D as well as 3-D modeling. Different values were obtained for square shaped and rounded contacts, 5.0x10-8 Ωcm2 and 1.4x10-7 Ωcm2, respectively. / QC 20101028

<p>A new shallow junction formation process, based on selective silicon etching followed by selective growth of in situ B-doped SiGe, is presented. The approach is advantageous compared to conventional ion implantation followed by thermal activation, because perfectly abrupt, low resistivity junctions of arbitrary depth can be obtained. In B-doped SiGe layers, the active doping concentration can exceed the solid solubility in silicon because of strain compensation. In addition, the compressive strain induced in the Si channel can improve drivability through increased hole mobility. The process is integrated by performing the selective etching and the selective SiGe growth in the same reactor. The main advantage of this is that the delicate gate oxide is preserved. The silicon etching process (based on HCl) is shown to be highly selective over SiO₂ and anisotropic, exhibiting the densely packed (100), (311) and (111) surfaces. It was found that the process temperature should be confined between 800 ºC, where etch pits occur, and 1000 ºC, where the masking oxide is attacked. B-doped SiGe layers with a resistivity of 5×10-⁴ Ωcm were obtained. Well-behaved pMOS transistors are presented, yet with low layer quality. Therefore integration issues related to the epitaxial growth, such as selectivity, loading effect, pile-up and defect generation, were investigated. Surface damage originating from reactive-ion etching of the sidewall spacer and nitride residues from LOCOS formation were found to degrade the quality of the SiGe layer. Various remedies are discussed. Nevertheless, high-quality selective epitaxial growth could not be achieved with a doping concentration in the 1021 cm-3 range. The maximum doping level resulting in a high-quality layer, with the loading effect taken into account, was 6×10²⁰cm-³. After this careful process optimization, a high-quality layer was obtained in the recessed areas. Finally, Ni mono-germanosilicide was investigated as a material for contact formation to the epitaxial SiGe layers in the recessed source and drain areas. The formation temperature is 550 ºC and it is stable up to 700 ºC. The observation of a recessed step and lateral growth of the silicide led to a detailed treatment of the contact resistivity of the NiSi₀.₈Ge_0.2/Si_0.8Ge_0.2 interface using 2-D as well as 3-D modeling. Different values were obtained for square shaped and rounded contacts, 5.0x10^-8 Ωcm² and 1.4x10^-7 Ωcm², respectively.</p>

Cette thèse porte sur l'étude des phénomènes qui se produisent lors de la réaction métal-silicium (siliciuration) en couches minces et dans des nanofils. En effet, les phénomènes tels que la germination, la croissance latérale, la croissance normale et la diffusion doivent être compris pour réaliser les contacts des futurs dispositifs de la microélectronique. La comparaison entre la siliciuration en couches minces et dans les nanofils est l'un des principaux aspects de ce travail. La distribution atomique en 3D des éléments chimiques dans les différentes siliciures de Ni a été obtenue par sonde atomique tomographique (SAT). Pour permettre l'analyse par SAT de différents types des nanofils à base de silicium, plusieurs méthodes originales de préparation des échantillons par faisceau d'ions focalisés ont été développées et testées. D'autre part, des mesures in situ et en temps réel de diffusion réactive par diffraction de rayons X ont permis de mettre en évidence l'importance de la germination dans la formation des phases et de déterminer les cinétiques de formation des siliciures de Ni allié en Pt, notamment des régimes de réaction aux interfaces et de croissance latérale. La forme caractéristique associée à la croissance latérale a été déterminée par des analyses ex situ de microscopie électronique en transmission et comparée aux modèles existants. La détermination par SAT de l'espèce qui diffuse majoritairement donne aussi des indications sur les mécanismes de formation des phases et de relaxation des contraintes dans les siliciures. / This thesis focuses on the phenomena that occur during the reaction between metal and silicon (silicide) on thin films and nanowires. Indeed, phenomena such as nucleation, lateral growth, normal growth and diffusion must be understood to make contacts for future microelectronic devices. The comparison between the silicide formation on thin films and nanowires is one of the main aspects of this work. Atomic distribution in 3D for the elements in different Ni silicide phase was obtained by atom probe tomography (APT). To enable the analysis of different types of silicon nanowires by APT, several original methods for sample preparation by focused ion beam has been developed and tested. On the other hand, in situ and real-time analysis by X-ray diffraction during the reactive diffusion helped to highlight the importance of the nucleation of a phase and to determine the kinetics of formation of Ni(Pt) silicides, including the reaction on the interfaces and the lateral growth. The characteristic shape associated with the lateral growth was determined by ex-situ transmission electron microscopy analyzes and was compared with the existing theoretical models. Moreover, the determination of the fastest diffusing species by APT provided information on the mechanisms of phase formation and stress relaxation in the silicide.

Avec la réduction de taille des composants microélectroniques, le monosiliciure de nickel (NiSi) a été largement utilisé dans les transistors CMOS (Complementary-Metal-Oxide-Semiconductor) en tant que contacts pour les sources, drains et grilles. Cependant, NiSi se dégrade lors du recuit à haute température. Il apparait essentiel d'étudier la séquence de formation de phases et la stabilité du monosilicide en présence d’éléments d'alliage. Les réactions à l'état solide entre des films de Ni allié en W et/ou Pt et un substrat de Si ont été étudiées principalement par diffraction des rayons X (DRX) in-situ et sonde atomique tomographique (SAT). L'analyse combinatoire de la réaction entre des films Ni avec différents composition gradients et le Si a permis de comprendre la séquence de formation. Les concentrations des éléments d'alliage (W et Pt) ont un impact significatif sur la séquence de formation des siliciures de Ni et sur la cinétique de formation des phases. Le mécanisme d'agglomération des films minces de NiSi a également été étudié au cours de cette thèse. Un film de Ni pur de 15 nm a été déposé sur un substrat de Si enrichi de multicouches de Si isotopique. Des analyses SAT ont été effectuées sur l'échantillon de Ni/Si (isotope) après un recuit à 600°C. En observant la distribution des isotopes de Si, un mécanisme d'agglomération de NiSi a été proposé selon que les isotopes de Si restent sous forme de multicouches ou qu'ils se mélangent. Cette étude rendue possible grâce à la capacité unique de la SAT d'observer les isotopes en 3D et à l'échelle atomique apporte une meilleure compréhension de l'agglomération de films minces poly-cristallin d'intermétallique / With the downscaling of microelectronic devices, NiSi has been widely used in complementary-metal-oxide-semiconductor (CMOS) transistors as contact on source, drain and gate. However, NiSi suffers from degradation upon annealing at high temperatures. Adding alloying elements is an effective method to increase the stability of nickel monosilicide but the formation sequence of Ni silicides is substantially modified. Therefore, the studies of the phase formation sequence and the stability of monosilicide are of great importance.The solid-state reactions between Ni films alloyed with W and/or Pt and Si substrates were studied mainly by in-situ X-ray diffraction (XRD) and atom probe tomography (APT) using combinatorial analysis of co-deposited gradient films. The phase sequence was monitored by in-situ XRD and APT was used to examine the silicides and reveal the redistribution of alloying elements. The content of alloying elements (W and Pt) has a large impact on the phase sequence of Ni silicides and the kinetics of phase formation. The basic agglomeration mechanism of NiSi thin films was studied. A 15nm pure Ni film was deposited on a Si substrate enriched with isotope multilayers. APT analyses were performed on the sample of Ni/Si (isotope) after an annealing at 600°C. By observing the distribution of Si isotopes (30Si, 29Si and 28Si), whether they maintain a multilayer structure or are mixed together, a mechanism of the agglomeration of NiSi was proposed. This was possible because of the unique capability of APT to observe isotopes in 3D at the atomic scale and it allows a better understanding and to control of the agglomeration of poly-crystalline compound thin films

4H-SiC-based bipolar junction transistors (BJTs) are attractive devices for high-voltage and high-temperature operations due to their high current capability, low specific on-resistance, and process simplicity. To extend the potential of SiC BJTs to power electronic industrial applications, it is essential to realize high-efficient devices with high-current and low-loss by a reliable and wafer-scale fabrication process. In this thesis, we focus on the improvement of the 4H-SiC BJT performance, including the device optimization and process development. To optimize the 4H-SiC BJT design, a comprehensive study in terms of cell geometries, device scaling, and device layout is performed. The hexagon-cell geometry shows 42% higher current density and 21% lower specific on-resistance at a given maximum current gain compared to the interdigitated finger design. Also, a layout design, called intertwined, is used for 100% usage of the conducting area. A higher current is achieved by saving the inactive portion of the conducting area. Different multi-step etched edge termination techniques with an efficiency of &gt;92% are realized. Regarding the process development, an improved surface passivation is used to reduce the surface recombination and improve the maximum current gain of 4H-SiC BJTs. Moreover, wafer-scale lift-off-free processes for the n- and p-Ohmic contact technologies to 4H-SiC are successfully developed. Both Ohmic metal technologies are based on a self-aligned Ni-silicide (Ni-SALICIDE) process. Regarding the device characterization, a maximum current gain of 40, a specific on-resistance of 20 mΩ·cm2, and a maximum breakdown voltage of 5.85 kV for the 4H-SiC BJTs are measured. By employing the enhanced surface passivation, a maximum current gain of 139 and a specific on-resistance of 579 mΩ·cm2 at the current density of 89 A/cm2 for the 15-kV class BJTs are obtained. Moreover, low-voltage 4H-SiC lateral BJTs and Darlington pair with output current of 1−15 A for high-temperature operations up to 500 °C were fabricated. This thesis focuses on the improvement of the 4H-SiC BJT performance in terms of the device optimization and process development for high-voltage and high-temperature applications. The epilayer design and the device structure and topology are optimized to realize high-efficient BJTs. Also, wafer-scale fabrication process steps are developed to enable realization of high-current devices for the real applications. / <p>QC 20170810</p>

Epitaxially grown SiGe(C) materials have a great importance for many device applications. In these applications, (strained or relaxed) SiGe(C) layers are grown either selectively on the active areas, or on the entire wafer. Epitaxy is a sensitive step in the device processing and choosing an appropriate thermal budget is crucial to avoid the dopant out–diffusion and strain relaxation. Strain is important for bandgap engineering in (SiGe/Si) heterostructures, and to increase the mobility of the carriers. An example for the latter application is implementing SiGe as the biaxially strained channel layer or in recessed source/drain (S/D) of pMOSFETs. For this case, SiGe is grown selectively in recessed S/D regions where the Si channel region experiences uniaxial strain.The main focus of this Ph.D. thesis is on developing the first empirical model for selective epitaxial growth of SiGe using SiH2Cl2, GeH4 and HCl precursors in a reduced pressure chemical vapor deposition (RPCVD) reactor. The model describes the growth kinetics and considers the contribution of each gas precursor in the gas–phase and surface reactions. In this way, the growth rate and Ge content of the SiGe layers grown on the patterned substrates can be calculated. The gas flow and temperature distribution were simulated in the CVD reactor and the results were exerted as input parameters for the diffusion of gas molecules through gas boundaries. Fick‟s law and the Langmuir isotherm theory (in non–equilibrium case) have been applied to estimate the real flow of impinging molecules. For a patterned substrate, the interactions between the chips were calculated using an established interaction theory. Overall, a good agreement between this model and the experimental data has been presented. This work provides, for the first time, a guideline for chip manufacturers who are implementing SiGe layers in the devices.The other focus of this thesis is to implement SiGe layers or dots as a thermistor material to detect infrared radiation. The result provides a fundamental understanding of noise sources and thermal response of SiGe/Si multilayer structures. Temperature coefficient of resistance (TCR) and noise voltage have been measured for different detector prototypes in terms of pixel size and multilayer designs. The performance of such structures was studied and optimized as a function of quantum well and Si barrier thickness (or dot size), number of periods in the SiGe/Si stack, Ge content and contact resistance. Both electrical and thermal responses of such detectors were sensitive to the quality of the epitaxial layers which was evaluated by the interfacial roughness and strain amount. The strain in SiGe material was carefully controlled in the meta–stable region by implementingivcarbon in multi quantum wells (MQWs) of SiGe(C)/Si(C). A state of the art thermistor material with TCR of 4.5 %/K for 100×100 μm2 pixel area and low noise constant (K1/f) value of 4.4×10-15 is presented. The outstanding performance of these devices is due to Ni silicide contacts, smooth interfaces, and high quality of multi quantum wells (MQWs) containing high Ge content.The novel idea of generating local strain using Ge multi quantum dots structures has also been studied. Ge dots were deposited at different growth temperatures in order to tune the intermixing of Si into Ge. The structures demonstrated a noise constant of 2×10-9 and TCR of 3.44%/K for pixel area of 70×70 μm2. These structures displayed an improvement in the TCR value compared to quantum well structures; however, strain relaxation and unevenness of the multi layer structures caused low signal–to–noise ratio. In this thesis, the physical importance of different design parameters of IR detectors has been quantified by using a statistical analysis. The factorial method has been applied to evaluate design parameters for IR detection improvements. Among design parameters, increasing the Ge content of SiGe quantum wells has the most significant effect on the measured TCR value. / QC 20110405