<p>This thesis investigates the possibilities of interleaving multiple Digital to Analog converters in a high speed environment. Algorithms for interleaving and noise shaping as well as filters are tailored for high frequency operation.In the first part of the thesis, algorithms are evaluated and models to simulate errors are created. It was concluded that DAC interleaving is feasible to reach high sample rates. Interleaving or parallelization of the $\Sigma\Delta$ noise shaper proved to not be feasible for the specific application due low oversampling and high speed operation.The second part of the thesis consists of measurements on a custom SP Devices development board. These tests confirm that interleaving of DACs works as intended and that it is possible to increase the output bandwidth beyond the one of a single DAC.</p>

This thesis investigates the possibilities of interleaving multiple Digital to Analog converters in a high speed environment. Algorithms for interleaving and noise shaping as well as filters are tailored for high frequency operation.In the first part of the thesis, algorithms are evaluated and models to simulate errors are created. It was concluded that DAC interleaving is feasible to reach high sample rates. Interleaving or parallelization of the $\Sigma\Delta$ noise shaper proved to not be feasible for the specific application due low oversampling and high speed operation.The second part of the thesis consists of measurements on a custom SP Devices development board. These tests confirm that interleaving of DACs works as intended and that it is possible to increase the output bandwidth beyond the one of a single DAC.

The main purpose of this thesis is to research High-Order Sigma-Delta Analog-to-Digital converter for precision measurement, a PI compensator and a third-order Sigma-Delta modulator has been proposed based on a second-order Sigma-Delta modulator. In accordance with the analysis result of frequency domain and time domain of system, we use third-order model because of better response with auxiliary software to simulate and implement the system, then measure modulator output variance for input variation. This converter circuit demonstrates that it can achieve the requirements of precision and linearity which the measure instrument demands.

The design of a low distortion and high efficiency self-oscillating power amplifier is presented. It is designed using TSMC 0.35&#x00B5;m, 2p4m CMOS technology. We use noise shaping to reduce the THD (Total Harmonic Distortion). This design can be applied to hearing aids. The supply voltage is 1.5V for hearing aids. Experimental results demonstrate that the proposed amplifier has the total harmonic distortion (THD) of 0.0751% and power efficiency around 90.1%. Measurement result reveals that this circuit can be up to 0.25% of the THD and 89.7% of the power efficiency. This result shows that the proposed power amplifier has superior performance in THD and power efficiency, and this circuit is applicable to low-distortion, high-efficiency, and low-voltage applications, such as the hearing aids.

This thesis presents a Mixed Linear/Switching Control (MLSC) scheme for voltage regulator modules (VRM). The MLSC employs two loops of feedback compensation, inner-loop switching compensation and outer-loop linear regulation. The purpose of the switching compensation is to linearize and stabilize the buck converter under the influence of switching noise and load variation. With switching compensation, the linearized plant of the buck converter can be simplified to a first-order stable transfer function at low frequencies. Accordingly, the outer-loop linear controller can be easily designed to regulate the output voltage using the linear control theory. The advantage of the proposed MLSC scheme is two-fold: easy to design and of low circuit complexity. There is no need of using any current detecting resistor and PWM generator, and also the stability and performance can be easily met by choosing positive controller coefficients. A 12V/1V single-phase VRM with proposed control is designed and simulated, which shows an output regulation with 0.4% steady- state output error and 7% load regulation error in response to the load current steps from 60A/1A to 1A/60A, at a slew rate of 60A/&#x00B5;sec.

Dynamically charged vehicles suffer from power-loss during wireless power transfer due to vehicle coil misalignment while driving. Autonomous dynamically charged vehicles can maximize wireless power transfer by following an optimal charging path, but the repeated precision increases road wear. To avoid unnecessary road wear and rutting, a path planner can intentionally inject variability into an autonomous vehicle’s path. However, introducing variability into an optimal charging path risks depleting battery life prior to destination arrival, and it increases rider discomfort. Therefore, a path planner is proposed that guarantees average charging criteria and ensures rider comfort while reducing road wear.

This thesis is to deal with the saturation problem arisen from the integrator accumulation in the loop of the sigma-delta analog-to-digital converter. Signal passes through the accumulation of several integrators in the high-order sigma-delta analog-to-digital converter, it tends to result in saturation problem in the output of integrator. This phenomenon is prominent especially in implementation. Unable to correctly propagate signal to the next integrator stage, thus, causes the analog-to-digital converter create incorrect result. Accordingly, this thesis proposes a new anti-windup scheme by means of sliding mode control to tackle the saturation problem. We have successfully set up a criterion for the selection of parameters of the sigma-delta analog-to-digital converter to prevent the integrators from saturation. After extensive simulation and experiment, it can significantly improve the ensemble of the sigma-delta analog-to-digital modulator.

Dithered quantization and noise shaping is well known in the audio community. The image processing community seems to be aware of this same theory only in bits and pieces, and frequently under conflicting terminology. This thesis attempts to show that dithered quantization of images is an extension of dithered quantization of audio signals to higher dimensions. Dithered quantization, or ``threshold modulation'', is investigated as a means of suppressing undesirable visual artifacts during the digital quantization, or requantization, of an image. Special attention is given to the statistical moments of the resulting error signal. Afterwards, noise shaping, or ``error diffusion'' methods are considered to try to improve on the dithered quantization technique. We also take time to develop the minimum-phase property for two-dimensional systems. This leads to a natural extension of Jensen's Inequality and the Hilbert transform relationship between the log-magnitude and phase of a two-dimensional system. We then describe how these developments are relevant to image processing.

The filter complexity in the multi-stage decimation system of a Δ-Σ ADC increases progressively as one moves to higher stages of decimation due to the fact that the input word length of the higher stages also increases progressively. The main motivation for this thesis comes from the idea of investigating a way, to reduce the input word length in the later filter stages of the decimation system which could reduce the filter complexity. To achieve this, we use a noise-shaping loop between the first and later stages so that the input word length for the later stages remains smaller than in the case where we do not use the noise-shaping loop. However, the performance (SNR/ Noise-level) level should remain the same in both cases. This thesis aims at analyzing the implications of using a noise-shaping loop in between the decimation stages of a Δ-Σ ADC and also finding the appropriate decimation filter types that could be used in such a decimation system. This thesis also tries to compare the complexity introduced by using the noise-shaping loop with the reduction achieved in the later decimation stages in terms of the input word length. Filter required in the system will also be optimized using minimax optimization technique.

Dithered quantization and noise shaping is well known in the audio community. The image processing community seems to be aware of this same theory only in bits and pieces, and frequently under conflicting terminology. This thesis attempts to show that dithered quantization of images is an extension of dithered quantization of audio signals to higher dimensions. Dithered quantization, or ``threshold modulation'', is investigated as a means of suppressing undesirable visual artifacts during the digital quantization, or requantization, of an image. Special attention is given to the statistical moments of the resulting error signal. Afterwards, noise shaping, or ``error diffusion'' methods are considered to try to improve on the dithered quantization technique. We also take time to develop the minimum-phase property for two-dimensional systems. This leads to a natural extension of Jensen's Inequality and the Hilbert transform relationship between the log-magnitude and phase of a two-dimensional system. We then describe how these developments are relevant to image processing.