The aim of this diploma work is the suggestion and realization of a cardiostimulator of „On Demand“ type operated by microcontroller. The work is structured on four thematic parts. For the correct suggestion of the whole system, firstly is necessary to understand correctly the cell’s electrophysiology and heart’s anatomy, inclusive the cardiology arrhytmia, which are adherent to cardiostimulators. The cardiostimulator is inhibited by the R-wave and is adaptive on a pulse rate of a source signal. The whole system is supplied by batteries and this supplying is taken into consideration. The network’s functionality is realized on the ECG simulator. There are suggested the suitable enhancements in discussion.

This work deals with the two-stage operational amplifier with automatic offset compensation. An operational amplifier is designed in Cadence design environment for possible implementation in technology CMOS07. Emphasis work is placed on minimum offset of the operational amplifier and the parameters, that are listed in the assignment of work.

This dissertation discusses and compares the existing compensation methods for operational amplifiers. It explores a method to stabilize the op amps without sacrificing bandwidth to the same degree that commonly used methods do. A creative design methodology combining intuition, mathematical analysis, and mixed level simulation is explored for the new compensation scheme. The mixed level approach, associating system level simulation for most circuits along with device level simulation for some critical analog circuit paths, is presented to verify the behavior of new design concepts in an effective way. This approach also provides sufficient accuracy to predict the circuit performance realistically. The new feedforward compensation method overcomes the serious drawback of the widely used pole splitting method, which greatly narrows the bandwidth. It can improve the phase margin as well as optimize the bandwidth of the op amp. The proposed feedforward compensation method can be easily applied to the popular two gain stage op amp architectures with very little alteration. MOS devices are used in the weak inversion region or the subthreshold inversion region to minimize dc source power. A feasible configuration for high gain, low power op amp design utilizing subthreshold operation along with active operation is proposed. This op amp uses composite cascode connections for the differential input stage, a common source second stage, and a current mirror. A prototype of the op amp was fabricated in a 0.25 µm CMOS process. The proposed op amp produces an open loop gain above one million with low power consumption around 110 µW and shows a favorable slew rate and GBW product compared to other amplifiers driving large capacitive loads. In addition, the composite cascode amplifier requires a compensation capacitor of only 3.5 pF which allows a very small op amp cell. This design is intended for applications where simplicity of layout, small cell size, and low power are important. The open loop gain of this design is comparable to bipolar op amps and exceeds all known reported CMOS designs using the classic Widlar architecture. The fabricated op amp test results show that the BSIM3 model in CADENCE Spectre Spice Simulation matches closely to the experimental results in spite of the low current weak inversion operation of the composite cascode output device and thus provide confidence in the simulation for other similar designs. While facing the challenge of measuring the op amp open loop characteristics at decreased power supply voltages, a few viable techniques were developed to measure the op amp open loop parameters using typically available bench test equipment.

Electrochemical measurements are utilized in various fields, including healthcare (e.g., potentiometric measurements for electrolytes in blood and blood gas, amperometric biosensing of glucose as in blood glucose meters), water quality (e.g., pH measurement, voltammetric analyses for heavy metals), and energy. Much of the appeal of electrochemical analyses can be attributed to the relative simplicity, low cost and lack of maintenance associated with electrochemical instruments, along with techniques that can exhibit high sensitivity and selectivity, wide linear dynamic range, and low limits of detection for many analytes. While commercial electrochemical analyzers are less expensive than many other instruments for chemical analyses and are available from various manufacturers, versatility and performance often coincide with added expense. Recently, the development of low-cost, adaptable, open-source chemical instruments, including electrochemical analyzers, has emerged as a topic of great interest in the scientific community. In contrast to commercial instruments, for which schematics and underlying operation details are often obscured – severely limiting modifications and improvements, creators of open-source instruments release all the necessary information for reproduction of the hardware and software. As a result, open-source instruments not only serve as excellent teaching tools for novices to gain experience in electronics and programming, but also present opportunity to design and develop low-cost, portable instruments, which have particular significance for point-of-care sensing applications, use in resource-limited settings, and the rapidly developing field of on-body sensors. In this work, we report the design of a low-cost, compact electrochemical analyzer based on an open-source Arduino microcontroller. The instrument is capable of performing electrochemical analyses such as cyclic and linear sweep voltammetry with an operating range of ± 138 ��A and ± 1.65 V. Performance of the platform is investigated with low-cost pencil graphite electrodes and results compared to commercial potentiostats.

The safety concern of aging aircraft is a rising issue in terms of both safety and cost. An aircraft structure failure during flight is unacceptable. A method needs to be developed and standardized to test the integrity of both commercial and military aircrafts. The current method to test the structure of an aircraft requires the aircraft to be taken out of service for inspection; this is costly due to the inspection required to be performed and the lost use from downtime. A novice idea of an on-site structural health monitoring (SHM) system has been proposed to test the integrity of aircraft structure. An on-site system is a system that can be used to perform inspection on an aircraft simultaneously while the aircraft is in use. This SHM system uses the principles of active lamb wave and passive acoustic emission through the use of piezoelectric sensors as the sensing elements. Piezoelectric sensors can be used both as an input device and as a sensing element. This research focuses on the development of the major data acquisition electronic components of the system. These components are charge amplifier, high pass filter, low pass filter and line driver. A charge amplifier converts a high impedance signal to a low impedance signal. A high pass filter attenuates the low frequency content of a signal, while a low pass filter attenuates the high frequency content of a signal. A line driver converts a low current signal to a high current signal. All of these components need to operate up to a frequency of 2 MHz. Off-the-shelf electronics will be used for prototyping as custom components will not be feasible at this point of the research. / Master of Science

As complimentary metal-oxide semiconductor (CMOS) technologies scale and field-effect transistor (FET) architectures change, the factors in deciding to utilize analog or digital transistor behaviors evolve. This thesis examines three case studies where traditionally analog or digital circuitry has dominated published works but I show that the opposite regime has significant benefits in scaled CMOS technologies. I present a highly digital operational amplifier (traditionally analog) and two artificial neurons (traditionally digital). In Chapters 2 and 3 I present a highly-digital five-stage zero-crossing-based amplifier which breaks the trade-off between slew rate and settling accuracy. I investigate the optimal charge pump design by analyzing the effects of the current scaling factor, number of current sources, maximum current value, and input amplitude on the settling performance including overshoot and settling time. I find that there exists an optimal number of stages that yields the fastest settling for a given total current and load capacitance. The proposed amplifier achieves a signal-to-noise ratio of 57 dB at a sampling rate of 40 MHz and consumes 1.45 mW under a 1V supply. In Chapters 4 and 5, I propose two novel analog artificial spiking neurons, operating in the voltage domain and phase domain respectively. The voltage domain neuron presented in Chapter 4 implements a novel fine-tuning method called neuromodulatory tuning which reduced the number of parameters to be tuned by four orders of magnitude as compared with traditional fine-tuning methods. Chapter 5 presents the design of a novel phase-domain neuron. Voltage domain neurons mimic biological neurons by integrating charge on a capacitor. I instead integrate phase in a voltage-controlled ring oscillator (VCO). I also propose a novel bidirectional switched-capacitor synapse which saves significant area compared to bidirectional current based synapses. The proposed neuron, synapse and weight memory occupy only 21x27um, and consume 134fJ/spike under a 0.35V supply.

This master thesis is about current operational amplifiers and mainly about their internal structures and possible modifications of these structures. The Current operational amplifier consists of several elementary blocks and these blocks are shortly described and used in internal structures of proposed operational amplifiers. Basic elementary blocks of the current operational amplifier are current mirror, diferentional amplifier, current source, transimpedation amplifier and additional elements of a circuit. In this thesis, several elementary structures of the operational amplifiers are introduced. Each amplifier passed through the analysis of the circuit in software MicroCap 9.0. In this software is done the simple DC analysis of the internal structure of the current operational amplifier in connection with a feedback. The solution was focused on bipolar and unipolar technology for each connection. I deal with a method of feedback connection to the operational amplifier and explore real characteristic of the appropriate amplifier in the designed feedback. In principle this design has important influence to the resulting properties of the circuit. Within the analysis of the circuits have been found, how each current operational amplifier works in a defined current range. Every type of surveyed amplifier is closely described, the internal structure is depicted and graph of current transmission of amplifier is shown. At the end of this thesis the amplifiers are compared and there are introduced their advantages and disadvantages.

The thesis deals with emulating higher-order elements using the transformation mutators, which were described by Leon Chua in 1971. The procedure of designing mutators from their mathematical description to the synthesis of concrete electrical circuits is described. The circuit solutions are based on the utilization of advanced circuit principles in order to achieve optimal circuit performance. Mutators are implemented as a set of eight incremental modules. Via their cascade connection, it is possible to emulate arbitrary elements from the periodical table of higher-order elements. The proposed solutions are tested by means of computer simulations and also verified by measurements.

Les travaux de cette thèse sont axés sur le durcissement à la dose cumulée des circuits analogiques associés aux systèmes électroniques embarqués sur des véhicules spatiaux, satellites ou sondes. Ces types de circuits sont réputés pour être relativement sensibles à la dose cumulée, parfois dès quelques krad, souvent en raison de l’intégration d’éléments bipolaires. Les nouvelles technologies CMOS montrent par leur intégration de plus en plus poussée, un durcissement naturel à cette dose. L’approche de durcissement proposée ici, repose sur un durcissement par la conception d’une technologie commerciale « full CMOS » du fondeur ST Microelectronics, appelée HCMOS9A. Cette approche permet d’assurer la portabilité des méthodes de durcissement proposées d’une technologie à une autre et de rendre ainsi accessible les nouvelles technologies aux systèmes spatiaux. De plus, cette approche de durcissement permet de faire face aux coûts croissants de développement et d’accès aux technologies durcies. Une première technique de durcissement à la dose cumulée est appliquée à une tension de référence « full CMOS ». Elle ne fait intervenir ni jonction p-n parasites ni précautions delay out particulières mais la soustraction de deux tensions de seuil qui annulent leurs effets à la dose cumulée entre elles. Si les technologies commerciales avancées sont de plus en plus utilisées pour des applications spécialement durcies, ces dernières exhibent en contrepartie de plus grands offsets que les technologies bipolaires. Cela peut affecter les performances des systèmes. La seconde technique étudiée : l’auto zéro, est une solution efficace pour réduire les dérives complexes dues entre autres à la température, de l’offset d’entrée des amplificateurs opérationnels. Le but ici est de prouver que cette technique peut tout aussi bien contrebalancer les dérives de l’offset dues à la dose cumulée. / The purpose of this thesis work is to investigate circuit design techniques to improve the robustness to Total Ionizing Dose (TID) of analog circuits within electronic systems embedded in space probes, satellites and vehicles. Such circuits often contain bipolartransistor components which are quite sensitive to cumulated radiation dose. However highly integrated CMOS technology has been shown to exhibit better natural TDI hardening.The approach proposed here is a hardening by design using a full CMOS semiconductor technology commercially available from ST Microelectronics calledHCMOS9A. The proposed generic hardening design methods will be seen to be compatibleand applicable to other existing or future process technologies. Furthermore this approach addresses the issue of ever-increasing development cost and access to hardened technologies.The first TID hardening technique proposed is applied to a full-CMOS voltage reference. This technique does not involve p-n junctions nor any particular layout precaution but instead is based on the subtraction of two different threshold voltages which allows the cancellation of TDI effects. While the use of advanced commercial CMOS technologies for specific radiation hardened applications is becoming more common, these technologies suffer from larger inputoffs et voltage drift than their bipolar transistor counterparts, which can impact system performance. The second technique studied is that of auto-zeroing, which is an efficient method to reduce the complex offset voltage drift mechanisms of operational amplifiers due to temperature. The purpose here is to prove that this technique can also cancel input offset voltage drift due to TID.Index term : hardening, cumulated dose, CMOS technology, voltage reference,operational amplifier.

Low voltage, low power amplifiers are proposed. One of the operational amplifiers is an Operational Transconductance Amplifier (OTA) with wide input and output swing and constant gm. The second and third amplifiers are high-performance Current Operational amplifiers (COAs). All amplifiers have power supply as low as one threshold voltage plus two overdrive voltage. In this thesis, the supply voltage is 1V. Simulation results show that the OTA has the maximum linear range over 0.7V. The transconductance can be 147£gA/V, the power consumption is 0.133mW. There are two designs of the COA. Simulation results show COA(1) with a current gain of 143. The input impedance is 110£[, the output impedance is 240K£[ and the power consumption is 0.15mW. In the simulation results of the COA(2), the current gain is 110. The DC power dissipation is 0.07mW. The input and output impedance are 95£[ and 500K£[, respectively. All the proposed amplifiers are implemented on a TSMC 0.35£gm 2p4m CMOS process technology and analyzed using HSPICE.