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As the share of renewable and intermittent energy sources grow and as society becomes more electrified, electricity price volatility becomes one of the most pressing issues. The flexibility of household demand, when faced with price shocks, determines how exposed they will be to price volatility, making the estimation of their short-run price elasticity highly relevant for policymakers. The elasticity was estimated for the hourly demand, the daily demand, and the weekly demand using a difference in difference setup. All estimated elasticities were between -0.10 and -0.19, with the elasticity of hourly demand being the smallest and the elasticity of weekly demand being largest. This implies that household demand is very inelastic but grows in the longer run, even when the longer run is rather short. The elasticity differs between electricity pricing areas. The largest estimated elasticity was in the area which experienced the greatest price shock.

<p>We investigate the function ρ_<em>d</em>(<em>n</em>) = max { <em>r</em>(<em><strong>x</strong></em>) | <em><strong>x</strong></em> is a (<em>d</em>, <em>n</em>)-string } where <em>r</em>(<em><strong>x</strong></em>) is the number of runs in the string <em><strong>x</strong></em>, and a (<em>d</em>, <em>n</em>)-string is a string with length <em>n</em> and exactly <em>d</em> distinct symbols. Our investigation is motivated by the conjecture that ρ_<em>d</em>(<em>n</em>) ≤ <em>n</em>-<em>d</em>. We present and discuss fundamental properties of the ρ_<em>d</em>(<em>n</em>) function. The values of ρ_<em>d</em>(<em>n</em>) are presented in the (<em>d</em>, <em>n</em>-<em>d</em>)-table with rows indexed by <em>d</em> and columns indexed by <em>n</em>-<em>d</em> which reveals the regularities of the function. We introduce the concepts of the r-cover and core vector of a string, yielding a novel computational framework for determining ρ_<em>d</em>(<em>n</em>) values. The computation of the previously intractable instances is achieved via first computing a lower bound, and then using the structural properties to limit our exhaustive search only to strings that can possibly exceed this number of runs. Using this approach, we extended the known maximum number of runs in binary string from 60 to 74. In doing so, we find the first examples of run-maximal strings containing four consecutive identical symbols. Our framework is also applied for an arbitrary number of distinct symbols, <em>d</em>. For example, we are able to determine that the maximum number of runs in a string with 23 distinct symbols and length 46 is 23. Further, we discuss the structural properties of a shortest (<em>d</em>, <em>n</em>)-string <em><strong>x</strong></em> such that <em>r</em>(<em><strong>x</strong></em>) > <em>n</em>-<em>d</em>, should such a string exist.</p> / Doctor of Philosophy (PhD)

<p>We investigate the problem of the maximum number of distinct primitively rooted squares in a string. In comparison to considering general strings, the number of distinct symbols in the string is introduced as an additional parameter of the problem. Let S(d,n) = max {s(x) | x is a (d,n)-string}, where s(x) denotes the number of distinct primitively rooted squares in a string x and a (d,n)-string denotes a string of length n with exactly d distinct symbols.</p> <p>Inspired by the d-step approach which was instrumental in Santos' tackling of the Hirsch conjecture, we introduce a (d,n-d) table with entries S(d,n) where d is the index for the rows and n-d is the index for the columns. We examine the properties of the S(d,n) function in the context of (d,n-d) table and conjecture that the value of S(d,n) is no more than n-d. We present several equivalent properties with the conjecture. We discuss the significance of the main diagonal of the (d,n-d) table, i.e. the square-maximal (d, 2d)-strings for their relevance to the conjectured bound for all strings. We explore their structural properties under both assumptions, complying or not complying with the conjecture, with the intention to derive a contradiction. The result yields novel properties and statements equivalent with the conjecture with computational application to the determination of the values S(d,n).</p> <p>To further populate the (d,n-d) table, we design and implement an efficient computational framework for computing S(d,n). Instead of generating all possible (d,n)-strings as the brute-force approach needs to do, the computational effort is significantly reduced by narrowing down the search space for square-maximal strings. With an easily accessible lower bound obtained either from the previously computed values inductively or by an effective heuristic search, only a relatively small set of candidate strings that might possibly exceed the lower bound is generated. To this end, the notions of s-cover and the density of a string are introduced and utilized. In special circumstances, the computational efficiency can be further improved by starting the s-cover with a double square structure. In addition, we present an auxiliary algorithm that returns the required information including the number of distinct squares for each generated candidate string. This algorithm is a modified version of FJW algorithm, an implementation based on Crochemore's partition algorithm, developed by Franek, Jiang and Weng. As of writing of this thesis, we have been able to obtain the maximum number of distinct squares in binary strings till the length of 70.</p> / Doctor of Philosophy (PhD)

<p>Traditional methods for flood estimation can be categorized as (1) simplified methods, e.g., regression analysis, (2) frequency analysis of streamflow data, (3) design storm-based precipitation-runoff modeling, and ( 4) continuous precipitation-runoff simulation modeling. The new approach - the Analytical Probabilistic Stormwater Model - was developed as an alternative to provide an efficient way of getting realistic estimation of peak discharges of desired frequencies for use in stormwater management of urban areas. To extend APSWM's application to rural areas, a series of comparisons were made between the calibrated design storm-based OTTHYMO model results, frequency analysis results and APSWM results for the Ganaraska River watershed. Special considerations were given to the transformation of the input parameter values of OTTHYMO model to those of APSWM. Comparable results were obtained for large floods, while APSWM may underestimate peak discharges of low return periods. Upon further testing and development, APSWM may be used for large rural areas.</p> / Thesis / Master of Engineering (MEngr)

The configurable computing research community has provided a wealth of evidence that computational platforms based on FPGA technology are capable of cost-effectively accelerating certain kinds of computations. One actively growing area in the research community examines the benefits to computation that can be gained by reconfiguring the FPGAs in a system during the execution of an application. This technique is commonly referred to as run-time reconfiguration. Widespread acceptance of run-time reconfigurable custom computing depends upon the existence of high-level automated design tools. Given the wide variety of available platforms and the rate that the technology is evolving, a set of architecturally independent tools that provide the ability to port applications between different architectures will allow application-based intellectual property to be easily migrated between platforms. A Java implementation of such a toolset, called Janus, is presented and analyzed here. In this environment, developers create a Java class that describes the structural behavior of an application. The design framework allows hardware and software modules to be freely intermixed. During the compilation phase of the development process, the Janus tools analyze the structure of the application and adapt it to the target architecture. Janus is capable of structuring the run-time behavior of an application to take advantage of the resources available on the platform. Examples of applications developed using the toolset are presented. The performance of the applications is reported. The retargeting of applications for multiple hardware architectures is demonstrated. / Ph. D.

In the past, various approaches to the high performance numerical computing problem have been explored. Recently, researchers have begun to explore the possibilities of using Field Programmable Gate Arrays (FPGAs) to solve numerically intensive problems. FPGAs offer the possibility of customization to any given application, while not sacrificing applicability to a wide problem domain. Further, the implementation of data flow graphs directly in silicon makes FPGAs very attractive for these types of problems. Unfortunately, current FPGAs suffer from a number of inadequacies with respect to the task. They have lower transistor densities than ASIC solutions, and hence less potential computational power per unit area. Routing overhead generally makes an FPGA solution slower than an ASIC design. Bit-oriented computational units make them unnecessarily inefficient for implementing tasks that are generally word-oriented. And finally, in large volumes, FPGAs tend to be more expensive per unit due to their lower transistor density. To combat these problems, researchers are now exploiting the unique advantage that FPGAs exhibit over ASICs: reconfigurability. By customizing the FPGA to the task at hand, as the application executes, it is hoped that the cost-performance product of an FPGA system can be shown to be a better solution than a system implemented by a collection of custom ASICs. Such a system is called a Configurable Computing Machine (CCM). Many aspects of the design of the FPGAs available today hinder the exploration of this field. This thesis addresses many of these problems and presents the embodiment of those solutions in the Colt CCM. By offering word grain reconfiguration and the ability to partially reconfigure at computational element resolution, the Colt can offer higher effective utilization over traditional FPGAs. Further, the majority of the pins of the Colt can be used for both normal I/O and for chip reconfiguration. This provides higher reconfiguration bandwidth contrasted with the low percentage of pins used for reconfiguration of FPGAs. Finally, Colt uses a distributed reconfiguration mechanism called Wormhole Run-Time Reconfiguration (RTR) that allows multiple data ports to simultaneously program different sections of the chip independently. Used as the primary example of Wormhole RTR in the patent application, Colt is the first system to employ this computing paradigm. / Ph. D.