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Electrical Properties of n-MOSFETs under Uniaxial Mechanical StrainTsai, Mei-Na 18 January 2012 (has links)
Metal-oxide-semiconductor field-effect transistors (MOSFETs) are major devices inintegrated circuit, extensively used in various electronic products. In order to improve the electrical characteristics, scaling channel width and length, using high-£e gate dielectric insulator, and strained silicon may be utilized to increase the driving current and circuit speed. Nevertheless, the scaling of the channel width and length must overcome the limitation of the photolithographytechnology and cost. Once the method is employed, the MOSFETs will face a serious short-channel effect and gate leakage current. In the aspect of high-£e gate dielectric insulator, there still have problems, containing the trap states, phonon scattering, dipole-induced threshold voltage variation, needed to be solved. This dissertation focuses on the properties of MOSFETs experienced an external-mechanical strain, where the channel will be strained. Hence, the mobility, driving current, and circuit speed will increase. Our research can be divided into three topics: fabricating process-induced strained Si, external mechanical stress-induced strained Si, and the properties of strained Si MOSFETs at different temperatures. Except the electrical measurement, we also used the ISE-TCAD to simulate the electrical characteristic of MOSFETs under stress.
Firstly, we apply the stress on n-MOSFETs by utilizing the nitride-capping layer. Once the lattice is strained, the mobility will increase, hence resulting in the operating speed. Secondly, the electrical characteristics under external stress is explored by introduced the external mechanical stress along the channel length of nMOSFETs. In addition to the fabricating process-induced strain, the fabricating process condition will also influence the device characteristics. As a result, we propose a new strain technology for our following research. Thirdly, the device performance of strained Si under different temperatures is investigated. Finally, we discuss the gate leakage current in strained Si depending on the ultra-thin gate oxide layer.
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Technology development and study of rapid thermal CVD high-K gate dielectrics and CVD metal gate electrode for future ULSI MOSFET device integration zirconium oxide, and hafnium oxide /Lee, Choong-ho. January 2003 (has links)
Thesis (Ph. D.)--University of Texas at Austin, 2003. / Vita. Includes bibliographical references. Available also from UMI Company.
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Intrinsic and extrinsic parameter fluctuation limits on gigascale integration (GSI)Tang, Xinghai 08 1900 (has links)
No description available.
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Development of CMOS active pixel sensorsGreig, Thomas Alexander January 2008 (has links)
This thesis describes an investigation into the suitability of complementary metal oxide semiconductor (CMOS) active pixel sensor (APS) devices for scientific imaging applications. CMOS APS offer a number of advantages over the established charge-coupled device (CCD) technology, primarily in the areas of low power consumption, high-speed parallel readout and random (X-Y) addressing, increased system integration and improved radiation hardness. The investigation used a range of newly designed Test Structures in conjunction with a range of custom developed test equipment to characterise device performance. Initial experimental work highlighted the significant non-linearity in the charge conversion gain (responsivity) and found the read noise to be limited by the kTC component due to resetting of the pixel capacitance. The major experimental study investigated the contribution to dark signal due to hot-carrier injection effects from the in-pixel transistors during read-out and highlighted the importance of the contribution at low signal levels. The quantum efficiency (QE) and cross-talk were also investigated and found to be limited by the pixel fill factor and shallow depletion depth of the photodiode. The work has highlighted the need to design devices to explore the effects of individual components rather than stand-alone imaging devices and indicated further developments are required for APS technology to compete with the CCD for high-end scientific imaging applications. The main areas requiring development are in achieving backside illuminated, deep depletion devices with low dark signal and low noise sampling techniques.
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Electrical Transport In Metal-oxide-semiconductor CapacitorsArikan, Mustafa 01 October 2004 (has links) (PDF)
The current transport mechanisms in metal-oxide-semiconductor (MOS) capacitors have been studied. The devices used in this study have characterized by current-voltage analyses. Physical parameter extractions and computer generated fit methods have been applied to experimental data. Two devices have been investigated: A relatively thick oxide (125 nm) and an ultra-thin oxide (3 nm) MOS structures. The voltage and temperature dependence of these devices have been explained by using present current transport models.
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Atomic layer deposition of nanolaminate high-κ gate dielectrics for amorphous-oxide semiconductor thin film transistorsTriska, Joshua B. 10 June 2011 (has links)
Nanolaminate dielectrics combine two or more insulating materials in a many-layered film. These structures can be made to significantly outperform films composed of a single one of their constituent materials by adjusting the composition ratio, arrangement, and size of the component layers. In this work, atomic layer deposition (ALD) is used to fabricate pure-oxide and nanolaminate dielectrics based upon Al₂O₃ and ZrO₂. The relative performance of these dielectrics is investigated with respect to application as gate dielectrics for ZnSnO (ZTO) and InGaZnO (IGZO) amorphous-oxide-semiconductor (AOS) thin-film transistors (TFTs). AOS TFTs are promising candidates for commercial use in applications such as active-matrix displays and e-paper. It was found that the layer thickness, relative composition, and interfacial material all had an effect on TFT performance. Several variants of the Al₂O₃/ZrO₂ nanolaminate were found to exhibit superior properties to either Al₂O₃ or ZrO₂ alone. / Graduation date: 2011
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Distortion analysis of CMOS analog integrated circuits operating in the moderate inversion region and implications for RF applications /Toole, William January 1900 (has links)
Thesis (Ph. D.)--Carleton University, 2004. / Includes bibliographical references (p. 217-223). Also available in electronic format on the Internet.
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Iterative decoding in analog VLSI /Hemati, Saied, January 1900 (has links)
Thesis (Ph.D.) - Carleton University, 2005. / Includes bibliographical references (p. 182-193). Also available in electronic format on the Internet.
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The study of single phase diode rectifiers with high power factor and low total harmonic distortionTella, Pranavi Chowdari. Islam, Naz E. January 2008 (has links)
The entire thesis text is included in the research.pdf file; the official abstract appears in the short.pdf file; a non-technical public abstract appears in the public.pdf file. Title from PDF of title page (University of Missouri--Columbia, viewed on October 6, 2009). Thesis advisor: Dr. Naz E. Islam. Includes bibliographical references.
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Ultra low power analog to digital converter for biomedical applications /Abdelhalim, Karim, January 1900 (has links)
Thesis (M.App.Sc.) - Carleton University, 2007. / Includes bibliographical references (p. 143-145). Also available in electronic format on the Internet.
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