Taiwan manufacturer has the cost advantage of manufacture and is famous in the world. Taiwan Electronic Passive Component(E.P.C.) company has the big pressure from those lower labor and land cost countries such as China because the technical entry barrier of passive component is low. Due to this situation, Taiwan passive component company endeavor to develop high-valued product and keep the strong relation with the customer in order to maintain the long-term profitability. Thus, the low-end and mid-end of passive component is occupied by Taiwan passive component company. Meanwhile, Taiwan Passive component company plan to develop high-end of passive component and to get more profit from these niche product. Taiwan subsidiary of international passive component company has the big competitive pressure on it. If Taiwan subsidiary of international passive component company does not take the appropriate strategy, this niche market will be expected to lose in the near future. Based on industry analysis and supplier analysis of Electronic Passive Component(E.P.C.),and case study from Taiwan subsidiary of international passive company, the thesis explored the success experience of competitive advantage from the case research of mainly utilizing The Five Force Analysis Model, Resource-Based View(R.B.V.), and SWOT Analysis. The suggestion were conclude as followed. 1.To Taiwan E.P.C. industry: To have the strong relation with each Design-Center of Japan, America, and Europe; to get the advantage of key material and manufacture process; to keep improving quality management. 2.To the research firm: To differentiate professional and technical support service; provide just-in-time delivery; to make the low-end product in the lower land and labor cost country.

The development of high power density three-phase ac converter has been a hot topic in power electronics area due to the increasing needs in applications like electric vehicle, aircraft and aerospace, where light weight and/or low volume is usually a must. Many challenges exist due to the complicated correlations in a three-phase power converter system. In addition, with the emerging SiC device technology the operating frequency of the converter can be potentially pushed to the range from tens of kHz to hundreds of kHz at higher voltage and higher power conditions. The extended frequency range brings opportunities to further improve the power density of the converter. Technologies based on existing devices need to be revisited. In this dissertation, a systematic methodology to analyze and design the high power density three-phase ac converter is developed. All the key factors of the converter design are explored from the high density standpoint. Firstly, the criteria for the passive filter selection are derived and the relationship between the switching frequency and the size of the EMI filter is investigated. A function integration concept as well as the physical design approach is proposed. Secondly, a topology evaluation method is presented, which provides the insight into the relationships between the system constraints, operating conditions and design variables. Four topologies are then compared with the proposed approach culminating with a favored topology under the given conditions. Thirdly, a novel average model is developed for the selected topology, and used for devising a carrier-based control approach with simple calculation and good regulation performance. Fourthly, the converter failure mode operation and corresponding protection approaches are discussed and developed. Finally, a 10 kW three-phase ac/ac converter is built with the SiC devices. All the key concepts and ideas developed in this work are implemented in this hardware system and then verified by the experimental results. / Ph. D.

Three-phase voltage source converters(VSCs) have become the converter of choice in many ac medium and high power applications due to their many advantages, including low harmonics, high power factor, and high efficiency. Modular VSCs have also been a popular choice as building blocks to achieve even higher power, primarily through converter paralleling. In addition to high power ratings, paralleling converters can also provide system redundancy through the so-called (N+1) configuration for improved availability, as well as allow easy implementation of converter power management. Interleaving can further improve the benefit of paralleling VSCs by reducing system harmonic currents, which potentially can increase system power density. There are many challenges to implement interleaving in paralleled VSCs system due to the complicated relationships in a three-phase power converter system. In addition, to maximize the benefit of interleaving, current knowledge of symmetric interleaving is not enough. More insightful understanding of this PWM technology is necessary before implement interleaving in a real paralleled VSCs system. In this dissertation, a systematic methodology to analyze and design a paralleled three-phase voltage source converters with interleaving is developed. All the analysis and proposed control methods are investigated with the goal of maximizing the benefit of interleaving based on system requirement. The dissertation is divided into five sections. Firstly, a complete analysis studying the impact of interleaving on harmonic currents in ac and dc side passive components for paralleled VSCs is presented. The analysis performed considers the effects of modulation index, pulse-width-modulation (PWM) schemes, interleaving angle and displacement angle. Based on the analysis the method to optimize interleaving angle is proposed. Secondly, the control methods for the common mode (CM) circulating current of paralleled three-phase VSCs with discontinuous space-vector modulation (DPWM) and interleaving are proposed. With the control methods, DPWM and interleaving, which is a desirable combination, but not considered possible, can be implemented together. In addition, the total flux of integrated inter-phase inductor to limit circulating current can be minimized. Thirdly, a 15 kW three phase ac-dc rectifier is built with SiC devices. With the technologies presented in this dissertation, the specific power density can be pushed more than 2kW/lb. Fourthly, the converter system with low switching frequency is studied. Special issues such as beat phenomenon and system unbalance due to non-triplen carrier ratio is explained and solved by control methods. Other than that, an improved asymmetric space vector modulation is proposed, which can significantly reduce output current total harmonic distortion (THD) for single and interleaved VSCs system. Finally, the method to protect a system with paralleled VSCs under the occurrence of internal faults is studied. After the internal fault is detected and isolated, the paralleled VSCs system can continue work. So system reliability can be increased. / Ph. D.

企業在彼此競爭以爭食市場大餅時，除了須要持續監控外部商機，積極掌握市場脈動，並推出符合其需求的商品以滿足顧客需求之外、也須要有效率地運用有限資源，妥善處理如採購、資金規畫、廠房設置乃迄於人員調派等各類非屬核心的支援性創價活動，綜言之，即透過高效率的公司治理，才有可能達成永續經營的終極目標。本研究透過個案研究，利用個案公司– A公司各類資料，以公司治理之理論架構為基礎，據此深度觀察A公司所採取之各類關鍵策略、行動和結果，乃迄於最終的財務面經營績效，據此釐清決定個案公司經營績效的關鍵失敗因素，以及公司治理在其中發揮的功能，作為實務界的參考。 本研究針對A公司2003年至2008年發展及決策進行深入探討，據此瞭解A公司為何2006甫上櫃，2008年就因資金周轉不靈而跳票下櫃。經研析後，可得知A公司在2003年至2008年之間，遭遇以下各類關鍵經營問題： 1.本業經營績效逐年下滑 2.投資規劃過於樂觀，未考量當不如預期時對公司之可能影響。 3.對新產品營收過於樂觀，未考量由於新產品送樣期過長，產線建置過早，致使相關設備閒置。 由於A公司管理階層與外部股東之間存在「帝國建立」的代理矛盾，再加上A公司的董事長兼任總經理，因此具有「所有權與經營權重疊」現象。此時則A公司便極有可能因為負責人「帝國建立」的傾向，導致決策失誤，進而危害到公司所有利害關係人之利益。本研究利用中華公司治理協會所提出之公司治理實地評量表進行研析，亦得知造成A公司跳票下櫃之主要原因在於其未積極「強化董事會職能」，並未強化「管理階層的紀律與溝通」。 由於A公司管理階層具有「帝國建立」傾向，再加上A公司由於未能保持「經營權與所有權分離」，並「強化董事會職能」、「強化管理階層的紀律與溝通」，終而使得「本業經營績效逐年下滑」，但仍於短時間內進行大量投資，終而使得「投資過速且投資標的所產生之現金流量過少、速度過慢，投資效益未能顯現」等兩類原因，最終因跳票而黯然下櫃。 關鍵字：公司治理、董事會職能、被動元件產業 / Firms shall efficiently allocate limited internal resources, dealing with all kinds of activities including procurement, capital planning, etc. so as to raise up chances of effective competition against other competitors. In others words, firms must rely on effective company governance to assure sustainable development & profitability. Based on company governance related theory & structure, the paper pays attention to conducting cases study method on Company A. Via in-depth digging how Company A performed during the period of 2003 to 2008, why Company A over-invested during 2003 – 2008, why Board of Directors didn’t function well so as to correct the causing-disaster decision by kinds of analyses, this paper finds out below reasons to cause Company A to be delisted in 2008: 1.Performance of core business (manufacturing and sales of ferrite core) getting worse gradually. 2.Over-investment due to overconfidence regarding internal resources allocation. 3.Overconfidence regarding sales of new product. The root causes why Company made above mistakes could be generalized as below list: 1.“Empire Building” agency conflict existed between managers and stockholders. 2.The un-separation of Ownership and control. 3.Independent directors of Board of Directors don’t function well to provide insightful, effective-monitoring opinions. Managers are under loose monitoring of Board of Directors. 4.There is little discipline regarding how managers behave in daily operation and critical decision making. Keyword: Company governance, Board of Directors, Passive Component Industry

L’objectif de cette thèse a été premièrement de réaliser des dispositifs passifs intégrés à base de lignes à onde lentes nommées S-CPW (pour « Slow-wave CoPlanar Waveguide ») aux fréquences millimétriques. Plusieurs technologies CMOS ou BiCMOS ont été utilisées: CMOS 65 nm et 28 nm ainsi que BiCMOS 55 nm. Deux baluns, le premier basé sur une topologie de rat-race et le second basé sur un diviseur de puissance de Wilkinson modifié, ainsi qu’un inverseur de phase, ont été réalisés et mesurés dans la technologie CMOS 65 nm. Les résultats expérimentaux obtenus se situent à l’état de l’art en termes de performances électriques. Un coupler hybride et un diviseur de puissance avec des sorties en phase sans isolation ont été conçus en technologie CMOS 28 nm. Les simulations montrent de très bonnes performances pour des dispositifs compacts. Les circuits sont en cours de fabrication et pourront très bientôt être caractérisés. Ensuite, une nouvelle topologie de diviseurs de puissance, avec sorties en phase et isolé a été développée, offrant une grande flexibilité et compacité en comparaison des diviseurs de puissance traditionnels. Cette topologie est parfaitement adaptée pour les technologies silicium. Comme preuve de concept, deux diviseurs de puissance avec des caractéristiques différentes ont été réalisés en technologie PCB microruban à la fréquence de 2.45 GHz. Un composent a été conçu à 60 GHz en technologie BiCMOS 55 nm utilisant des lignes S CPW. Les simulations prouvent que le dispositif est faibles pertes, adapté et isolé. Les circuits sont également en cours de fabrication. Enfin, deux topologies de « reflection type phase shifter » ont été développées, la première dans la bande RF et la seconde aux fréquences millimétrique. Pour la bande RF, le déphasage atteint plus de 360° avec une figure de mérite très élevée en comparaison avec l’état de l’art. En ce qui concerne le déphaseur dans la bande millimétrique, la simulation montre un déphasage de 341° avec également une figure de mérite élevée. / The first purpose of this work was the use of slow-wave coplanar waveguides (S CPW) to achieve various passive components with the aim to show their great potential and interest at millimetre-waves. Several CMOS or BiCMOS technologies were used: CMOS 65 nm and 28 nm, and BiCMOS 55 nm. Two baluns, one based on a rat-race topology and the other based on a modified Wilkinson power divider, and a phase inverter, were achieved and measured in a 65 nm CMOS technology. State-of-the-art results were achieved. A branch-line coupler and an in phase power divider without isolation were designed in a 28 nm CMOS technology. Really good performances are expected for these compact devices being yet under fabrication. Then, a new topology of in phase and isolated power divider was developed, leading to more flexibility and compactness, well suited to millimetre-wave frequencies. Two power dividers with different characteristics were realized in a PCB technology at 2.45 GHz by using microstrip lines, as a proof-of-concept. After that, a power divider was designed at the working frequency of 60 GHz in the 55 nm BiCMOS technology with S CPWs. The simulation results showed a low loss, full-matched and isolated component, which is also under fabrication and will be characterized as soon as possible. Finally, two new topologies of reflection type phase shifters were presented, one for the RF band and one for the millimetre-wave one. For the one in RF band, the phase shift can reach more than 360° with a great figure-of-merit as compared to the state-of-the-art. Concerning the phase shifter in the millimetre-wave band, the simulation results show a phase shift of 341° with also a high figure-of-merit.

Thesis (PhD)--University of Pretoria, 2013. / Electrical, Electronic and Computer Engineering

Over the past ten years, there has been increased use of electronic power processing in alternative, sustainable, and distributed energy sources, as well as energy storage systems, transportation systems, and the power grid. Three-phase voltage source converters (VSCs) have become the converter of choice in many ac medium- and high-power applications due to their many advantages, such as high efficiency and fast response. For transportation applications, high power density is the key design target, since increasing power density can reduce fuel consumption and increase the total system efficiency. While power electronics devices have greatly improved the efficiency, overall performance and power density of power converters, using power electronic devices also introduces EMI issues to the system, which means filters are inevitable in those systems, and they make up a significant portion of the total system size and cost. Thus, designing for high power density for both power converters and passive components, especially filters, becomes the key issue for three-phase converters. This dissertation explores two different approaches to reducing the EMI filter size. One approach focuses on the EMI filters itself, including using advanced EMI filter structures to improve filter performance and modifying the EMI filter design method to avoid overdesign. The second approach focuses on reducing the EMI noise generated from the converter using a three-level and/or interleaving topology and changing the modulation and control methods to reduce the noise source and reduce the weight and size of the filters. This dissertation is divided into five chapters. Chapter 1 describes the motivations and objectives of this research. After an examination of the surveyed results from the literature, the challenges in this research area are addressed. Chapter 2 studies system-level EMI modeling and EMI filter design methods for voltage source converters. Filter-design-oriented EMI modeling methods are proposed to predict the EMI noise analytically. Based on these models, filter design procedures are improved to avoid overdesign using in-circuit attenuation (ICA) of the filters. The noise propagation path impedance is taken into consideration as part of a detailed discussion of the interaction between EMI filters, and the key design constraints of inductor implementation are presented. Based on the modeling, design and implementation methods, the impact of the switching frequency on EMI filter weight design is also examined. A two-level dc-fed motor drive system is used as an example, but the modeling and design methods can also be applied to other power converter systems. Chapter 3 presents the impact of the interleaving technique on reducing the system passive weight. Taking into consideration the system propagation path impedance, small-angle interleaving is studied, and an analytical calculation method is proposed to minimize the inductor value for interleaved systems. The design and integration of interphase inductors are also analyzed, and the analysis and design methods are verified on a 2 kW interleaved two-level (2L) motor drive system. Chapter 4 studies noise reduction techniques in multi-level converters. Nearest three space vector (NTSV) modulation, common-mode reduction (CMR) modulation, and common-mode elimination (CME) modulation are studied and compared in terms of EMI performance, neutral point voltage balancing, and semiconductor losses. In order to reduce the impact of dead time on CME modulation, the two solutions of improving CME modulation and compensating dead time are proposed. To verify the validity of the proposed methods for high-power applications, a 100 kW dc-fed motor drive system with EMI filters for both the AC and DC sides is designed, implemented and tested. This topology gains benefits from both interleaving and multilevel topologies, which can reduce the noise and filter size significantly. The trade-offs of system passive component design are discussed, and a detailed implementation method and real system full-power test results are presented to verify the validity of this study in higher-power converter systems. Finally, Chapter 5 summarizes the contributions of this dissertation and discusses some potential improvements for future work. / Ph. D.

L’augmentation du nombre d’appareils communicants et du débit de données a pour conséquence une montée en fréquence des dispositifs micro-ondes, notamment dans le secteur du spatial. L’optimisation des modules existants n’est pas toujours suffisante. Il faut donc synthétiser de nouveaux circuits. Cependant, la plupart des méthodes de synthèse existantes, inclues dans les logiciels de CAO, ne prennent pas en compte les modèles à pertes des fondeurs. Or, plus la fréquence de fonctionnement est élevée, plus leurs prises en compte est indispensable. Cette thèse propose une nouvelle méthode de synthèse et de conception pour les circuits faible bruit intégrés (amplificateur faible bruit et mélangeur). Elle prend en compte les modèles à pertes des composants passifs des fondeurs, les lignes de connexion, les jonctions et elle combine plusieurs fonctions comme l’amplification et le filtrage ainsi que le mélange et le filtrage. Elle a été validée en simulation et en mesure. / Due to the evolution of wireless systems and data rate, it is necessary to increase microwave operating frequencies, especially in space industry. Optimization of existing circuit topologies are always not enough and therefore, we need to synthetize new circuits. Unfortunately, most of the existing synthesis methods, including in CAD softwares, are only based on lossless passive component models. With the increase of operating frequency, we need to take the effect of losses in the passive component models during synthesis. This thesis introduces a new synthesis and design method for low noise integrated circuits(low noise amplifier and mixer). Lossy passive component models from foundries, connecting wires, junctions and co-design (amplification and filtering or mixing and filtering)are included. The design procedure was validated by simulations and measurements.