Integration of living cells with novel microdevices requires the development of innovative technologies for manipulating cells. Chemical surface patterning has been proven as an effective method to control the attachment and growth of diverse cell populations. Patterning polyelectrolyte multilayers through the combination of layer-by-layer self-assembly technique and photolithography offers a simple, versatile and silicon compatible approach that overcomes chemical surface patterning limitations, such as short-term stability and low protein adsorption resistance. In this study, direct photolithographic patterning of PAA/PAAm and PAA/PAH polyelectrolyte multilayers was developed to pattern mammalian neuronal, skeletal and cardiac muscle cells. For all studied cell types, PAA/PAAm multilayers behaved as a negative surface, completely preventing cell attachment. In contrast, PAA/PAH multilayers have shown a cell-selective behavior, promoting the attachment and growth of neuronal cells (embryonic rat hippocampal and NG108-15 cells) to a greater extent, while providing a little attachment for neonatal rat cardiac and skeletal muscle cells (C2C12 cell line). PAA/PAAm multilayer cellular patterns have also shown a remarkable protein adsorption resistance. Protein adsorption protocols commonly used for surface treatment in cell culture did not compromise the cell attachment inhibiting feature of the PAA/PAAm multilayer patterns. The combination of polyelectrolyte multilayer patterns with different adsorbed proteins could expand the applicability of this technology to cell types that require specific proteins either on the surface or in the medium for attachment or differentiation, and could not be patterned using the traditional methods.

Much of today's high performance computing engines and hand-held mobile devices are products of aggressive CMOS scaling. Technology scaling in semiconductor industry is mainly driven by corresponding improvements in optical lithography technology. Photolithography, the art used to create patterns on the wafer is at the heart of the semiconductor manufacturing process. Lately, improvements in optical technology have been difficult and slow. The transition to deep ultra-violet (DUV) light source (193nm) required changes in lens materials, mask blanks, light source and photoresist. It took more than ten years to develop a stable chemically amplified resist (CAR) for DUV. Consequently, as the industry moves towards manufacturing end-of-the-roadmap CMOS devices, lithography is still based on 193nm light source to print critical dimensions of 45nm, 32nm and likely 22nm. Sub-wavelength lithography creates a number of printability issues. The printed patterns are highly sensitive to topographic changes due to metal planarization, overlay errors, focus and dose variations, random particle defects to name a few. Design for Manufacturability methodologies came into being to help analyze and mitigate manufacturing impacts on the design. Although techniques such as Resolution Enhancement Techniques (RET) which involve optical proximity correction (OPC), phase shift masking (PSM), off-axis illumination (OAI) have been used to greatly improve the printability and better the manufacturing process window, they cannot perfectly compensate for these lithographic deficiencies. DFM methods were primarily devised to predict and correct systematic patterning problems that arise during manufacturing. Apart from systematic errors, random manufacturing variations may occur during photolithography. This is where a statistical approach to modeling of error behavior and its impact on different design parameters may prove to be effective. By incorporating statistical analysis to parameter variation, an effective, non-conservative design can be obtained. IC manufacturing yield is the foremost measure that determines the profitability of a given semiconductor manufacturing process. Thus early prediction of yield detractors is an important step in the design process. Such predictions are based on models, which in turn are rooted in manufacturing process. Success of yield prediction is based on quality of models. The models must capture physical phenomena and yet be efficient for computation. In this work, we present a lithography-based yield model that is computationally practical for use in the design process. The work also provides a methodology to perform statistical lithography rules check to identify hot spots in the design that can contribute to yield loss. Yield recovery methods aimed at minimally modifying the design ultimately produce more printable masks. Apart from IC manufacturing yield, ICs today are vulnerable to various reliability failures including electromigration (EM), negative bias temperature instability (NBTI), hot carrier injection (HCI) and electro-static discharge (ESD). Though such reliability issues have been examined since the beginning of CMOS, manufacturability impacts have created a renewed interest in analyzing them. In this dissertation, we introduce the concept of Design for reliable manufacturability (DFRM) to consider the effect of linewidth changes, gate oxide thickness variations and other manufacturing artifacts. A novel Litho-aware EM calibration and analysis has bee shown in this work. Results indicate that there is a significant difference in EM estimation when litho-predicted layouts are considered during analysis. DFM has always looked at linewidth and material thickness variation as detractors to the design. However, such variations are inevitable. In this work we also consider modeling sensitivity to variations to improve test pattern quality. Test structures sprinkled all over the wafer encounter varying process fluctuations. This can be harnessed to predict the current lithographic process corner which will later be used to choose the test pattern set that results in maximum fault coverage. In summary, the objective of this dissertation is to consider the impact of sub-wavelength lithography on printability and the overall impact on circuit reliability and manufacturing test development.

Warped wafers and all the issues arise with them. are known issue in semiconductor industry. To solve those issues, the shape of the wafer needs to be known precisely. Current way of working when it comes to warped wafers is far from ideal within the company. A batch of wafers is acquired at customer’s site and it is assumed, that all the wafers in the batch are warped identically. A single specimen, representing the whole batch, is then taken to external company to be measured. As the method of measuring currently used contaminates and scratches the wafer, wafer must be scrapped afterwards. All the logistics and scrapped wafers add unnecessary costs to the company.  To optimize the warpage measuring procedure, a graduation internship project was initiated with a goal to develop a prototype of the tool, enabling inhouse warpage measuring.  The report contains all the methodology used to reach the final concept and results and includes methods such as: WBS, GANTT chart, Functional breakdown, Design requirement specification, Morphological matrix and PUGH’s matrix.  Final concept of warpage measuring tool consisted of implementing wafer sorting apparatus for wafer handling and enclosing the measuring tool to a custom housing, resembling a FOUP (Front Opening Unified Pod), allowing wafer sorting apparatus to load and unload test specimen for measuring. The measuring concept consists of rotary stage, where the wafer is loaded and rotated in addition to linear stage, that holds a confocal sensor above the wafer and moves it across the surface of the wafer, measuring the profile of the wafer, rotated every defined number of degrees between the measurements. Gravity induced deflection is eliminated by flipping the wafer using same wafer sorting apparatus and measuring the wafer inverted, thus allowing to estimate the true shape of the wafer.  The concept was developed in more detail, drawings for manufacturing the parts were created and the parts for building a functional prototype were ordered. Because of the COVID-19 pandemic, there were inevitable communication difficulties and delays in lead times, resulting in parts arriving on the last days of the internship, leaving no time for assembling and testing the actual prototype, therefore proof of concept is yet left to be tested by the employees of the company. / Vrängda kiselplattor och de problem som uppstår på grund av det är ett känt fenomen inom halvledarindustrin. För att kringgå dessa problem behövs god mätnoggranhet och det nuvarande sättet att hantera vrängda kiselplattor på inom företaget är långt från idealt. En batch kiselplattor hämtas hos kunden med antagandet att alla kiselplattor är identiskt vrängda. Ett enda exemplar som representerar hela batchen väljs sedan ut och skickas till ett externt mätföretag. Metoden som används för att mäta kiselplattan innehåller föroreningar och metoden repar även kiselplattan, som därmed inte kan användas efteråt. Utöver mätmetodens brister tillkommer även en utökad logistik och större materialspill som tillför kostnader för företaget.  Examensarbetets syfte är att förbättra mätmetoden som används för att utvärdera kiselplattornas vrängning och målet med projektet är att utveckla en prototyp som tillåter att mätmetoden görs internt inom företaget.  Rapporten innehåller metodiken som användes för att uppnå det slutgiltiga konceptet samt resultatet, och innehåller planeringsmoment samt projektets delmoment som: WBS, GANNT, funktionsnedbrytning, kravspecifikationer samt urvalsmatriser.  Det valda konceptet består av en sorteringsmaskin kombinerat med mätutrustningen och liknar en FOUP (Front Opening Unified Pod), vilket tillåter sorteringsmaskinen att tillföra och byta ut kiselplattorna som ska mätas. Mätutrustningen består av en roterande rörelse hos kiselplattan och en linjär rörelse hos en konfokal sensor placerad ovanför kiselplattan. Kombinationen av de båda rörelserna tillåter att hela kiselplattans yta mäts med ett givet vinkel- och radiellt steg. Genom att vända kiselplattan uppochner med sorteringsmaskinen och utföra samma mätning igen kan kiselplattans korrekta form estimeras genom att eliminera gravitationseffekten.  Konceptet utvecklades i detalj och tillverkningsunderlag och ritningar togs fram samt komponenter avsedda för tillverkning av en prototyp beställdes. På grund av COVID-19 pandemin uppstod dock kommunikationssvårigheter och förseningar i ledtider. Detta påverkade leveranserna och en del komponenter kom inte fram förrän i slutet av examensarbetet och det fanns därmed ingen tid över för montering eller tester som kan styrka konceptet, vilket får lämnas över till företagets anställda.

The layer-by-layer molecular-level manipulation of ionic polymer have been utilized to fabricate ultrathin multilayer films (SAMp). In this process, monolayers of polycations and polyanions are sequentially adsorbed onto a substrate surface by alternately dipping the substrate into aqueous solutions of poly(vinylamine) backbone azo (PDYE), poly(sodium 4-styrenesulfonate) (PSS), and poly(al1ylamine hydrochloride) (PAH). The ionic attractions developed between the oppositely charged polymers promote strong interlayer adhesion and a uniform and linear multilayer deposition process. UV/Vis absorbance, contact angle, and ellipsometry measurements revealed that in all cases the bilayer deposition process was linear and highly producible from layer to layer and film thickness of up to 1 µm can be easily obtained by repeating the deposition process. The typical thickness of bilayer film depend on the solution concentration. Contact angle and UV/Vis spectroscopy measurements demonstrated that the deposition time for a full monolayer coverage of azo dye and PAH was about 20 seconds. Our results showed that the mechanical stability of these SAMp films was remarkable, and SAMp films can only be removed from the substrate by scraping. SAMp films are stable in the common organic solvents and even in the high acidic media (6M HCl aqueous solution). The conformation of these films are thermally stable at high temperature. In an attempt to develop patterned surfaces of sulfonate and thiol functionality, close-packed, well-ordered (3-mercaptopropyl)trimethoxysilane (MPS) monolayer were formed on the surfaces of single crystal silicon, quartz, and glass by allowing hydrolyzed silane to self-assemble from a dilute hydrocarbon solution. The films of MPS were irradiated with an ozone-producing UV light source results in efficient conversion of the surface-localized thiol groups to sulfonated groups, a complete photo-oxidation of the thiol surface was obtained and characterized by x-ray photoelectron spectroscopy (XPS) and contact angle measurements. Sulfonated self-assembled films can be used as good organic templates for the deposition of SAMp films and for micropatterning of organic surfaces based on our results. Such results significantly extend the application of SAMp films since the sulfonate-functionalized surface can be introduced into the surfaces of aromatic polymers, metals, ceramics, semiconductors, and plastics. So that the process of SAMp deposition can be carried out onto many different substrate surfaces. The novel self-assembly technique combined with photolithography was used to develop three different methods of micropatterning fabrication in an attempt to achieve the goal of full-color flat-panel display. The characteristic of distinguishing our methods from the existed ones is that the patterning is done first and then the vertical multilayers were built-up on the patterned areas. Moreover, in this process, SAMp films were used as active species. Scanning Electron Microscopy (SEM) was employed to confirm the patterning technique. In order to block the further growth of the second film type on the sites of first film type, several molecules with inert function groups were tried. UV/Vis absorbance and contact angle measurements revealed that dodecyltrimethylammonium bromide (DTAB) atop the PAH/PSS SAMp film could prevent further adsorption of the ionic polymers. / Ph. D.

Photolithography is the most complex of the operations involved in the fabrication of a wafer, and it requires the greatest precision. Photolithography is used to create multiple layers of circuit patterns on a chip. Traditionally, wafer fab operations, and in particular, those performed in the photolithography processing area, have always presented challenging scheduling and control problems. Some of the characteristics that make the photolithography processing area difficult to schedule are as follows: reentrant flow, unpredictable yield and rework time at critical operations, shared resources such as reticles, rapidly changing technologies, and lot dedication for steppers and scanners for critical layers. This processing area, where wafers are exposed using scanners or steppers, typically, comprises the bottleneck workstations. Also, the numbers of reticles available for a given layer of product type are limited. Consequently, it is important to develop appropriate schedules to ensure effective utilization of the tools involved. In this study, a manufacturing line that is used to produce four dynamic random access memory (DRAM) products, requiring approximately 240 stages with 18 photolithography layers, is considered. The problem we propose to investigate can concisely be described as follows: Given a set of products to be processed in a photolithography area consisting of steppers and scanners (tools), with each product requiring a specific reticle type, determine the sequence in which to process the lots on the tools loaded with requisite reticles, so as to minimize the cycle time. The reticles required for processing a product are known apriori and can be transferred from one tool to another. Also, the lot dedication requirement has to be met. This requirement pertains to the fact that some of the layers of a lot should be processed on the same tool. (Scanner or Stepper). The processing of other layers may not require lot dedication. These are handled accordingly. Some lots may enter into the system with the requirement of processing them urgently. (called hot lots). These are handled in the formulation of the problem as such. Two solution methodologies are presented for the above stated problem. The first methodology uses a mathematical programming based approach. For the given routes and processing times of the product types, the entire problem is formulated as an Integer program. This integer program uses the start time of the jobs at various operations and the availability of reticles as variables, among others. The objective is to reduce the cycle time of the lots released into the system. The cycle time of a lot is defined as the time that a lot spends in the system. Results from the experimentation for integer program show that the computation time for solving small size problems is very high. A methodology is presented to solve this model efficiently. The second methodology consists of the development of a new dispatching rule for scheduling lots in the photolithography processing area. This along with the other dispatching rules discussed in the literature are implemented using the Autosched AP software to study the impact that lot dedication makes on the performance of a fab. The performance measures that are considered include throughput, cycle time, WIP and utilization of tool sets. The results are presented for 1-level, 2-level and 3-level lot dedication schemes. . It is shown that the 3- level lot dedication scheme performs the best under no preventive maintenance/breakdown case while, for the deterministic value of unscheduled breakdown times and preventive maintenance schedule used, 1-level lot dedication performed the best. Even though the 3-level lot dedication scheme is more flexible as compared to the 1–level lot dedication scheme, yet for the values of unscheduled breakdown times and preventive maintenance schedule used, the performance of the 3- level lot dedication scheme is worse than that of the 1- level lot dedication scheme. For another set of break down time values and preventive maintenance schedule, the outcome can be different. We also compare the performance of the proposed procedure with that of the dispatching rules available with the AutoSched AP software. The results indicate that the proposed procedure is consistent in generating better solutions under different operating conditions. / Master of Science

No description available.

Biosensors are devices that detect biological elements and then transmit a readable signal. Biosensors can automatize diagnostics that would otherwise have to be performed by a physician or perhaps not be possible to perform at all. Current biosensors are however either limited to particular diseases or prohibitively expensive. In order to further the field, sensors capable of many parallel measurements at a lower cost need to be developed. Field effect transistor (FET) based sensors are possible candidates for delivering this, mainly by allowing miniaturization. Smaller sensors could be cheaper, and enable parallel measurements. Graphene is an interesting material to use as the channel of FET-sensors. The low electrochemical reactivity of its plane makes it possible to have graphene in direct contact with the sample liquid, which enhances the signal from impedance changes. Graphene-FET based impedance sensors should be able to sense almost all possible analytes and allow for scaling without losing sensitivity. In this work the steps needed to make graphene based biosensors are presented. An improved graphene transfer is described which by using low pressure to dry the graphene removes most contamination. A method to measure the contamination of graphene by surface enhanced Raman scattering is presented. Methods to produce double gated and electrolyte gated graphene transistors on a large scale in an entirely photolithographic process are detailed. The deposition of 1-pyrenebutyric acid (PBA) on graphene is studied. It is shown that at high surface concentrations the PBA stands up on graphene and forms a dense self-assembled monolayer. A new process of using Raman spectroscopy data to quantify adsorbents was developed in order to quantify the molecule adsorption. Biosensing has been performed in two different ways. Graphene FETs have been used to read the signal generated by a streaming potential setup. Using FETs in this context enables a more sensitive readout than what would be possible without them. Graphene FETs have been used to directly sense antibodies in high ionic strength. This sensing was done by measuring the impedance of the interface between the FET and the electrolyte.

Trilayer polypyrrole microactuators that can operate in air have previously been developed. They consist of two outer layers ofthe electroactive polymer polypyrrole (PPy) and one inner layer of a porous poly(vinylidene flouride) (PVDF) membranecontaining a liquid electrolyte. The two outer layers of PPy are each connected with gold electrodes and separated by the porousPVDF membrane. This microtool is fabricated by bottom-up microfabrication However, porous PVDF layer is not compatible with bottom upmicrofabrication and highly swollen SPE suffers from gold electrode delamination. Hence, in this MSc project/thesis a novelmethod of flexible electrode fabrication with conducting polymers was developed by soft lithography and drop-on-demandprinting. The gold electrodes were replaced by patterned vapor phase polymerized (VPP) poly(3,4-ethylenedioxythiophene) (PEDOT)electrodes due to its high electrical conductivity and versatile process ability. The replacement of the stiff gold electrodes byflexible and stretchable PEDOT allowed high volume change of the material and motions. The PEDOT electrodes werefabricated by patterning the oxidant iron tosylate using microcontact printing and drop-on-demand printing. Moreover, thePVDF membrane has been replaced by a nitrile butadiene rubber/poly(ethylene oxide) semi-interpenetrating polymer network(IPN) to increase ion conductivity and strechability and hence actuator performance.

Le but principal de ce travail de thèse est de proposer un matériau précurseur d'oxydes métalliques (ZrO2, TiO2, HfO2) compatible avec la technique de photolithographie interférentielle DUV. Des oxoclusters de métaux (MOC) de transitions obtenus par complexation d’un ligand organique et hydrolysé partiellement ont été proposé comme briques élémentaires pour construire ces nanostructures. Le recours à des longueurs d'onde DUV (193 nm) permet d'exciter directement les MOC, ce qui conduit à une réticulation photoinduite, et confère à la résine un caractère de photoresist négatif. Une étude spectroscopique détaillée a permis de proposer un mécanisme de photoréticulation. Cette étude s'est appuyée essentiellement sur des techniques de suivi in situ de la réaction photochimique, par ellipsométrie spectroscopique et RT-FTIR. La nanostructuration a été effectuée essentiellement par lithographie interférométrique DUV (DUV-IL) à 193 nm et étendue à la stéréolithographie biphotonique. La DUV-IL a été choisie pour son potentiel d'écriture de nanostructures sur des surfaces relativement importantes, dans des conditions standard d'atmosphère et température. De plus, dans le cas des TiOC, les nanostructures peuvent être rendues inorganiques à température ambiante par un traitement photochimique supplémentaire. Dans le cas de ZrOC et HfOC, une étape supplémentaire de recuit thermique permet d'obtenir une structure de type MO2 cristallisée. / The main purpose of this thesis is to provide a material precursor of metal oxides (ZrO2, TiO2, HfO2) compatible with DUV interference photolithography technique. Transition metal oxoclusters (MOC) obtained by complexation of an organic ligand and a partial hydrolysis have been proposed as building blocks. DUV irradiation (193 nm) allows a direct excitation of the MOC, which leads a photo-induced crosslinking and gives to the material a negative photoresist character. A detailed spectroscopic study allowed proposing a mechanism of photocrosslinking. This study relied primarily on in situ techniques to follow the photochemical reaction by spectroscopic ellipsometry and RT-FTIR. The nanostructuring was performed by interferometric DUV lithography at 193 nm and could be extended to 2-photon stereolithography. DUV-IL was chosen for its potential to write nanostructures on relatively large areas, in standard atmosphere and temperature conditions. Furthermore, in the case of TiOC, the nanostructures can be fully mineralised at room temperature by an additionnal photochemical treatment. For ZrOC and HfOC, an additional thermal annealing step allows to obtain a crystalline structure MO2.

Le but de ces travaux de thèse sera l’élaboration de microactionneurs à base de polymère conducteur électronique PCE .Dans un premier temps, l’objectif sera la synthèse des matrices hôtes à base de réseaux interpénétrés de polymères (RIPs) POE/PTHF et POE/NBR en visant une diminution de l’épaisseur finale (avec PEDOT) de 5 à 10 µm. Ensuite nous procéderons à l’Elaboration d’actionneurs se déformant en flexion et en torsion afin de mimer les mouvements des ailes d’insectes. Deux voix de synthèse des PCE seront utilisées, la voie chimique qui consiste en la synthèse de RIPs ou encore par voie électrochimique avec la formation d’un système tricouche qui permettra un bien meilleur contrôle de leurs propriétés. / The purpose of thesis is the Design of electronic conducting polymer based microactuators by microsystem process. First, the objective will be the synthesis of Interpenetrating Polymers Networks (IPNs) POE/PTHF and POE/NBR, aiming a decrease of the final thickness (with PEDOT) until 5 – 10 µm. Then, we proceed with the development of actuators deforming in bending and twisting to the movements of insects wings. Two different synthesis methods will be used, chemical process based on synthesis of Interpenetrating Polymers Networks, or electrochemical process enabling a much better control of their properties.