Gallium oxide (Ga2O3) has been the subject of extensive research activity due to its ultrawide bandgap and large breakdown field, which make it promising for next-generation applications in deep ultraviolet detection and power electronics. β-Ga2O3 is the most thermally stable and well-studied polymorph of Ga2O3. However, during the past decade, the metastable orthorhombic κ-Ga2O3 has emerged as an equally impressive candidate material owing to its high crystal symmetry and ferroelectric and spontaneous polarization properties. Several studies have reported the growth and characterization of κ-Ga2O3 films using different epitaxial growth methods. However, the existing literature still lacks reports on the processing of this material for future device applications. Therefore, in this thesis, we investigate the effects of high-temperature treatment and plasma exposure on the structural and optical properties of mist chemical vapor deposition (mist-CVD)-grown κ-Ga2O3 films. Using high-temperature X-ray diffraction (HT-XRD), we show that the films remain phase-pure up to an annealing temperature of 800 ˚C, after which β-phase peaks start to appear and eventually show a complete transition to β-Ga2O3 at 875 ˚C. Additionally, we show using detailed high-resolution transmission electron microscopy (HRTEM) and XRD analyses that annealing at 700 ˚C in ambient air is effective in improving the crystal quality of the κ-Ga2O3 layer by relieving in-plane strains and epitaxial stacking faults. Moreover, since dry etching is needed for the anisotropic patterning of materials for device applications, it is necessary to investigate the effects of plasma exposure on the near-surface properties of the material in order to keep its damage to a minimum. Therefore, we studied the impacts of plasma exposure during dry etching on the chemical structure, crystallinity, and optical properties of κ-Ga2O3 by using a variety of characterization methods. We observed how varying the etching parameters using BCl3/Ar can affect the near-surface properties of the material, which play a key role in modifying the performance of future devices. Specifically, we found that both RIE/ICP power and BCl3/Ar ratio can influence the surface stoichiometry and the concentration of native defect density, which affect the material’s structural and optical properties. Additionally, we reported for the first time on κ-Ga2O3 ICP-RIE process optimization using a BCl3/Ar gas mixture. By tuning the process parameters, the optimized recipe had a high etch rate of 130 nm/min, showed a surface roughness reduction of 56%, and produced vertical sidewall profiles for ridge device structures.

京都大学 / 新制・課程博士 / 博士(工学) / 甲第24580号 / 工博第5086号 / 新制||工||1974(附属図書館) / 京都大学大学院工学研究科航空宇宙工学専攻 / (主査)教授 江利口 浩二, 教授 土屋 智由, 教授 平方 寛之 / 学位規則第4条第1項該当 / Doctor of Philosophy (Engineering) / Kyoto University / DFAM

L’augmentation des performances des dispositifs de la microélectronique repose encore pour une dizaine d’années sur une miniaturisation des circuits intégrés. Cette miniaturisation s’accompagne inévitablement d’une complexification des architectures et des empilements de matériaux utilisés. Au début de cette thèse, une des voies envisagées pour poursuivre la miniaturisation était de remplacer, dans une architecture finFET, le canal en silicium par un semi-conducteur à plus forte mobilité électronique, tel que l’In0,53Ga0,47As pour les transistors nMOS. Une étape essentielle à maitriser dans la fabrication des transistors finFET à base d’InGaAs est celle de la gravure plasma qui permet d’élaborer l’architecture du canal. En effet, pour assurer un fonctionnement optimal du transitor, il est primordial que les procédés de gravure ne génèrent pas de défauts sur les flancs du canal tels que la création de rugosité ou une perte de stœchiométrie. L’objectif principal de cette thèse est ainsi de réaliser la structuration du canal 3D d’InGaAs par gravure plasma en générant un minimum de défaut sur les flancs. Pour cela, nous avons évalué trois stratégies de gravure. Des premières études ont visé le développement de procédés de gravure en plasmas halogénés à température ambiante (55°C). De tels procédés conduisent à des profils pentus et rugueux du fait de redépôts InClx peu volatils sur les flancs des motifs. Dans un second temps, des procédés de gravure en plasma Cl2/CH4 à haute température (200°C) ont été étudiés et développés. Des motifs anisotropes et moins rugueux ont pu être obtenus, grâce à la volatilité des produits InClx et à la présence d’une passivation des flancs de type SiOx. Enfin, un concept de gravure par couche atomique, qui consiste à alterner deux étapes de procédé au caractère autolimité, a été étudié. Une première étape d’implantation en plasma He/O2 qui permet une modification de l’InGaAs sur une épaisseur définie suivie d’une étape de retrait humide en HF. Pour ces trois stratégies de gravure, une méthodologie permettant de caractériser de manière systématique les défauts engendrés sur les flancs a été mise en place. La spectroscopie Auger a permis d’accéder à la stœchiométrie des flancs tandis que la rugosité a été mesurée par AFM. Les résultats issus de la caractérisation des flancs des motifs gravés ont alors montré la nécessité de mettre en œuvre des procédés de restauration de surface. Un procédé combinant une étape d’oxydation par plasma de la surface d’InGaAs suivi d’un retrait par voie humide de la couche oxydée a ainsi été proposé. Ce traitement permet effectivement de diminuer la rugosité des flancs des motifs mais a accentué un enrichissement en arsenic déjà présent après les procédés de gravure. / Increasing the performance of transistors for the next decade still relies on transistor downscaling which is inevitably accompanied by an increasing complexity of the architectures and materials involved. At the beginning of this thesis, one strategy to pursue the downscaling was to replace, in a finFET architecture, the silicon channel with high-mobility semiconductor, such as In0,53Ga0,47As for the nMOS transistors. The patterning of the channel architecture by plasma etching is an essential step to overcome in the fabrication of InGaAs-based finFET transistors. Indeed, to ensure optimal performances of the device, it is crucial that the plasma etching process do not generate defects on the channel sidewalls such as a loss of stoichiometry and roughness formation. Thus, the major aim of this thesis is to pattern the 3D InGaAs channel by plasma etching with minimal sidewalls damage. For this, we investigated three plasma etching strategies. First, this work focused on the development of plasma etches process with halogen chemistries at ambient temperature (60°C). Such process leads to sloped and rough patterns due to the redeposit of low volatile InClx etch by products. Secondly, Cl2/CH4 plasma etching processes at high temperature (200°C) have been studied and developed. Anisotropic and relatively smooth patterns can be obtained using such plasma process thanks to enhanced volatility of InClx products and a SiOx sidewall passivation formation. Finally, an atomic layer etching concept has been investigated to pattern InGaAs with minimal damage. This concept consists in alternating two self-limited steps: first, an implantation step using He/O2 plasma modifies the InGaAs surface to a limited thickness. Then, the modified layer is removed by HF wet. For all these etching strategies, a methodology was implemented to perform a systematic characterization of the damage generated on the sidewalls. The Auger spectroscopy was used to determine the sidewall stoichiometry while the sidewall roughness is measured by AFM. The results from the sidewall characterizations revealed the necessity to implement a surface restoration process. It consists in oxidizing the InGaAs sidewalls with O2 plasma and to removed the oxidized layer with a HF step. This process was efficient to smooth the InGaAs pattern sidewalls but enhances an arsenic enrichment which was already present after the etching processes.

As the miniaturization of functional devices in integrated circuit (IC) continues to scale down to sub-nanometer size, the process complexity increases and makes materials characterization difficult. One of our research effort demonstrates the development and application of novel Multiple Internal Reflection Infrared Spectroscopy (MIR-IR) as a sensitive (sub-5 nm) metrology tool to provide precise chemical bonding information that can effectively guide through the development of more efficient process control. In this work, we investigated the chemical bonding structure of thin fluorocarbon polymer films deposited on low-k dielectric nanostructures, using Fourier transform infrared spectroscopy (FTIR), X-ray photoelectron spectroscopy (XPS) and scanning electron microscopy (SEM). Complemented by functional group specific chemical derivatization reactions, fluorocarbon film was established to contain fluorinated alkenes and carbonyl moieties embedded in a highly cross-linked, branched fluorocarbon structure and a model bonding structure was proposed for the first time. In addition, plasma induced damage to high aspect ratio trench low-k structures especially on the trench sidewalls was evaluated both qualitatively and quantitatively. Damage from different plasma processing was correlated with Si-OH formation and breakage of Si-CH3 bonds with increase in C=O functionality. In another endeavor, TiN hard mask defect formation after fluorocarbon plasma etch was characterized and investigated. Finding suggest the presence of water soluble amines that could possibly trigger the formation of TiN surface defect. An effective post etch treatment (PET) methods were applied for etch residue defect removal/suppression.