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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
31

Growth and characterization of diamond thin films : effects of substrate pretreatment, doping, and selective deposition /

Mirzakuchaki, Sattar, January 1996 (has links)
Thesis (Ph. D.)--University of Missouri-Columbia, 1996. / Typescript. Vita. Includes bibliographical references (leaves 128-135). Also available on the Internet.
32

Growth and characterization of diamond thin films effects of substrate pretreatment, doping, and selective deposition /

Mirzakuchaki, Sattar, January 1996 (has links)
Thesis (Ph. D.)--University of Missouri-Columbia, 1996. / Typescript. Vita. Includes bibliographical references (leaves 128-135). Also available on the Internet.
33

Elastic and structural properties of supported porous silicon layers /

Andrews, Gordon Todd, January 1999 (has links)
Thesis (Ph.D.), Memorial University of Newfoundland, 1999. / Bibliography: p. 97-104.
34

Computer modeling supported fabrication processes for electronics applications

Tóth, G. (Géza) 15 May 2007 (has links)
Abstract The main objective of this thesis is to study unique cases for computer-assisted finite element modeling (FEM) of thermal, mechanical and thermo-mechanical problems related to silicon and carbon. Computational modeling contributed to solve scientific problems either by validating the experimental results obtained earlier or by predicting the behavior of a particular system. In the model generation phase, emphasis is placed on simplification of a physical problem without loosing the validity or important details. As a consequence of reasonably reduced variables and also degrees of freedom of the elements in our models, the simulations could be performed using a commercial FEM software package, ANSYS®. To test the capabilities of the method (i) a steady-state finite element thermal analysis has been accomplished and verified by experiments for the case of laser-assisted heating of different materials. (ii) Mechanisms (Dember and Seebeck effects) responsible for the reduction of gold ions and deposition of metallic gold on p-type semiconductors from liquid precursors have been investigated by computing the surface temperature profiles of silicon wafers exposed to laser irradiation. (iii) Temperature field in a multi-component system caused by laser illumination was modeled to determine the heat affected zone in the case of laser soldering of flip-chips on transparent printed circuit board assemblies. (iv) Origin of the experimentally observed residual strain in thermally oxidized porous silicon structures was revealed by computing the strain fields in silicon-silicon oxide porous materials considering both intrinsic and thermal stress components. (v) Finally, we demonstrated that Joule heat generated on a silicon chip can be removed efficiently using micro-fin structures made from aligned carbon nanotubes. Computational fluid dynamics and thermal-electric finite element models were developed to study the steady-state laminar coolant flow and also the temperature distribution for the chips. The presented novel results have potential in silicon and carbon nanotube based technologies, including deeper understanding of the processes and problems in manufacturing electronic devices.
35

Laser-assisted chemical liquid-phase deposition of metals for micro- and optoelectronics

Kordás, K. (Krisztián) 10 May 2002 (has links)
Abstract The demands toward the development of simple and cost-effective fabrication methods of metallic structures with high lateral resolution on different substrates - applied in many fields of technology, such as in microelectronics, optoelectronics, micromechanics as well as in sensor and actuator applications - gave the idea to perform this research. Due to its simplicity, laser-assisted chemical liquid-phase deposition (LCLD) has been investigated and applied for the metallization of surfaces having practical importance (Si, GaAs, SiO2, Si3N4, etc.) since the beginning of the 80s. By the invention of novel substrates (polyimide, porous silicon), it was adequate to work out new precursors or just adopt old ones and optimise LCLD in order to fabricate metallic micro-patterns upon these materials for various purposes. According to the motivations mentioned above, LCLD was utilized for the fabrication of palladium (Pd) micro-patterns on polyimide (PI), polyimide/copper flexible printed circuit boards (PCBs), fused silica (SiO2) and silicon (Si). The selective metallization of porous silicon (PS) has been carried out with nickel (Ni). Depending on the types of lasers, either the focusing (Ar+ laser beam) or diaphragm projection (KrF and XeCl excimer laser pulses) method was employed. In the course of the work, various precursors of the corresponding metals have been investigated and utilized. In the beginning, the pyrolytic decomposition of palladium-amine complex ions ([Pd(NH3)4]2+) on PI by a scanned and focused Ar+ laser beam was optimised and discussed. Thick (up to several micrometers) and narrow (~ 10 μm) Pd conductor lines with electrical conductivity close to that of the bulk were obtained. In the continuation of these investigations, the precursor was developed further. [Pd(NH3)4]2+ was mixed with the solution of formaldehyde (HCOH) in order to induce the reduction of the metal complex ions. To our knowledge, we were the first - so far - who applied this solution and described the reaction. With the proper choice of the laser parameters, thin Pd films as catalyst layers for electroless copper plating were deposited utilizing Ar+ and excimer lasers as well. The chemically plated copper deposits - upon the obtained Pd film - have excellent electrical and good mechanical properties. In the second part of the thesis, three practical applications (metallization of via holes drilled in PI/Cu flexible PCBs, end-mirror fabrication on single-mode optical fibers, and carbon nanotube growth on Pd activated Si and Si/SiO2 substrates) of Pd LCLD were realized. The previously presented [Pd(NH3)4]2+ and [Pd(NH3)4]2+/HCOH precursors were employed for creating the catalyst Pd layers for the carbon nanotube chemical vapor-phase deposition and for the autocatalytic electroless chemical copper plating, respectively. Finally, a simple novel method was introduced for the area-selective metallization of PS. Since the surface of PS reduces spontaneously most metals from their aqueous solutions, it is difficult to realize localized metal deposition from liquid-phase precursors on it. We proposed the application of a stable Ni plating bath from which the metal deposits only when the PS is irradiated with photons having wavelength shorter than 689 nm, thus making possible an area-selective laser-assisted metal deposition. The deposited metal structures and patterns were analysed by field emission scanning electron microscopy (FESEM) equipped with energy dispersive spectrometer (EDS), by the milling and imaging modes of a focused ion beam system (FIB), optical microscopy, profilometry, resistance, and by reflectance measurements.
36

Design of Multi-junction Solar Cells on Silicon Substrates Using a Porous Silicon Compliant Membrane

Wilkins, Matthew M. January 2013 (has links)
A novel approach to the design of multi-junction solar cells on silicon substrates for 1-sun applications is described. Models for device simulation including porous silicon layers are presented. A silicon bottom subcell is formed by diffusion of dopants into a silicon wafer. The top of the wafer is porosified to create a compliant layer, and a III-V buffer layer is then grown epitaxially, followed by middle and top subcells. Due to the resistivity of the porous material, these designs are best suited to high efficiency 1-sun applications. Numerical simulations of a multi-junction solar cell incorporating a porous silicon compliant membrane indicate an efficiency of 30.7% under AM1.5G, 1-sun for low threading dislocation densities (TDD), decreasing to 23.7% for a TDD of 10^7 cm^-2.
37

Electrochemical deposition of metal on microporous silicon electrodes influenced by hydration structures of solutes and electrode surfaces / 溶質と電極表面の水和構造にもとづくミクロ多孔質シリコン電極内の金属析出制御

Koda, Ryo 23 March 2015 (has links)
京都大学 / 0048 / 新制・課程博士 / 博士(工学) / 甲第18999号 / 工博第4041号 / 新制||工||1622(附属図書館) / 31950 / 京都大学大学院工学研究科物質エネルギー化学専攻 / (主査)教授 作花 哲夫, 教授 安部 武志, 教授 邑瀬 邦明 / 学位規則第4条第1項該当 / Doctor of Philosophy (Engineering) / Kyoto University / DFAM
38

DEVELOPMENT OF A MICRO LOOP HEAT PIPE, A NOVEL MEMS SYSTEM BASED ON THE CPS TECHNOLOGY

SHUJA, AHMED 07 July 2003 (has links)
No description available.
39

Périphérie triac à base de silicum poreux / Porous silicon based triac periphery

Menard, Samuel 04 December 2014 (has links)
Ces travaux de thèse portent sur le développement d’une périphérie innovante de TRIAC exploitant le caractère semiisolant du silicium poreux (PS). L’intégration de caissons PS type P à partir des profils de dopage du TRIAC est en effet accessible. Une revue des propriétés électriques du PS type P réalisée à partir de nos propres échantillons méso voire micro-poreux a donc été entreprise. Des mesures de capacités et des relevés I-V ont ainsi permis de déterminer l’évolution de la constante diélectrique relative du PS ainsi que sa résistivité en fonction de la porosité. Plus cette dernière est élevée et plus les propriétés diélectriques du PS se rapprochent de celles d’un isolant. L’analyse des résultats a également permis de clarifier les mécanismes de transport des porteurs au sein de la couche de PS. Des prototypes de TRIACs avec une terminaison de jonction à base de PS ont ensuite été conçus, fabriqués et étudiés. La localisation du PS et la gestion des contraintes mécaniques résultant de la formation du PS sont apparus comme les principaux verrous technologiques à surmonter. Des solutions ont été proposées, néanmoins les tenues en blocage atteintes se sont avérées insuffisantes. Des courants de fuite supérieurs à la dizaine de milliampères ont en effet été mesurés et ce pour des tensions de polarisation de l’ordre de 100 V. La géométrie des caissons PS et/ou la présence de charges fixes à l’interface PS / Silicium sont jugées responsables des résultats. Enfin, en s’appuyant sur un modèle macroscopique du PS, une nouvelle structure plus optimisée a été suggérée. / This PhD thesis deals with the development of a novel TRIAC periphery, exploiting the semi-insulating nature of porous silicon (PS). It is namely accessible to integrate P type PS wells through the doping profiles encountered in the TRIAC. Thus, a review of the P type PS electrical properties was achieved through dedicated samples. In this context, capacitance measurements and I-V plots were used to determine the evolution of the PS relative dielectric constant and its resistivity with the porosity. Higher the latter is, more insulating the PS is. By analyzing all the results, it was also possible to clarify the carrier transport mechanisms in the PS. Some TRIAC prototypes with a PS based junction termination were then designed, processed and studied. The stress coming from the PS formation and the PS masking were the main technological steps to solve. First solutions were proposed, nevertheless insufficient blocking performances were reached. Leakage currents higher than 10 mA were demonstrated while the bias voltage was only 100 V. The presence of fixed charges at the PS / Silicon interface and/or the geometry of the PS wells may explain these results. Finally, with the help of a macroscopic PS model, a more optimized structure was proposed.
40

Fabrication de semiconducteurs poreux pour améliorer l'isolation thermique des MEMS

Newby, Pascal January 2014 (has links)
Résumé : L’isolation thermique est essentielle dans de nombreux types de MEMS (micro-systèmes électro-mécaniques). Elle permet de réduire la consommation d’énergie, améliorer leurs performances, ou encore isoler la zone chaude du reste du dispositif, ce qui est essentiel dans les systèmes sur puce. Il existe quelques matériaux et techniques d’isolation pour les MEMS, mais ils sont limités. En effet, soit ils ne proposent pas un niveau d’isolation suffisant, sont trop fragiles, ou imposent des contraintes trop importantes sur la conception du dispositif et sont difficiles à intégrer. Une approche intéressante pour l’isolation, démontrée dans la littérature, est de fabriquer des pores de taille nanométrique dans le silicium par gravure électrochimique. En nanostructurant le silicium ainsi, on peut diviser sa conductivité thermique par un facteur de 100 à 1000, le transformant en isolant thermique. Cette solution est idéale pour l’intégration dans les procédés de fabrication existants des MEMS, car on garde le silicium qui est déjà utilisé pour leur fabrication, mais en le nanostructurant localement, on le rend isolant là où on en a besoin. Par contre sa porosité cause des problèmes : mauvaise résistance chimique, structure instable au-delà de 400°C, et tenue mécanique réduite. La facilité d’intégration des semiconducteurs poreux est un atout majeur, nous visons donc de réduire les désavantages de ces matériaux afin de favoriser leur intégration dans des dispositifs en silicium. Nous avons identifié deux approches pour atteindre cet objectif : i) améliorer le Si poreux ou ii) développer un nouveau matériau. La première approche consiste à amorphiser le Si poreux en l’irradiant avec des ions à haute énergie (uranium, 110 MeV). Nous avons montré que l’amorphisation, même partielle, du Si poreux entraîne une diminution de sa conductivité thermique, sans endommager sa structure poreuse. Cette technique réduit sa conductivité thermique jusqu’à un facteur de trois, et peut être combinée avec une pré-oxydation afin d’atteindre une réduction d’un facteur cinq. Donc cette méthode permet de réduire la porosité du Si poreux, et d’atténuer ainsi les problèmes de fragilité mécanique causés par la porosité élevée, tout en gardant un niveau d’isolation égal. La seconde approche est de développer un nouveau matériau. Nous avons choisi le SiC poreux : le SiC massif a des propriétés physiques supérieures à celles du Si, et donc à priori le SiC poreux devrait conserver cette supériorité. La fabrication du SiC poreux a déjà été démontrée dans la littérature, mais avec peu d’études détaillées du procédé. Sa conductivité thermique et tenue mécanique n’ont pas été caractérisées, et sa tenue en température que de façon incomplète. Nous avons mené une étude systématique de la porosification du SiC en fonction de la concentration en HF et le courant. Nous avons implémenté un banc de mesure de la conductivité thermique par la méthode « 3 oméga » et l’avons utilisé pour mesurer la conductivité thermique du SiC poreux. Nous avons montré qu’elle est environ deux ordres de grandeur plus faible que celle du SiC massif. Nous avons aussi montré que le SiC poreux est résistant à tous les produits chimiques typiquement utilisés en microfabrication sur silicium. D’après nos résultats il est stable jusqu’à au moins 1000°C et nous avons obtenu des résultats qualitatifs encourageants quant à sa tenue mécanique. Nos résultats signifient donc que le SiC poreux est compatible avec la microfabrication, et peut être intégré dans les MEMS comme isolant thermique. // Abstract : Thermal insulation is essential in several types of MEMS (micro electro-mechanical systems). It can help reduce power consumption, improve performance, and can also isolate the hot area from the rest of the device, which is essential in a system-on-chip. A few materials and techniques currently exist for thermal insulation in MEMS, but these are limited. Indeed, either they don’t have provide a sufficient level of insulation, are too fragile, or restrict design of the device and are difficult to integrate. A potentially interesting technique for thermal insulation, which has been demonstrated in the literature, is to make nanometer-scale pores in silicon by electrochemical etching. By nanostructuring silicon in this way, its thermal conductivity is reduced by a factor of 100 to 1000, transforming it into a thermal insulator. This solution is ideal for integration in existing MEMS fabrication processes, as it is based on the silicon substrates which are already used for their fabrication. By locally nanostructuring these substrates, silicon is made insulating wherever necessary. However the porosity also causes problems : poor chemical resistance, an unstable structure above 400◦C, and reduced mechanical properties. The ease of integration of porous semiconductors is a major advantage, so we aim to reduce the disadvantages of these materials in order to encourage their integration in silicon-based devices. We have pursued two approaches in order to reach this goal : i) improve porous Si, or ii) develop a new material. The first approach uses irradiation with high energy ions (100 MeV uranium) to amorphise porous Si. We have shown that amorphisation, even partial, of porous Si leads to a reduction of its thermal conductivity, without damaging its porous structure. This technique can reduce the thermal conductivity of porous Si by up to a factor of three, and can be combined with a pre-oxidation to achieve a five-fold reduction of thermal conductivity. Therefore, by using this method we can use porous Si layers with lower porosity, thus reducing the problems caused by the fragility of high-porosity layers, whilst keeping an equal level of thermal insulation. The second approach is to develop a new material. We have chosen porous SiC: bulk SiC has exceptional physical properties and is superior to bulk Si, so porous SiC should be superior to porous Si. Fabrication of porous SiC has been demonstrated in the literature, but detailed studies of the process are lacking. Its thermal conductivity and mechanical properties have never been measured and its high-temperature behaviour has only been partially characterised. We have carried out a systematic study of the effects of HF concentration and current on the porosification process. We have implemented a thermal conductivity measurement setup using the “3 omega” method and used it to measure the thermal conductivity of porous SiC. We have shown that it is about two orders of magnitude lower than that of bulk SiC. We have also shown that porous SiC is chemically inert in the most commonly used solutions for microfabrication. Our results show that porous SiC is stable up to at least 1000◦C and we have obtained encouraging qualitative results regarding its mechanical properties. This means that porous SiC is compatible with microfabrication processes, and can be integrated in MEMS as a thermal insulation material.

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