This thesis is concerned with the design and implementation of radio frequency (RF) power amplifiers and micro-electromechanical systems---namely MEMS varactors. This is driven by the many wireless communication systems which are constantly moving towards increased integration, better signal quality, and longer battery life. / The power amplifier consumes most of the power in a receiver/transmitter system (transceiver), and its output signal is directly transmitted by the antenna without further modification. Thus, optimizing the PA for low power consumption, increased linearity, and compact integration is highly desirable. / Micro-electromechanical systems enable new levels of performance in radio-frequency integrated circuits, which are not readily available via conventional IC technologies. They are good candidates to replace lossy, low Q-factor off-chip components, which have traditionally been used to implement matching networks or output resonator tanks in class AB, class F, or class E power amplifiers. The MEMS technologies also make possible the use of new architectures, with the possibility of flexible re-configurability and tunability for multi-band and/or multi-standard applications. / The major effort of this thesis is focused on the design and fabrication of an RF frequency class AB power amplifier in the SiGe BiCMOS 5HP technology, with the capability of being tuned with external MEMS varactors. The latter necessitated the exploration of wide-tuning range MEMS variable capacitors, with prototypes designed and fabricated in the Metal-MUMPS process. / An attempt is made to integrate the power amplifier chip and the MEMS die in the same package to provide active tuning of the power amplifier matching network, in order to keep the efficiency of the PA constant for different input power levels and load conditions. / Detailed simulation and measurement results for all circuits and MEMS devices are reported and discussed.

The process of designing high power RF amplifiers has in the past relied heavily on measurements, in conjunction with simple linear theory. With the advent of the harmonic balance method and increasingly faster computers, CAD techniques can be of great value in designing these nonlinear circuits. Relatively little work has been done in modelling RF power MOSFETs. The methods described in numerous papers for the nonlinear modelling of microwave GaAsFETs cannot be applied easily to these high power devices. This thesis describes a modelling procedure applicable to RF MOSFETs rated at over 100 W. This is achieved by the use of cold S parameters and pulsed drain current measurements taken at controlled temperatures. A method of determining the required device thermal impedance is given. A complete nonlinear equivalent circuit model is extracted for an MRF136 MOSFET, a 28 V, 15 W device. This includes two nonlinear capacitors. An equation is developed to describe accurately the drain current as a function of the internal gate and drain voltages. The model parameters are found by computer optimisation with measured data. Techniques for modelling the passive components in RF power amplifiers are given. These include resistors, inductors, capacitors, and ferrite transformers. Although linear ferrite transformer models are used, nonlinear forms are also investigated. The accuracy of the MOSFET model is verified by comparison to large signal measurements in a 50 0 system. A complete power amplifier using the MRF136, operating from 118 MHz to 175 MHz is built and analysed. The accuracy of predictions is generally within 10 % for output power and DC supply current, and around 30 % for input impedance. An amplifier is designed using the CAD package, and then built, requiring only a small final adjustment of the input matching circuit. The computer based methods described lead quickly to a near-optimal design and reduce the need for extensive high power measurements. The use of nonlinear analysis programs is thus established as a valuable design tool for engineers working with RF power amplifiers. / Thesis (Ph.D.)-University of Natal, Durban, 1992.

Thesis (Ph. D.)--Ohio State University, 2004. / Title from first page of PDF file. Document formatted into pages; contains xix, 156 p.; also includes graphics (some col.). Includes bibliographical references (p. 152-156).

Thesis (M.S.)--Oregon State University, 2004. / Printout. Includes bibliographical references (leaves 73-75). Also available on the World Wide Web.

Thesis (M.E.)--University of Canterbury, 2008. / Typescript (photocopy). "August 2008." Includes bibliographical references (p. [123]-126). Also available via the World Wide Web.

Thesis (Ph. D.)--Ohio State University, 2005. / Available online via OhioLINK's ETD Center; full text release delayed at author's request until 2008 Dec 1

Thesis (M.E.)--University of Canterbury, 2006. / Typescript (photocopy). "31 May 2006." Includes bibliographical references (p. R1-R5). Also available via the World Wide Web.

Thesis (MScIng)--Stellenbosch University, 2008. / ENGLISH ABSTRACT: Modern communication systems demand efficient, linear power amplifiers. The amplifiers are often operated in the backed-off power levels at which linear amplifiers such as class B amplifier are particularly inefficient. The Doherty amplifier provides an improvement as it increases efficiency at backed of power levels. Doherty amplifiers consists of two amplifiers, a carrier amplifier and a peaking amplifier, of which the output is combined in a novel way. Implementation of the Doherty amplifier with transistors is not ideal. One of the main problems is the insufficient current production of the peaking amplifier at peak envelope power (PEP) if it is implemented as a class C amplifier. A suggested solution to this problem is a bias adaption system that controls the peaking amplifier gate voltage dynamically depending on the input power levels. The design and evaluation of such a adaptive Doherty amplifier is the main goal of this thesis. A classical Doherty amplifier with and an uneven Doherty amplifier with unequal power division between the carrier and peaking amplifiers are also evaluated and compared with the adaptive Doherty amplifier. The amplifiers are designed using a 10 W LDMOS FET device, the MRF282. The adaptive Doherty amplifier and the uneven Doherty amplifier show significant improvements in efficiency and output power over the even Doherty amplifier. At PEP the adaptive Doherty delivers 42.4 dBm at 39.75 % power added efficiency (PAE), the uneven Doherty amplifier 41.9 dBm at 40.75 % PAE and the even Doherty amplifier 40.8 dBm at 38.6 % PAE. At 3dB backed-off input power the adaptive Doherty amplifier has an efficiency of 34.3%, compared to 34.9 5% for the uneven Doherty amplifier and 29.75 % for the even Doherty amplifier. / AFRIKAANSE OPSOMMING: Moderne kommunikasie stelsels vereis effektiewe, linieêre drywing versterkers. Die versterkers word dikwels in laer drywings vlakke bedryf waar linieêre versterkers soos ’n klas B versterker besondere lae effektiwiteit het. Die Doherty versterker bied ’n uitweg omdat dit verbeterde effektiwiteit by lae drywings vlakke bied. ’n Doherty versterker bestaan uit twee versterkers, die hoof versterker en die aanvullende versterker, waarvan die uittrees met ’n spesiale kombinasie netwerk bymekaar gevoeg word. Die implementasie van Doherty versterkers met transistors is nie ideaal nie. Een van die hoof probleme is die onvoldoende stroom wat deur die aanvullings versterker gebied word by piek omhulsel drywing (POD). ’n Oplossing vir die probleem is om ’n aanpassings sisteem te gebruik wat die aanvullende versterker se hekspanning dinamies beheer afhangende van die intree drywings vlakke. Die ontwerp en evaluasie van so ’n aanpassings Doherty versterker is die hoof doel van hierdie tesis. ’n Klassieke Doherty versterke met gelyke drywings verdeling en ’n ongelyke Doherty versterker wat gebruik maak van ongelyke drywings verdeling tussen die hoof-en aanvullende versterkers is ook gevalueer en vergelyk met die aanpassings Doherty versterker. Die versterkers was ontwerp met ’n 10 W LDMOS FET, die MRF282. Die aanpassings Doherty versterker en die ongelyke Doherty versterker het aanmerklike verbeteringe in effektiwiteit en uittree drywing gebring in vergelyking met die ewe Doherty versterker. By POD het die aanpassings versterker 42.4 dBm teen 39.75 % drywing toegevoegde effektiwiteit (DTE) gelewer, die ongelyke Doherty versterker 41.9 dBm teen 40.75 % DTE, en die ewe Doherty versterker 40.8 dBm teen 38.6 DTE. By ’n intree drywingsvlak 3 dB laer as POD het die aanpassings Doherty versterker ’n effektiwiteit van 34.3 % getoon, in vergelyking met die onewe Doherty versterker se 34.9 % en die ewe Doherty versterker se 29.75 % DTE.

abstract: This work implements three switched mode power amplifier topologies namely inverse class-D (CMCD), push-pull class-E and inverse push-pull class-E, in a GaN-on-Si process for medium power level (5-10W) femto/pico-cells base-station applications. The presented power amplifiers address practical implementation design constraints and explore the fundamental performance limitations of switched-mode power amplifiers for cellular band. The designs are analyzed and compared with respect to non-idealities like finite on-resistance, finite-Q of inductors, bond-wire effects, input signal duty cycle, and supply and component variations. These architectures are designed for non-constant envelope inputs in the form of digitally modulated signals such as RFPWM, which undergo duty cycle variation. After comparing the three topologies, this work concludes that the inverse push-pull class-E power amplifier shows lower efficiency degradation at reduced duty cycles. For GaN based discrete power amplifiers which have less drain capacitance compared to GaAs or CMOS and where the switch loss is dominated by wire-bonds, an inverse push-pull class-E gives highest output power at highest efficiency. Push-pull class-E can give efficiencies comparable to inverse push-pull class-E in presence of bondwires on tuning the Zero-Voltage Switching (ZVS) network components but at a lower output power. Current-Mode Class-D (CMCD) is affected most by the presence of bondwires and gives least output power and efficiency compared to other two topologies. For systems dominated by drain capacitance loss or which has no bondwires, the CMCD and push-pull class-E gives better output power than inverse push-pull class-E. However, CMCD is more suitable for high breakdown voltage process. / Dissertation/Thesis / Masters Thesis Electrical Engineering 2015

Compared to current single-standard radio solutions, multi-standard radio transceivers enable higher integration, backward compatibility and save power, area and cost. The primary bottleneck in their realization is the development of high-performance frequency-reconfigurable RF circuits. To that end, this research introduces several CMOS-integrated, transformer-based reconfigurable circuit techniques whose effectiveness is validated through measurements of designed transceiver front-end low-noise (LNA) and power amplifier (PA) prototypes. In the first part, the use of high figure-of-merit phase-change (PC) based RF switches in the reconfiguration of CMOS LNAs in the receiver front-end is proposed. The first reported demonstration of an integrated, PC-switch based, dual-band (3/5 GHz) reconfigurable CMOS LNA with transformer source degeneration and designed in a 0.13 μm process is presented. In the second part, a frequency-reconfigurable CMOS transformer combiner is introduced that can be reconfigured to have similar efficiencies at widely separated frequency bands. A 65-nm CMOS triple-band (2.5/3/3.5 GHz) PA employing the reconfigurable combiner was designed. In the final part of this work, the use of transformer coupled-resonators in mm-wave LNA designs for 28 GHz bands was investigated. To cover contiguous and/or widely-separated narrowband channels of the emerging 5G standards, a 65-nm CMOS 24.9-32.7 GHz wideband multi-mode LNA using one-port transformer coupled-resonators was designed. Finally, a 25.1-27.6 GHz tunable-narrowband digitally-calibrated merged LNA-vector modulator design employing transformer coupled-resonators is presented that proposes a compact, differential quadrature generation scheme for phased-array architectures.