Orientador: Prof. Dr. José Alberto Torrico Altuna / Dissertação (mestrado) - Universidade Federal do ABC, Programa de Pós-Graduação em Engenharia Elétrica, 2016. / O presente trabalho estuda as técnicas de modulação de inversores trifásicos com aplicação principal em controle de máquinas de indução. Na primeira parte é realizada a pesquisa bilbiográfica considerando as principais técnicas de modulação, sendo apresentado depois o princípio de funcionamento destes moduladores. A operação do inversor é estudada apresentando os sinais trifásicos gerados a partir de uma fonte de tensão C.C. É feita a descrição do PWM senoidal baseado em portadora seno¿triangulo e o PWM baseado em vetores espaciais. Também é apresentada uma estratégia de modulação na região de sobre modulação. O principio de modulação aleatorea é estudado citando as contribuições principais nesta área. Finalmente é apresentada a modulação por eliminação seletiva de harmônicas e as principais referências. São apresentados resultados de simulação dos principais métodos de modulação considerando os principais parâmetros de desempenho. Como aplicação de técnicas de modulação em inversores, é apresentada uma estratégia para compensação de tensão usando restauradores dinâmicos de tensão DVR. / This dissertation studies modulation techniques for three-phase inverters intended to induction motor control. The First part is literature review regarding the main modulation techniques. Secondly it is described the operation principle of voltage source inverter showing three-phase signals generated from a C.C voltage. It is made a PWM description based on carrier (sine-triangle) and space vector modulation in both linear and over modulation region. The principle of random modulation is presented mentioning the main contributions in this area. It is showed the modulation by selective elimination of harmonics and the main references. Simulation results from modulation schemes are presented taking into account performance of each method. As application it is presented a strategy for Dynamic Voltage Restorer (DVR).

Made available in DSpace on 2015-05-08T14:57:19Z (GMT). No. of bitstreams: 1 arquivototal.pdf: 3511521 bytes, checksum: b6fc527d9dd12a95d8694d91fe94df32 (MD5) Previous issue date: 2014-05-13 / Coordenação de Aperfeiçoamento de Pessoal de Nível Superior - CAPES / This paper presents a technique of Pulse Width Modulation (PWM) converters for single-phase three-level with diode clipping, which aims at balancing the tension in the bus capacitors. The technique consists of injecting a signal common mode voltage of the sinusoidal modulating signal width modulation conventional pulse-based Carrier, which introduces an element of DC current in the neutral bus capacitors, this voltage can be controlled, with the main objective to balance the voltage of the capacitor relative to the neutral point. The technique is presented a set of equations, in order to demonstrate how the injected voltage signal introduces a component DC current at the neutral point. To test the proposed strategy, the structure of the three-level converter with diode clipping was simulated with PSIM and mounted using a digital signal processor for generating the control signals of semiconductor devices. Simulations and experimental results that demonstrate the efficiency and quality of the PWM strategy are presented. / Este trabalho apresenta uma técnica de Modulação por Largura de Pulso (PWM) para conversores monofásicos de três níveis com diodo de grampeamento, que tem como objetivo o balanceamento da tensão no barramento de capacitores. A técnica consiste na injeção de um sinal de tensão de modo comum no sinal modulante senoidal, da modulação por largura de pulso convencional baseada em Portadora (Carrier Based Pulse Width Modulation), o qual introduz uma componente de corrente CC no ponto neutro do barramento de capacitores, podendo essa tensão ser controlada, com o objetivo principal de balancear a tensão dos capacitores em relação ao ponto neutro. A técnica é apresentada em um conjunto de equações, com a finalidade de demonstrar como o sinal de tensão injetado introduz uma componente de corrente CC no ponto neutro. Para testar a estratégia proposta, a estrutura do conversor de três níveis com diodos de grampeamento foi simulada com o PSIM e montada, utilizando um processador digital de sinais para geração dos sinais de comando dos dispositivos semicondutores. Resultados de simulações e experimentais que demonstram a eficiência e a qualidade da estratégia PWM são apresentados.

Orientador: José Antenor Pomilio / Tese (doutorado) - Universidade Estadual de Campinas, Faculdade de Engenharia Elétrica e de Computação / Made available in DSpace on 2018-08-23T00:46:30Z (GMT). No. of bitstreams: 1 Alvarenga_MarcosBalduinode_D.pdf: 18917931 bytes, checksum: a0630621c255135a8bf5fd49974daea6 (MD5) Previous issue date: 2013 / Resumo: Esta tese apresenta contribuições para o emprego de inversor multinível em cascata simétrica como filtro ativo de potência. O balanceamento das tensões nos barramentos CC é feito a partir de informação de um único bit obtido em cada módulo do conversor. O balanceamento é realizado através da postergação ou da supressão dos pulsos e, também, pela organização da ordem de acionamento das chaves semicondutoras de potência. A estratégia de modulação desenvolvida permite também a equalização dos pulsos de chaveamento entre os diversos módulos do inversor e suprime um porcentual de comutações redundantes ou irrelevantes, minimizando as perdas do conversor. Toma-se como parâmetro de qualidade a distorção harmônica decorrente de tais procedimentos. A técnica desenvolvida viabiliza a inserção de células em redundância, o que aumenta a confiabilidade da operação, favorecendo sua aplicação em filtros ativos de potência e dispositivos de condicionamento aplicados em redes de energia elétrica. O controle da corrente do filtro ativo e o controle das tensões nos barramentos CC são executados por dois controladores independentes, cujos projetos são detalhados e equacionados. A estratégia foi avaliada em um protótipo experimental de baixa tensão, constituído de um conversor multinível composto por quatro células simétricas, sendo uma em redundância, comandadas por um microcontrolador. Foram realizadas, também, simulações, considerando um alimentador de distribuição com 22,5 MVA e 13,8 kV. Nas análises dos resultados, são considerados os valores estabelecidos por normas relativas ao limite de harmônicas de corrente / Abstract: The present thesis shows contributions to the use of symmetrical cascaded multilevel inverter as active power filter. The balancing of the voltages on the DC bus is made from a single bit of information obtained in each converter module. Balancing is performed by postponement or suppression pulses and also for organizing the order of activation of the power semiconductor switches. The modulation strategy developed also allows the equalization of switching pulses between different inverter modules and removes a percentage of redundant or irrelevant switching, minimizing the losses of the converter. Taken as the quality parameter was the harmonic distortion resulting from such procedures. The technique developed enables the insertion of cells in redundancy, which increases reliability of the operation, in favor of their use in active power filters and conditioning devices used in power grids. The current control of active filter and control voltages in DC buses are performed by two independent controllers, whose projects are detailed and calculated. The strategy was evaluated in an experimental prototype low-voltage, consisting of a multilevel converter composed of four symmetrical cells, one redundancy, controlled by a microcontroller. It was also performed simulations considering a distribution feeder with 22.5 MVA and 13.8 kV. In the analysis of the results it was taken into account established values by standards for harmonic current limit / Doutorado / Energia Eletrica / Doutor em Engenharia Elétrica

Orientadores: Ernesto Ruppert Filho, Marcelo Gradella Villalva / Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Elétrica e de Computação / Made available in DSpace on 2018-08-21T14:53:53Z (GMT). No. of bitstreams: 1 Espindola_MarcosFernando_M.pdf: 5114547 bytes, checksum: 1601ee84cd6d17c671ba644a288c398d (MD5) Previous issue date: 2012 / Resumo: Apresenta-se a implementação de um inversor trifásico de tensão a três níveis para ser utilizado no controle de velocidade de um motor síncrono trifásico a imãs permanentes usando o método de controle vetorial. Realizou-se o estudo, projeto e construção de um inversor de tensão a três níveis com neutro grampeado ou inversor NPC neutral point clamped. Utilizou-se modulação em largura de pulsos por vetores espaciais no controle vetorial de velocidade do motor. Foram realizadas simulações do sistema proposto usando os aplicativos computacionais Matlab/Simulink e PSIM. Realizou-se em seguida uma montagem experimental constituída de um motor síncrono a imãs permanentes de 0,75 kW acoplado a um freio eletromagnético que lhe serviu de carga mecânica. O sistema motor e carga foi acionado pelo inversor com modulação em largura de pulsos por vetores espaciais e os resultados obtidos do controle de velocidade realizado, incluindo reversão de velocidade e frenação do motor, são apresentados no trabalho. Comparou-se também o desempenho de um inversor a três níveis usando modulação em largura de pulsos por vetores espaciais com o desempenho de um inversor a dois níveis usando modulação em largura de pulsos por vetores espaciais na alimentação de uma carga resistiva. Resultados de simulação e resultados experimentais são apresentados. Neste trabalho realizou-se uma comparação qualitativa entre o uso do inversor a dois níveis e do inversor a três níveis que mostra em que situações é conveniente utilizar o inversor a três níveis / Abstract: It is presented the implementation of a three phase three level voltage inverter to be used in the speed control of a three phase permanent magnet synchronous motor using the vector control method. To achieve this goal, it was carried out the study, design and construction of a three level neutral point clamped voltage inverter or NPC inverter. For the control of the motor it was used a space vector modulation. The proposed system was simulated using Matlab/Simulink and PSIM softwares. It was carried out an experimental assembly consisting of a 0.75 kW permanent magnet synchronous motor coupled to an electromagnetic brake as a mechanical load. The motor and load system were triggered by the inverter with space vector modulation. The results of the speed control, including reversal of speed and motor breaking, are presented in the study. The performance of a three level inverter using space vector modulation is compared to the performance of a two level inverter using space vector modulation feeding a resistive load. The simulation and experimental results are presented. In this work a qualitative comparison between the two level inverter and three level inverter was done showing in wich situations it is better to use the three level inverter / Mestrado / Energia Eletrica / Mestre em Engenharia Elétrica

A split-phase induction motor (SPIM) is obtained by splitting each of the three-phase stator windings of an induction motor into two equal halves. This results in two sets of three-phase windings with a spatial angle difference of 30◦ (electrical) between them. The two sets of windings are fed from two different voltage-source inverters for speed control of the split-phase motor drive. Low dc bus voltage requirement and improved torque profile are some of the advantages of the split-phase motor, compared to the normal three-phase induction motor. A pulse width modulation (PWM) technique is used to produce the gating signals for the power semiconductor devices in the two inverters. The PWM technique can either be a carrier comparison (CC) based method or a space-vector (SV) based scheme. The carrier based PWM methods employ six modulating waves, which are compared against a common triangular carrier to generate the gating pulses. In space-vector based PWM schemes, the voltage reference is specified in terms of a rotating reference vector. In each subcycle, a set of voltage vectors are applied for appropriate durations of time to produce an average vector equal to the reference vector. Unlike three-phase induction motor drives, where the voltage vectors are two dimensional, the voltage vectors in the case of SPIM drive are four dimensional. This thesis presents a detailed survey on carrier-comparison based and space-vector based PWM techniques for the SPIM drive. In this thesis, sine-triangle PWM (STPWM) is analyzed from a space-vector perspective. The set of voltage vectors applied and the sequence of application of the voltage vectors in each half-carrier cycle are studied. The analysis shows that the set of voltage vectors and the switching sequence employed by STPWM are different from those used by the well known SVPWM tech-niques. Two other CC based PWM techniques, based on common mode injection, are considered for the SPIM drive. In one method, the common-mode signal is derived from all the six modulating signals, and is the same for both the inverters. In the second method, the common-mode signal is different for the two inverters; each common-mode signal is derived from the three-phase sinusoidal signals of the respective inverter. The study shows that the latter method has the highest dc bus utilization and results in the lowest total harmonic distortion (THD) among the CC PWM techniques. An experimental comparison of the three carrier-comparison techniques with three well known space-vector PWM techniques is presented. Total harmonic distortion (THD) of the line current is measured at different modulation indices for all six techniques. The experimental results are obtained from a 6kW, 200V, 50Hz split-phase induction motor drive, with constant V /F ratio. The PWM techniques are implemented using an ALTERA cyclone II field programmable gate array (FPGA) digital controller. One of the SV techniques, termed here as 4-dimensional 24-sector (4D24SEC) PWM is found to be the best in terms of line current THD among all the CC and SV based PWM techniques considered. However, compared to any carrier-based technique, implementation of the 4D24SEC PWM based on the space vector approach is found to be resource intensive. Hence, an equivalent carrier-based implementation of 4D24SEC PWM is proposed in this thesis. The feasibility of the proposed approach is verified experimentally, and is found to be consuming much less logical resources than the space-vector implementation (i.e. 4102 logical elements for the CC approach as against 33,655 logical elements for the SV approach). A new space-vector PWM technique is also proposed in the thesis. This technique utilizes a new set of voltage vectors and a new switching sequence, which are motivated by the analyses of the carrier-based methods, presented earlier. The proposed technique is implemented, and is compared with other space-vector and carrier-based methods at different modulation indices and switching frequencies. The proposed PWM technique is found to have the same dc-bus utilization as the existing 4-dimensional SV based PWM techniques. The performance of the proposed method is found to be not better than existing 4-dimensional SV PWM methods. The possibilities for new switching sequence is being explored here.

No description available.

Voltage source inverter (VSI) is used to control the speed of an induction motor by applying AC voltage of variable amplitude and frequency. The semiconductor switches in a VSI are turned on and off in an appropriate fashion to vary the output voltage of the VSI. Various pulse width modulation (PWM) methods are available to generate the gating signals for the switches. The process of PWM ensures proper fundamental voltage, but introduces harmonics at the output of the VSI. Ripple in the developed torque of the induction motor, also known as pulsating torque, is a prominent consequence of the harmonic content. The harmonic voltages, impressed by the VSI on the motor, differ from one PWM method to another. Space-vector-based approach to PWM facilitates a large number of switching patterns or switching sequences to operate the switches in a VSI. The switching sequences can be classified as conventional, bus-clamping and advanced bus-clamping sequences. The conventional sequence switches each phase once in a half-carrier cycle or sub-cycle, as in case of sine-triangle PWM, third harmonic injection PWM and conventional space vector PWM (CSVPWM). The bus-clamping sequences clamp a phase to one of the DC terminals of the VSI in certain regions of the fundamental cycle; these are employed by discontinuous PWM (DPWM) methods. Popular DPWM methods include 30 degree clamp PWM, wherein a phase is clamped during the middle 30 degree duration of each quarter cycle, and 60 degree clamp PWM which clamps a phase in the middle 60 degree duration of each half cycle. Advanced bus-clamping PWM (ABCPWM) involves switching sequences that switch a phase twice in a sub-cycle besides clamping another phase. Unlike CSVPWM and BCPWM, the PWM waveforms corresponding to ABCPWM methods cannot be generated by comparison of three modulating signals against a common carrier. The process of modulation in ABCPWM is analyzed from a per-phase perspective, and a computationally efficient methodology to realize the sequences is derived. This methodology simplifies simulation and digital implementation of ABCPWM techniques. Further, a quick-simulation tool is developed to simulate motor drives, operated with a wide range of PWM methods. This tool is used for validation of various analytical results before experimental investigations. The switching sequences differ in terms of the harmonic voltages applied on the machine. The harmonic currents and, in turn, the torque ripple are different for different switching sequences. Analytical expression for the instantaneous torque ripple is derived for the various switching sequences. These analytical expressions are used to predict the torque ripple, corresponding to different switching sequences, at various operating conditions. These are verified through numerical simulations and experiments. Further, the spectral properties are studied for the torque ripple waveforms, pertaining to conventional space vector PWM (CSVPWM), 30 degree clamp PWM, 60 degree clamp PWM and ABCPWM methods. Based on analytical, simulation and experimental results, the magnitude of the dominant torque harmonic with an ABCPWM method is shown to be significantly lower than that with CSVPWM. Also, this ABCPWM method results in lower RMS torque ripple than the BCPWM methods at any speed and CSVPWM at high speeds of the motor. Design of hybrid PWM methods to reduce the RMS torque ripple is described. A hybrid PWM method to reduce the RMS torque ripple is proposed. The proposed method results in a dominant torque harmonic of magnitude lower than those due to CSVPWM and ABCPWM. The peak-to-peak torque in each sub-cycle is analyzed for different switching sequences. Another hybrid PWM is proposed to reduce the peak-to-peak torque ripple in each sub-cycle. Both the proposed hybrid PWM methods reduce the torque ripple, without increasing the total harmonic distortion (THD) in line current, compared to CSVPWM. CSVPWM divides the zero vector time equally between the two zero states of a VSI. The zero vector time can optimally be divided to minimize the RMS torque ripple in each sub-cycle. It is shown that such an optimal division of zero vector time is the same as addition of third harmonic of magnitude 0.25 times the fundamental magnitude to the three-phase sinusoidal modulating signals. ABCPWM applies an active state twice in a sub-cycle, with the active vector time divided equally. Optimal division of active vector time in ABCPWM to minimize the RMS torque ripple is evaluated, both theoretically and experimentally. Compared to CSVPWM, this optimal PWM is shown to reduce the RMS torque ripple significantly over a wide range of speed. The various PWM schemes are implemented on ALTERA CycloneII field programmable gate array (FPGA)-based digital control platform along with sensorless vector control and torque estimation algorithms. The controller generates the gating signals for a 10kVA IGBT-based two-level VSI connected to a 5hp, 400V, 4-pole, 50Hz squirrel-cage induction motor. The induction motor is coupled to a 230V, 3kW separately-excited DC generator.

The goal of this master´s thesis is primarily the theoretical analysis of three-phase inverters and subsequent familiarization of the reader with their detailed practical structure. The first part is devoted to the general definition of the power semiconductor converter as such. The following part describes the principle of three-phase pulse width modulation including the widely used principle of scalar control of induction motors. The second half of the thesis is already focused on the practical design of a three-phase inverter for a 50 kW high-speed induction motor. This section explains the problem of sizing and selecting all of the sub-elements of the inverter based on the parameters specified by the end user of the device.

This master´s thesis describes switch mode power supply and discusses the design of its individual parts. It also contains a simulation of the power part of the converter and a reseach in the area of DC/DC converters.

Master’s thesis deals with design and realization of power supply, which is supplied and controlled via USB bus. In theoretical part there are described principles of USB communication drivers which ensures this communication, there are described principles of linear voltage regulators and basic types of DC/DC converters. Mentioned is also PID regulator theory. Practical part aims for design of suitable DC/DC converter topology and creating algorithms for driving this converter. Next there is created PC program which drives power supply and there are also accomplished basic power supply measurements. The result of this thesis is functional power supply supplemented with PCB.