The emerging widespread use of real-time multimedia applications over wireless networks makes the support of Quality of Service (QoS) a key problem. In this paper, we focus on QoS support mechanisms for IEEE 802.11 Wireless ad-hoc networks. First, we review the IEEE 802.11 standard and other enhanced MAC schemes that have been proposed to support QoS for 802.11 ad hoc networks. Then we propose a new priority MAC scheme which uses the different initial contention window instead of CWmin in IEEE 802.11 MAC to reduce the collision rate, then reduces the average delay and increases the throughput.

While the amount of textual data available to us is constantly increasing, managing the texts by human effort is clearly inadequate for the volume and complexity of the information involved. Consequently, requirement for automated extraction of useful knowledge from huge amounts of textual data to assist human analysis is apparent. Text mining (TM) is mostly an automated technique that aims to discover knowledge from textual data. In this thesis, the notion of text mining, its techniques, applications are presented. In particular, the study provides the definition and overview of concepts in text categorization. This would include document representation models, weighting schemes, feature selection methods, feature extraction, performance measure and machine learning techniques. The thesis details the functionality of text mining as a quality improvement tool. It carries out an extensive survey of text mining applications within service sector and manufacturing industry. It presents two broad experimental studies tackling the potential use of text mining for the hotel industry (the comment card analysis), and in automobile manufacturer (miles per gallon analysis). Keywords: Text Mining, Text Categorization, Quality Improvement, Service Sector, Manufacturing Industry.

Quality of Service (QoS) schedulers are one of the most important components for the end-to-end QoS support in the Internet. The focus of this thesis is the hardware design and implementation of the QoS schedulers, that is scalable for high line speeds and large number of traffic flows. FPGA is the selected hardware platform. Previous work on the hardware design and implementation of QoS schedulers are mostly algorithm specific. In this thesis, a general architecture for the design of the class of Packet Fair Queuing (PFQ) schedulers is proposed. Worst Case Fair Weighted Fair Queuing Plus (WF2Q+) scheduler is implemented and tested in hardware to demonstrate the proposed architecture and design enhancements. The maximum line speed that PFQ algorithms can operate decreases as the number of scheduled flows increases. For this reason, this thesis proposes to aggregate the flows to scale the PFQ architecture to high line speeds. The Window Based Fair Aggregator (WBFA) algorithm that this thesis suggests for flow aggregation provides a tunable trade-off between the efficient use of the available bandwidth and the fairness among the constituent flows. WBFA is also integrated to the hardware PFQ architecture. The QoS support provided by the proposed PFQ architecture and WBFA is measured by conducting hardware experiments on a custom built high speed network testbed which consists of three data processing cards and a backplane. In these experiments, the input traffic is provided by the hardware traffic generator which is designed in the scope of this thesis.

In the traditional mobile communication networks, the bandwidth of wireless links is too small and the bandwidth difference between wireless links and wireline links is too large. This leads to limiting the application of mobile communication networks to transmit multimedia data and other high-bit rate services, and the problem of lacking bandwidth often occurs to wireless links. But the new generation mobile communication networks, called the third generation mobile communication systems (3G systems), will change this condition. Because the 3G systems will quickly enhance the transmission rate of the wireless links (up to 2Mbps) and provide better quality of transmission, the transmission of multimedia data and other high-bit rate services in the mobile communication networks can be achieved. The 3G systems can support many new services that are never supported before, and these new services always need support the point-to-multipoint transmission. In this thesis, we will discuss the problems of supporting these new services, and then we propose new multimedia multicasting architecture to overcome these problems.

<p>Jönköping Energi AB (JEAB) is a local energy supplier for the county of Jönköping. JEAB also maintain the local Metropolitan Area Network (MAN). They have recently installed GPON in a portion of their network and have connected it to the MAN via an Extreme switch.</p><p>However JEAB would prefer to use Cisco equipment instead of Extreme since the MAN comprises of Cisco hardware. They require a solution to connect GPON to the MAN with a recently purchased line card (Cisco 7600 ES20) which can be installed in a Cisco 6500 Catalyst switch. There is also a possible solution with an Alcatel-Lucent 7450 ESS-1 switch. The proposed solution is to use Virtual Private LAN Service (VPLS), though the exact implementation required is unknown. Additionally JEAB have asked for research into GPON and VPLS in order to improve their understanding of both techniques. This would be of benefit to them both now and in the future.</p><p>In order to achieve the stated objectives the following questions are raised:</p><p>• How does GPON work?</p><p>• How does VPLS work?</p><p>• How can GPON be connected to the MAN via Cisco Systems 6500 Catalyst switch/7600 Router?</p><p>• How can GPON be connected to the MAN via Alcatel-Lucents 7450 ESS-1?</p><p>The research into GPON and VPLS provides the required background knowledge in order to investigate how GPON can be connected to the MAN. The main body of the work is to analyse the requirements of the company and build a configuration which satisfies them. The desired implementation via Cisco Systems solution was deemed unsuitable due to a feature of DHCP option 82 which did not function as required. The focus then turned to Alcatel-Lucents solution.</p><p>The resulting solution uses a part of VPLS via Alcatel-Lucents 7450 ESS-1. All the key elements are included, including hiding customer VLANs from the ISP and per-service QoS bandwidth management.</p><p>The conclusion is that whilst using Alcatel-Lucents solution means a deviation from the all-Cisco implementation that had been planned; the benefit of including all the desired functionality outweighs the mixing of manufacturers.</p><p>The techniques of GPON and VPLS are extremely versatile and can be used in a variety of networks. Therefore there is scope for further research into how these two techniques can be used together in other types of MAN.</p>

Data stream processing in the industrial as well as in the academic field has gained more and more importance during the last years. Consider the monitoring of industrial processes as an example. There, sensors are mounted to gather lots of data within a short time range. Storing and post-processing these data may occasionally be useless or even impossible. On the one hand, only a small part of the monitored data is relevant. To efficiently use the storage capacity, only a preselection of the data should be considered. On the other hand, it may occur that the volume of incoming data is generally too high to be stored in time or–in other words–the technical efforts for storing the data in time would be out of scale. Processing data streams in the context of this thesis means to apply database operations to the stream in an on-the-fly manner (without explicitly storing the data). The challenges for this task lie in the limited amount of resources while data streams are potentially infinite. Furthermore, data stream processing must be fast and the results have to be disseminated as soon as possible. This thesis focuses on the latter issue. The goal is to provide a so-called Quality-of-Service (QoS) for the data stream processing task. Therefore, adequate QoS metrics like maximum output delay or minimum result data rate are defined. Thereafter, a cost model for obtaining the required processing resources from the specified QoS is presented. On that basis, the stream processing operations are scheduled. Depending on the required QoS and on the available resources, the weight can be shifted among the individual resources and QoS metrics, respectively. Calculating and scheduling resources requires a lot of expert knowledge regarding the characteristics of the stream operations and regarding the incoming data streams. Often, this knowledge is based on experience and thus, a revision of the resource calculation and reservation becomes necessary from time to time. This leads to occasional interruptions of the continuous data stream processing, of the delivery of the result, and thus, of the negotiated Quality-of-Service. The proposed robustness concept supports the user and facilitates a decrease in the number of interruptions by providing more resources.

Gemeinsamer Workshop von Universitaetsrechenzentrum und Professur Rechnernetze und verteilte Systeme der Fakultaet fuer Informatik der TU Chemnitz. Der Dynamic Traffic Shaper erlaubt ein dynamisches Bandbreiten-Management von begrenzten Netzzugängen unter Zuhilfenahme der Quality-of-Service-Möglichkeiten des Linux-Kerns. Er wird typischerweise auf einem Router, der das gemanagete lokale Netz mit dem Internet verbindet, eingesetzt. Nutzer dieses Netzes werden anhand ihrer Transfervolumina für eine gewisse Zeit in verschiedene Nutzergruppen mit unterschiedlichen Bandbreiten eingeordnet. Damit soll sichergestellt werden, dass über einen bestimmten Zeitraum nur ein festgelegtes Datenvolumen verursacht werden kann. In diesem Vortrag werden die aktuellen Entwicklungen beim Einsatz im Chemnitzer Studentennetz aufgezeigt.

Das Chemnitzer StudentenNetz (CSN) setzt seit mehreren Jahren ein System zur automatischen Regelung der Bandbreite ("DynShaper") basierend auf den Grundlagen der Diplomarbeit von Jan Horbach "Dynamische Bandbreitenbeschränkung mit QoS" ein. Aufgrund der weiterhin bestehenden Notwendigkeit zum Einsatz dieses Systems, ist es nötig die DynShaper-Software zu überarbeiten, um ihre Implementierung an die Standards des CSN anzupassen und die unvollständige Dokumentation zu ergänzen. Hauptaugenmerk liegt dabei auf der Integration des Systems in die bestehende Softwarearchitektur des CSN und der Schaffung einer modularen Implementierung zur Evaluierung anderer Berechnungsverfahren.

As users become more comfortable using IEEE 802.11 Wireless Local Area Networks, the need for quality of service is becoming more important because of the lack of support in current standards and the increase of multimedia traffic over the Internet. The IEEE 802.11 working group has recognized this fact proposing the Enhanced Distributed Channel Access (EDCA), a priority-based distributed scheme meant to provide service differentiation. EDCA relies on either different Arbitrary Interframe Space (AIFS), or Contention Window (CW) parameters, or both to provide service differentiation. In this thesis, a performance evaluation of the EDCA using five different combinations of the above mentioned parameters is included and compared to the current DCF (Distributed Coordination Function) standard, which is used as the base case. Simulation results show that simpler schemes based on one parameter alone can provide good average service differentiation. However, only multiparameter schemes provide the average and instantaneous high throughput and low delay values needed to support streaming applications. Starvation is a problem spanning all these schemes. It is especially more pronounced in schemes using combinations of parameters. In this thesis, a measurement-based admission control mechanism is proposed to overcome the above stated problems. The admission control mechanism uses an algorithm that admits a flow depending on the jitter values for high priority traffic and the throughput of the low priority traffic. It also allows the administrator to set the bandwidth sharing policy between the high priority traffic and low priority traffic. Results show that the admission control mechanism not only protects existing high priority flows from jitter and low priority flows from starvation, but also improves upon the network utilization.

Rapidly increasing transistor densities have led to the emergence of richly-integrated substrates in the form of chip multiprocessors and systems-on-a-chip. These devices integrate a variety of discrete resources, such as processing cores and cache memories, on a single die with the degree of integration growing in accordance with Moore's law. In this dissertation, we address challenges of scalability and quality-of-service (QOS) in network architectures of highly-integrated chips. The proposed techniques address the principal sources of inefficiency in networks-on-chip (NOCs) in the form of performance, area, and energy overheads. We also present a comprehensive network architecture capable of interconnecting over a thousand discrete resources with high efficiency and strong guarantees. We first show that mesh networks, commonly employed in existing chips, fall significantly short of achieving their performance potential due to transient congestion effects that diminish network performance. Adaptive routing has the potential to improve performance through better load distribution. However, we find that existing approaches are myopic in that they only consider local congestion indicators and fail to take global network state into account. Our approach, called Regional Congestion Awareness (RCA), improves network visibility in adaptive routers via a light-weight mechanism for propagating and integrating congestion information. By leveraging both local and non-local congestion indicators, RCA improves network load balance and boosts throughput. Under a set of parallel workloads running on a 49-node substrate, RCA reduces on-chip network latency by 16%, on average, compared to a locally-adaptive router. Next, we target NOC latency and energy efficiency through a novel point-to-multipoint topology. Ring and mesh networks, favored in existing on-chip interconnects, often require packets to go through a number of intermediate routers between source and destination nodes, resulting in significant latency and energy overheads. Topologies that improve connectivity, such as fat tree and flattened butterfly, eliminate much of the router overhead, but require non-minimal channel lengths or large channel count, reducing energy-efficiency and/or performance as a result. We propose a new topology, called Multidrop Express Channels (MECS), that augments minimally-routed express channels with multi-drop capability. The resulting richly-connected NOC enjoys a low hop count with favorable delay and energy characteristics, while improving wire utilization over prior proposals. Applications such as virtualized servers-on-a-chip and real-time systems require chip-level quality-of-service (QOS) support to provide fairness, service differentiation, and guarantees. Existing network QOS approaches suffer from considerable performance and area overheads that limit their usefulness in a resource-limited on-die network. In this dissertation, we propose a new QOS scheme called Preemptive Virtual Clock (PVC). PVC uses a preemptive approach to provide hard guarantees and strong performance isolation while dramatically reducing queuing requirements that burden prior proposals. Finally, we introduce a comprehensive network architecture that overcomes the bottlenecks of earlier designs with respect to area, energy, and QOS in future highly-integrated chips. The proposed NOC uses a topology-centric QOS approach that restricts the extent of hardware QOS support to a fraction of the network without compromising guarantees. In doing so, network area and energy efficiency are significantly improved. Further improvements are derived through a novel flow-control mechanism, along with switch- and link-level optimizations. In concert, these techniques yield a network capable of interconnecting over a thousand terminals on a die while consuming 47% less area and 26% less power than a state-of-the-art QOS-enabled NOC. The mechanisms proposed in this dissertation are synergistic and enable efficient, high-performance interconnects for future chips integrating hundreds or thousands of on-die resources. They address deficiencies in routing, topologies, and flow control of existing architectures with respect to area, energy, and performance scalability. They also serve as a building block for cost-effective advanced services, such as QOS guarantees at the die level. / text