<p>In this thesis, design aspects of fully integrated multibandmultistandard front-end receivers are investigated based onthree fundamental aspects: noise, linearity and operatingfrequency. System level studies were carried out to investigatethe effects of different modulation techniques, duplexing andmultiple access methods on the noise, linearity and selectivityperformance of the circuit. Based on these studies and thelow-cost consideration, zero-IF, low-IF and wideband-IFreceiver architectures are promising architectures. These havea common circuit topology in a direct connection between theLNA and the mixer, which has been explored in this work toimprove the overall RF-to-IF linearity. One front-end circuitapproach is used to achieve a low-cost solution, leading to anew multiband multistandard front-end receiver architecture.This architecture needs a circuit whose performance isadaptable due to different requirements specified in differentstandards, works across several RF-bands and uses a minimumamount ofexternal components.</p><p>Five new circuit topologies suitable for a front-endreceiver consisting of an LNA and mixer (low-noise converter orLNC) were developed. A dual-loop wide-band feedback techniquewas applied in all circuits investigated in this thesis. Threeof the circuits were implemented in 0.18 mm RF-CMOS and 25 GHzbipolar technologies. Measurement results of the circuitsconfirmed the correctness of the design approach.</p><p>The circuits were measured in several RF-bands, i.e. in the900 MHz, 1.8 GHz and 2.4 GHz bands, with S11 ranging from–9.2 dB to–17 dB. The circuits have a typicalperformance of 18-20 dB RF-to-IF gain, 3.5-4 dB DSB NF and upto +4.5 dBm IIP3. In addition, the circuit performance can beadjusted by varying the circuit’s first-stage biascurrent. The circuits may work at frequencies higher than 3GHz, as only 1.5 dB of attenuation is found at 3 GHz and nopeaking is noticed. In the CMOS circuit, the extrapolated gainat 5 GHz is about 15 dB which is consistent with the simulationresult. The die-area of each of the circuits is less than 1mm2.</p>

ITC/USA 2012 Conference Proceedings / The Forty-Eighth Annual International Telemetering Conference and Technical Exhibition / October 22-25, 2012 / Town and Country Resort & Convention Center, San Diego, California / The Serial Streaming Telemetry infrastructure is being augmented with the Telemetry Network System, which is a net-centric infrastructure requiring bi-directional communications between the test article segment and the ground station segment. As a result, future radio segments must implement transceiver architecture to support bi-directional communications. This paper presents a design methodology for a multi-band transceiver design. The design methodology is based upon the Weaver architecture to provide coarse selection between the telemetry bands. Utilization of the Weaver architecture allowed for the optimization of multiple transmitter and receiver channels into single channels to support the L/S/C-Band frequency allocations. System-level simulation is presented to evaluate the feasibility of the transceiver design for a multi-band, multi-mode software-defined radio (SDR) platform in support of Telemetry Network System.

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As wireless devices and radar systems become more ubiquitous, there is a growing need for wideband multi-standard RF-SOCs. To enable the advantages of multi-standard systems, reconfigurable RF front ends are needed. Because of the large number of RF signals in wideband systems, tunability and linearity become important parameters. Prior work has shown tunable LC filters to be advantageous in the microwave regime. A balanced-to-unbalanced (balun) transformation circuit is required to support the differential nature of a tunable LC filter. An active balun that also performs as a transconductor to drive the LC tank would relax the design requirement for the LNA and remove a passive balun that would have to precede the LNA. This thesis discusses the linearization of active baluns and presents a comparison between two 4 to 7 GHz tunable BPF designs with active baluns implemented in 0.18 μm SiGe BiCMOS technology. Fourth order filtering is achieved by subtracting two 2nd order LC-tanks. This approach allows 3-dB bandwidth to be tunable from 10% to 20%. In each design, a linearized input active balun is employed to drive the LC-tanks from a single-ended input while preserving noise figure and IIP3 performance. Two different linearization techniques are applied for the balun designs. Simulated NF ranges from 7.5 to 13 dB and IIP3 averages about 5 dBm with the peak value of 21 dBm. / Master of Science / As wireless devices and radar systems become more ubiquitous, there is a growing need for Radio Frequency (RF) integrated circuits that can support multiple frequency bands and standards. Because of the large number of RF signals, robust tunability and power handling of the electronics become important parameters. Power handling is important because the amplifier and the filter can generate distortions if the power going through them becomes too high. Prior work has shown integrated tunable inductor-capacitor (LC) resonance based filters to be advantageous in the microwave frequency regime compared to integrated switched capacitor based filters. A balancedto-unbalanced (balun) conversion of the RF signals is needed to support the differential nature of the LC resonators. This thesis discusses transistor-based balun designs that can be integrated into front-end LC filter chips. The goal is to reduce distortion in the filter under the present of large number of RF signals and to keep noise of the circuit in reasonable range. The designs are implemented in 0.18 μm SiGe BiCMOS integrated circuit technology and simulated in commercial computer aided design software; predicted performance is competitive with the state of the art. The fabricated chips will be characterized in future work.

Radio frequency (RF) receivers are inherently non-linear due to non-linear components contained within the RF front-end such as the low noise amplifier (LNA) and mixer. When receivers operate in the non-linear region, this will affect the system performance due to intermodulation products, and cross-modulation, to name a few. Intermodulation products are the result of adjacent channel signals that combine and create intermodulation distortion of the received signal. We call these adjacent channel signals blockers. Receiving blockers are unavoidable in wideband receivers and their effect must be analyzed and properly addressed. This M.S. Thesis studies the effect of blockers on system performance, specifically the symbol error rate (SER), as a function of the receiver non-linearity figure and the blocking signal power and modulation format. There have been numerous studies on the effect of non-linearity in the probability of true and false detections in spectrum sensing when blockers are present. There has also been research showing the optimal modulation scheme for effective jamming. However, we are not aware of work analyzing the effect of modulated adjacent channel blockers on communication system performance. The approach taken in this paper is a theoretical derivation followed by numerical analysis aimed to quantify the effect of receiver nonlinearity on communication system performance as a function of (1) receiver characteristics, (2) blocking signal powers, (3) signal and blocker modulation format, and (4) phase-synchronized/non-synchronized blocker reception. The work focuses on M-PSK modulation schemes. For high blocker powers and non-linearity, the Es/No (Eb/No) performance loss can be as high as 4.7 dB for BPSK modulated signal and BPSK modulated blockers when received in sync with the desired signal. When blockers have a random phase offset with respect to the desired signal, the performance degradation is about 2 dB for BPSK modulated desired and blocker signals. It was found that for an BPSK transmitted signal with phase-synchronous blockers, the SER (BER) deteriorates the most when the blocking signals are of the same modulation. The effect is reduced, but still significant, as the modulation order of the signal of interest or the blockers, or both increases. / Master of Science / This thesis analyzes the effect of non-linear components in wireless receivers on communication system performance. We consider that two strong radio frequency signals adjacent in frequency to the desired signal enter the receiver and cause signal distortion known as 3rd order intermodulation distortion. We analyze the effect on the symbol error rate (SER) in the presence of two modulated blockers. SER defines the ratio of erroneously detected symbols to the total number of transmitted symbols and is a function of the modulation scheme and radio channel conditions. The SER analysis is done for Phase Shift Keying (PSK) modulated signals and blockers for different receiver types and blocker power levels. This thesis derives the theoretical SER expressions followed by numerical analysis aimed to quantify the effect of receiver non-linearity on communication system performance as a function of (1) receiver characteristics, (2) blocking signal powers, (3) signal and blocker modulation formats, and (4) phase-synchronized/non-synchronized reception of blockers. We justify the need for these new SER expressions and verify them via simulations. The thesis shows that modulated blockers can significantly impact communication system performance if the blockers are strong with respect to the signal of interest and if the device is highly non-linear. The work also shows that the performance degradation is a function of the blocker signal characteristics, but there are ways to overcome this loss by design or management. This has important implications on the management of spectrum in the new shared spectrum bands, where heterogeneous systems and devices will coexist with strong signals coming from nearby transmitters, radars or TV stations, among others.

Yes / Matching the antenna’s impedance to the RF-front-end of a wireless communications system is challenging as the impedance varies with its surround environment. Autonomously matching the antenna to the RF-front-end is therefore essential to optimize power transfer and thereby maintain the antenna’s radiation efficiency. This paper presents a theoretical technique for automatically tuning an LC impedance matching network that compensates antenna mismatch presented to the RF-front-end. The proposed technique converges to a matching point without the need of complex mathematical modelling of the system comprising of non-linear control elements. Digital circuitry is used to implement the required matching circuit. Reliable convergence is achieved within the tuning range of the LC-network using control-loops that can independently control the LC impedance. An algorithm based on the proposed technique was used to verify its effectiveness with various antenna loads. Mismatch error of the technique is less than 0.2%. The technique enables speedy convergence (< 5 µs) and is highly accurate for autonomous adaptive antenna matching networks. / This work is partially supported by RTI2018-095499-B-C31, Funded by Ministerio de Ciencia, Innovación y Universidades, Gobierno de España (MCIU/AEI/FEDER,UE), and innovation programme under grant agreement H2020-MSCA-ITN-2016 SECRET-722424 and the financial support from the UK Engineering and Physical Sciences Research Council (EPSRC) under grant EP/E022936/1.

Advances toward increased integration and complexity of radio frequency (RF) andmixed-signal integrated circuits reduce the effectiveness of contemporary testmethodologies and result in a rising cost of testing. The focus in this research is on thecircuit-level implementation of alternative test strategies for integrated wirelesstransceivers with the aim to lower test cost by eliminating the need for expensive RFequipment during production testing.The first circuit proposed in this thesis closes the signal path between the transmitterand receiver sections of integrated transceivers in test mode for bit error rate analysis atlow frequencies. Furthermore, the output power of this on-chip loopback block wasmade variable with the goal to allow gain and 1-dB compression point determination forthe RF front-end circuits with on-chip power detectors. The loopback block is intendedfor transceivers operating in the 1.9-2.4GHz range and it can compensate for transmitterreceiveroffset frequency differences from 40MHz to 200MHz. The measuredattenuation range of the 0.052mm2 loopback circuit in 0.13µm CMOS technology was 26-41dB with continuous control, but post-layout simulation results indicate that theattenuation range can be reduced to 11-27dB via optimizations.Another circuit presented in this thesis is a current generator for built-in testing ofimpedance-matched RF front-end circuits with current injection. Since this circuit hashigh output impedance (>1k up to 2.4GHz), it does not influence the input matchingnetwork of the low-noise amplifier (LNA) under test. A major advantage of the currentinjection method over the typical voltage-mode approach is that the built-in test canexpose fabrication defects in components of the matching network in addition to on-chipdevices. The current generator was employed together with two power detectors in arealization of a built-in test for a LNA with 14% layout area overhead in 0.13µm CMOStechnology (<1.5% for the 0.002mm2 current generator). The post-layout simulationresults showed that the LNA gain (S21) estimation with the external matching networkwas within 3.5% of the actual gain in the presence of process-voltage-temperaturevariations and power detector imprecision.

The goal of the research in this dissertation is to design and characterize embedded passive components, interconnects, and circuits in inhomogeneous, multi-layer liquid crystalline polymer (LCP) substrates. The attenuation properties of inhomogeneous multi-layer LCP substrates were extracted up to 40 GHz. This is the first result for an inhomogeneous LCP stack-up that has been reported. The characterization results show excellent loss characteristics, much better than FR-4-based technology, and they are similar to LTCC and homogeneous LCP-based technology. A two-port characterization method based on measurements of multiple arrays of vias is proposed. The method overcomes the drawbacks of the one-port and other two-port characterizations. Model-to-hardware correlation was verified using multi-layer model in Agilent ADS and measurement-based via model using arrays of the vias. The resulting correlations show that this method can be readily applied to other vertical interconnect structures besides via structures. Comprehensive characterizations have been conducted for the efficient 3D integration of high-Q passives using a balanced LCP substrate. At two different locations from three different large M-LCP panels, 76 inductors and 16 3D capacitors were designed and measured. The parameters for the measurement-based inductor model were extracted from the measured results. The results validate the large panel process of the M-LCP substrate. To reduce the lateral size, multi-layer 3D capacitors were designed. The designed 3D capacitors with inductors can provide optimized solutions for more efficient RF front-end module integration. In addition, the parameters for the measurement-based capacitor model were extracted. Various RF front-end modules have been designed and implemented using high-Q embedded passive components in inhomogeneous multi-layer LCP substrates. A C-band filter using lumped elements has been designed and measured. The lumped baluns were used to design a double balnced-mixer for 5 GHz WLAN application and a doubly double-balanced mixer for 1.78 GHz CDMA receiver miniaturization. Finally, to overcome the limitations of the lumped component circuits, a 30 GHz gap-coupled band-pass filter in inhomogeneous multi-layer LCP substrates, and the measured results using SOLT and TRL calibrations have been compared to the simulation results.