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This paper deals with a method to additionally heat with switching losses in a classical power cycling test, as it is often used for power semiconductors.The fundamentals of testing, switching behavior, thermal and electrical characteristics of semiconductors are covered.The core of the work is the construction, start-up and solution of technical problems during the testing of the test stand. Another aspects are the measurement and software challenges in generating the pulse pattern and in evaluating the results. The last part of the work deals with the testing of different types of semiconductors, such as IGBTs and MOSFETs, which were also made of different materials, such as silicon and silicon carbide, and had different voltage classes.:Contents i Symbols and Abbreviations iii Introduction 1 1. Power Cycling Lifetime 2 1.1. Power Cycling-induced Ageing Mechanisms and Test Methods 2 1.1.1. Overview of Packaging Technologies and their Wear-out Failures 2 1.1.2. Failure Mechanisms in Power Modules and Discrete Devices 6 1.1.3. Basic Structure of a Test Bench for DC Power Cycling Tests 8 1.1.4. Modifications for SiC MOSFET Operation 12 1.1.5. Measurement Accuracy, Limits and Consequences for Test Evaluation 16 1.1.6. Thermal Resistance and Thermal Impedance Spectroscopy 18 1.2. Empirical Power Cycling Lifetime Models 21 2. Specific Limitations in Conditions for some Devices 27 3. Approaches of an Application-close Power Cycling Test 30 4. New Test Bench Concept with an adjustable part of switching losses 35 4.1. Basics for Switching 35 4.1.1. Active Clamping 38 4.1.2. Boosted Active Clamping 40 4.2. Repetitive Unclamped Inductive Switching 42 4.3. Test Bench Concept for Power Cycling Test with Turn-off Losses 44 4.4. Dimensioning of the Stray Inductance 47 4.4.1. Current Ripple and Attainable Switching Losses 51 4.5. Special Setup for Si and SiC MOSFETs 57 4.6. Measurement Algorithm and necessary Hardware 58 4.6.1. Measurement Hardware 58 4.6.2. Measurement Algorithm 60 4.6.3. Challenges during the Measurement 62 4.6.4. Current Source for Fast Regulation 66 5. Test Results with IGBTs 69 5.1. Modules with Baseplate 69 5.2. Modules without Baseplate 80 5.3. IGBTs in Discrete Housings 90 6. Test Results with MOSFETs 97 6.1. Low Voltage Si MOSFETs 97 6.2. SiC MOSFETs 106 7. Analysis of Si Low-voltage MOSFETs Results with FEM 107 8. Conclusion and Outlook 113 9. Acknowledgement 118 References 119 Appendix 136

We have pioneered a novel approach to the synthesis of high-quality and highly uniform few-layer graphene on silicon wafers, based on solid source growth from epitaxial 3C-SiC films [1,2]. The achievement of transfer-free bilayer graphene directly on silicon wafers, with high adhesion, at temperatures compatible with conventional semiconductor processing, and showing record- low sheet resistances, makes this approach an ideal route for metal replacement method for nanodevices with ultimate scalability fabricated at the wafer –level.

Electronics today rely heavily on silicon transistors which are unsuitable for extreme environments where temperatures potentially could reach up to 500◦C. Materials other than silicon has been proposed to solve this problem, one of which is silicon carbide. Transistors made of silicon carbide can with-stand higher temperatures than its silicon counterparts and could potentially be used for exploring hostile planets such as Venus or in high temperature applications such as sensors for engines. This project is a part of KTHs student satellite initiative which will send a satellite into orbit containing several experiments. One of the experiments is the SiC in space project which is described in this thesis and is largely based on previous works in this particular project. The goal for this thesis is to ensure that the SiC in space experiment is ready for launch into orbit. This was done by conducting tests in differ-ent temperatures as well as developing software for analyzing data from the experiment as well as modifying already existing software. Based on these tests, it is concluded that the silicon carbide transistors behaves in an ex-pected way and that the platform which operates the experiment is capable of withstanding temperatures up to 100◦C. If the satellite survives launch it is most likely that the data generated by the SiC in space project will be of use for determining the suitability of silicon carbide for space applications. / Elektronik idag förlitar sig på kiseltransistorer som är olämpliga för extrema miljöer där temperaturer kan nå upp till 500◦C. Andra material än kisel har föreslagits för att lösa detta problem, där kiselkarbid är en av dem. Transistorer gjorda av kiselkarbid klarar av högre temperaturer än kiseltransistorer och kan potentiellt användas för utforskning av planeter med extrema klimat eller för applikationer vid höga temperaturer så som sensorer inne i motorer. Detta projekt är en del av KTHs student satellit som kommer sändas ut i omloppsbana runt jorden bärandes på ett antal olika experiment, däribland dem finns ”SiC in space” projektet som beskrivs i denna uppsats. Målet med arbetet i denna rapport är att säkerställa att ”SiC in space” experimentet är redo för uppskjutning till rymden. Detta gjordes genom att testa vid olika temperaturer och genom att utveckla mjukvara för analysering av experimentdata samt genom små modifieringar av mjukvara skriven i tidigare arbeten. Baserat på de tester som har genomförts dras slutsatsen att kiselkarbidtransistorn har en acceptabel karaktäristik och att plattformen som kör experimentet klarar av temperaturer upp till 100◦C. Om satelliten överlever uppskjutning ut i rymden kommer med största sannolikhet experimentet att fungera som önskat och generera data som kan påvisa ifall kiselkarbid är lämpligt för applikationer i rymden.

Proposed are novel sensors for extreme environment power plants, laser beam analysis and biomedicine. A hybrid wireless-wired extreme environment temperature sensor using a thick single-crystal Silicon Carbide (SiC) chip embedded inside a sintered SiC probe design is investigated and experimentally demonstrated. The sensor probe employs the SiC chip as a Fabry-Perot (FP) interferometer to measure the change in refractive index and thickness of SiC with temperature. A novel temperature sensing method that combines wavelength-tuned signal processing for coarse measurements and classical FP etalon peak shift for fine measurements is proposed and demonstrated. This method gives direct unambiguous temperature measurements with a high temperature resolution over a wide temperature range. An alternative method using blackbody radiation from a SiC chip in a two-color pyrometer configuration for coarse temperature measurement and classical FP laser interferometry via the same chip for fine temperature measurement is also proposed and demonstrated. The sensor design is successfully deployed in an industrial test rig environment with gas temperatures exceeding 1200 C. This sensor is proposed as an alternate to all-electrical thermocouples that are susceptible to severe reliability and lifetime issues in such extreme environments. A few components non-contact thickness measurement system for optical quality semi-transparent samples such as Silicon (Si) and 6H SiC optical chips such as the one used in the design of this sensor is proposed and demonstrated. The proposed system is self-calibrating and ensures a true thickness measurement by taking into account material dispersion in the wavelength band of operation. For the first time, a 100% repeatable all-digital electronically-controlled pinhole laser beam profiling system using a Texas Instruments (TI) Digital Micro-mirror Device (DMD) commonly used in projectors is experimentally demonstrated using a unique liquid crystal image generation system with non-invasive qualities. Also proposed and demonstrated is the first motion-free electronically-controlled beam propagation analyzer system using a TI DMD and a variable focus liquid lens. The system can be used to find all the parameters of a laser beam including minimum waist size, minimum waist location and the beam propagation parameter M2. Given the all-digital nature of DMD-based profiling and all-analog motion-free nature of the Electronically Controlled Variable Focus Lens (ECVFL) beam focus control, the proposed analyzer versus prior-art promises better repeatability, speed and reliability. For the first time, Three Dimensional (3-D) imaging is demonstrated using an electronically controlled Liquid Crystal (LC) optical lens to accomplish a no-moving parts depth section scanning in a modified commercial 3-D confocal microscope. The proposed microscopy system within aberration limits has the potential to eliminate the sample or objective motion-caused mechanical forces that can distort the original sample structure and lead to imaging errors. A signal processing method for realizing high resolution three dimensional (3-D) optical imaging using diffraction limited low resolution optical signals is also proposed.

This thesis investigates the feasibility of using Silicon Carbide (SiC)-based multiphase inverters (MPIs) for transportation electrification applications. The research begins with a comprehensive review on the state-of-the-art of MPIs, focusing on voltage source inverters (VSIs) and nine-switch inverters (NSIs), with five-, six-, and nine-phase configurations. The quantitative and qualitative analyses demonstrate that the six-phase VSI is the most promising topology, offering reduced DC-capacitor requirements, lower cabling cost, and higher fault tolerance capability while maintaining the same efficiency and power device count of a three-phase VSI. The feasibility of the SiC-based six-phase inverter is further investigated at the vehicle level, where a vehicle model is developed to study the energy consumption under different drive cycles. The resulting indicate an 8% improvement in vehicle mileage and fuel economy of the SiC-based six-phase inverter compared to its Si-based counterpart. This thesis also examines the current and voltage stresses on the DC-bus capacitor in two-level six-phase VSIs. The study considers two configurations of load/winding spatial distribution: symmetric and asymmetric. Consequently, analytical formulas for the DC-bus capacitor current and voltage ripples are derived. Furthermore, simple capacitor sizing rules in six-phase VSIs with different load configurations are provided. The accuracy of the derived formulas is verified by simulation and experimental testing, and their boundary conditions are identified. Six-phase VSI supplying symmetric loads was found to yield the smallest capacitor size. Based on the foregoing technology review and analyses, a holistic design methodology for a 100 kW SiC-based six-phase traction inverter for an electric vehicle application is presented. The proposed methodology considers the device power level, where discrete SiC MOSFETs are utilized, and the DC-capacitor sizing, where a multi-objective optimization algorithm is proposed to find the most suitable capacitor bank. Mechanical and thermal design constraints are also explored to deliver a compact housing with an integrated coolant channel. The resultant inverter design from the proposed electrical-thermal-mechanical design methodology is prototyped and experimentally tested, demonstrating a 7% reduction in DC-capacitor volume and 21% reduction in cabling cost when compared to conventional three-phase inverters of the same volt-ampere rating. The peak power density of the prototype inverter is 70 kW/L, demonstrating a compact design. Besides, the proposed design is benchmarked against commercial six-phase inverter models, whereby the competitiveness of the proposed design is highlighted. Finally, the unique control aspects of six-phase electric motor drives are investigated to identify suitable controls strategies for various operating conditions. The study places special emphasis on high-speed operation and evaluates several overmodulation techniques. An adaptive flux-weakening control algorithm is also proposed for the six-phase motor drive, which significantly improves the DC-bus voltage utilization of the inverter when used in conjunction with overmodulation. Overall, this thesis provides a comprehensive study of SiC-based six-phase traction inverters and proposes a holistic design methodology that considers electrical, thermal, and mechanical aspects. The results demonstrate the feasibility and advantages of SiC-based six-phase traction inverters for electric vehicle applications. / Thesis / Doctor of Philosophy (PhD) / Electric cars are continuously challenged to meet regulatory mandates that become stricter by the day. This is driven by the need for a clean, reliable, affordable, and sustainable transportation system. In this research, a novel, more reliable, and cost-effective power control unit (PCU) is proposed. The PCU manages the power flow regulation between the battery and the motor(s). The proposed PCU employs the same number of devices as a traditional counterpart, yet in a more modular architecture that doubles the safety factor compared to the standard design. In fault scenarios where the traditional PCU would fail, the proposed PCU would continue operating at half power, allowing the driver and passengers to reach a safe destination before the car is repaired. Extensive analyses were undertaken to identify an optimal design in terms of performance, size, and cost. Then, an engineering prototype is constructed and tested on an electric drivetrain testbed. Finally, the prototype is benchmarked against commercial competitors in the market to establish its economical feasibility.

The third quadrant (3rd-quad) conduction (or reverse conduction) of power transistors is critical for synchronous power converters. For power metal-oxide-semiconductor field-effect-transistors (MOSFETs), there are two current paths in the 3rd-quad conduction, namely the MOS channel path and the body diode path. It is well known that, for 1.2 kV silicon carbide (SiC) planar MOSFETs, the conduction loss in the 3rd-quad is reduced by turning on the MOS channel with a positive gate bias (VGS) and keeping the dead time as small as possible. Under this scenario, the current is conducted through both paths, allowing the device to take advantage of the zero 3rd-quad forward voltage drop (VF3rd) of the MOS channel path and the small differential resistance of the body diode path. However, in this thesis work, this popular belief is found to be invalid for power MOSFETs with higher voltage ratings (e.g., 3.3 kV and 10 kV), particularly at high temperatures and current levels. The aforementioned MOS channel and body diode paths compete in the device’s 3rd-quad conduction, and their competition is affected by VGS and device structure. This thesis work presents a comparative study on the 3rd-quad behavior of 1.2 kV to 10 kV SiC planar MOSFET through a combination of device characterization, TCAD simulation and analytical modeling. It is revealed that, once the MOS channel turns on, it changes the potential distribution within the device, which further makes the body diode turn on at a source-to-drain voltage (VSD) much higher than the built-in potential of the pn junction. In 10 kV SiC MOSFETs, with the MOS channel on, the body diode does not turn on over the entire practical VSD range. As a result, the positive VGS leads to a completely unipolar conduction via the MOS channel, which could induce a higher VF3rd than the bipolar body diode at high temperatures. Circuit test is performed, which validates that a negative VGS control provides the smallest 3rd-quad voltage drop and conduction loss at high temperatures in 10 kV SiC planar MOSFET. The study is also extended to the trench MOSFET, another major structure of commercial SiC MOSFETs. Based on the revealed physics for planar MOSFETs, the optimal VGS control for the 3rd-quad conduction in different types of commercial trench MOSFETs is discussed, which provides insights for the design of high-voltage trench MOSFETs. These results provide key guidelines for the circuit applications of medium-voltage SiC power MOSFETs. / M.S. / Recent years, the prosperity of power electronics applications such as electric vehicle and smart grid has led to a rapid increase in the adoption of wide bandgap (WBG) power devices. Silicon Carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) is one of the most attractive candidates in WBG devices, owing to its good tradeoff between breakdown voltage and on resistance, capability of operation at high temperatures, and superior device robustness over other WBG power devices. In most power converters, power device is required to conduct current in its third quadrant (3rd-quad) (i.e., conduct reverse current) either for handling current during the dead time or acting as a commutation switch. In a SiC MOSFET, there are two current paths in the 3rd-quad conduction, namely the MOS channel path and the body diode path. It is widely accepted that by turning on the MOS channel with a positive gate-to-source bias (VGS), both paths are turned on in parallel such that the 3rd-quad conduction loss can be reduced. In this thesis work, it is shown that this long-held opinion does not hold for SiC MOSFETs with high voltage ratings (e.g., 3.3 kV and 10 kV). Through a combination of device characterization, TCAD simulation, and analytical modeling, this thesis work unveils the competing current sharing between the MOS channel and the body diode. Once the MOS channel turns on, it delays the turn-on of the body diode and suppresses the diode current. This effect is more pronounced in MOSFETs with higher voltage ratings. In 10 kV SiC MOSFETs, with the MOS channel on, the body diode does not turn on in the practical operation conditions. At high temperatures, as the bipolar diode path possesses the conductivity modulation, which can significantly lower the voltage drop and is absent in the MOS channel, it would be optimal to turn off the MOS channel. Circuit test is also performed to validate these device findings and evaluate their impact on device applications. Finally, the study is also extended to the commercial SiC trench MOSFET, the other mainstream type of SiC power MOSFETs. These results provide key guidelines for the circuit applications of medium-voltage SiC power MOSFETs.

GaN-based High Electron Mobility Transistors (HEMT) are appealing because of their large breakdown field, high saturation velocity, and superior thermal conductivity. They work at high temperature without much degradation. HEMTs have a few drawbacks despite many positives. The cost of developing GaN HEMTs on a native substrate is high. It would be cost effective to fabricate HEMTs on an alternative substrate without affecting their performance. The goal of this project is to characterise GaN HEMTs on various substrates like Si, SiC and Sapphire. This thesis focuses mainly on DC measurements for threshold voltage, leakage current, and breakdown voltage of these transistors. It is observed that HEMT devices grown on Si substrate provides maximum saturation current, however, the breakdown voltage is about 650 V. The breakdown voltage for HEMTs grown on SiC is superior showing about 1410 V with saturation drain current of 0.49 A/mm making it a good fit for power electronic applications. The threshold voltage for the devices on SiC substrate is -8.5 V. Additionally, different device architectures with different gate lengths, gate widths, and gate to drain distances are also evaluated and compared. It is noticed that the gate length of 1.5 μm and gate-drain length of 20 μm showed the best results for devices on all the substrates. / Hög elektronmobilitetstransistorer (HEMT) baserade på galliumnitrid (GaN) är mycket aktuella på grund av materialets höga genombrottsfält, hög mättnadshastighet för elektroner och bra termisk ledningsförmåga. Dessutom kan komponenter också användas vid höga temperaturer, men det finns även nackdelar. En nackdel är att kostnaden för GaN-substrat är mycket stor och man letar därför efter mer kostnadseffektiva substratmaterial. I detta projekt jämförs därför prestanda för HEMT-komponenter tillverkade på tre olika alternativa substrat som bedöms vara mer kostnadseffektiva än GaN, kisel (Si), kiselkarbid (SiC) och safir (Al2O3). Projektet fokuseras på DC mätningar av tröskelspänning, läckströmmar och genombrottsspänning för att utröna om komponenternas elektriska prestanda påverkas av dessa substratmaterial. Resultaten visar att HEMT-komponenter på Si-substrat uppvisar något högre mättnadsström, men genombrottsspänningar på bara ca 650 V. Genombrottsspänningar på HEMT-komponenter tillverkade på SiC-substrat ligger däremot på över 1400 V och har mättnadströmmar på omkring 0.50A/mm, vilket gör dom klart bättre än komponenter på Si och safir. Tröskelspänningen för HEMT-komponenter på SiC uppmäts till -8.5 V. Ytterligare mätningar gjordes också av komponenter med olika gemoetrier, som grindbredd och längd, samt olika avstånd mellan grind och utlopp (drain), och det kan konstateras att en grindlängd på 1.5 μm och ett avstånd mellan grind och utlopp på 20 μm uppvisar de bästa resultaten oberoende av substratmaterial.

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