This thesis is focused on a specific virtual laboratory support, which is designed and created as a device capable of data transferring to display and/or computational unit via serial port. Both the device and common PC are generally a corner stone of each virtual laboratory, which can be also accessed via internet. Technique, significant factors with impact of analog disturbances on digital communication and realization of standalone virtual laboratory are described in detail.

The thesis aim is in practical realization of wireless interface, which is created by infrared relay in motorcycle Simson. Infrared relay is used for speed measuring. This work describes the realization of digital controlling by microcontrollers. Digital controlling can easily improve and upgrade functions for better driving comfort. It’s possible by getting information about condition of selected motorcycle parts. This information can be engine temperature, battery charge, total distance and etc.

This thesis is part of a project at Bombardier’s Object Controller System. This system acts as a communication interface for several sub-systems that control the railway traffic. Therefore, part of the safety and availability of railway transportation is dependent on the performance and reliability of this system especially the digital communication system that handles the board-to-board communication. Thus, Bombardier has implemented new high-speed LVDS channels to use instead of the implemented RS-485 channels to improve the board-to-board communication performance in the Object Controller System but they lack a transceiver. This thesis work explores possible transceiver solutions that achieve Bombardier requirements. Reusability is very important for Bombardier for safety compliance and certification. Therefore, the investigation was carried out by looking into what is currently implemented and then was carried on by looking into transceivers that used in highspeed communication and check their suitability and compliance for the FPGA and the requirements. This exploration results in three experiments for different transceiver architecture. The first experiment exploits the currently implemented transceiver architecture and it is not suitable for high-speed data rate due to a limitation in the buffer. The second experiment overcomes the buffer limitation by using a clock domain crossing buffer and results in a 100-time faster system. The third experiment aimed to achieve a higher data rate by using a clock and data recovery transceiver and results in a promising solution but needs some enhancements. For testing, a verification methodology following the one-way stress test architecture has been developed using VHDL for simulation and for in-chip testing and the results were verified using ChipScope logic analyzer from Xilinx. In addition, a thermal test for the solution from the second experiment has been performed. / Denna avhandling är en del av ett projekt på Bombardiers Object Controller System. Detta system fungerar som ett kommunikationsgränssnitt för flera delsystem som styr järnvägstrafiken. Därför är en del av säkerheten och tillgängligheten av järnvägstransporten beroende av systemets prestanda och tillförlitlighet, särskilt det digitala kommunikationssystemet som hanterar kommunikationen ombord. Bombardier har sålunda implementerat nya höghastighets LVDS-kanaler för att använda istället för de implementerade RS-485-kanalerna för att förbättra kommunikationsprestandan ombord i objektkontrollen, men de saknar en transceiver. Denna avhandling arbetar med att undersöka möjliga transceiverlösningar som uppnår Bombardier-krav. Återanvändbarhet är mycket viktigt för Bombardier för säkerhetsöverensstämmelse och certifiering. Undersökningen genomfördes därför genom att undersöka vad som för närvarande implementeras och sedan genomföras genom att titta på transceivers som används i höghastighetskommunikation och kontrollera deras lämplighet och överensstämmelse för FPGA och kraven. Denna undersökning resulterar i tre experiment för olika transceiverarkitektur. Det första experimentet utnyttjar den nuvarande implementerade transceiverarkitekturen. Den är inte lämplig för höghastighetsdatakommunikation på grund av en begränsning i bufferten. Det andra experimentet övervinns buffertbegränsningen genom att använda en klockdomänöverföringsbuffert vilket resulterar i ett 100-timmars snabbare system. Det tredje experimentet syftade till att uppnå en högre datahastighet genom att använda en klockoch dataåterställningstransceiver vilket resulterar i en lovande lösning men behöver vissa förbättringar. För testning har en verifieringsmetod som följer envägsstresstestarkitekturen utvecklats med hjälp av VHDL för simulering och för inchip-testning. Resultaten verifierades med hjälp av ChipScope logic analyzer från Xilinx. Dessutom har ett termiskt test för lösningen från det andra experimentet utförts.

No description available.

The main aim of this project was to find a practical and accurate method to determine the parameters of a transmission line by using current and voltage measurements. The term line parameters refer to the inherent series resistance and inductance that is found on transmission lines. The line parameters were determined by using the voltage and current measurements from either side of the transmission line. An accurate reference signal is needed to precisely compare the measured signals. The timing signals from GPS units were used to reference the measurements. In a field implementation data transfer of the measured signals would be a necessity which can be accomplished by GPRS modems. Three methods are proposed for determining line parameters. These methods were thoroughly tested in the following ways: 1. A model was built in SIMULINK with known elements and values. The three methods were then applied to the model and simulations were run. The results from the simulations are compared to the known values. 2. A system was built in the laboratory with known parameters. The results gathered from testing the system on all three methods are compared to known values. 3. Finally, the methods were applied to field data from recorders of a utility. This was done to see how well the methods would perform on a real system. Accuracy was determined from what the utility accepts as the correct values. Another focus of the project was to determine the surge impedance loading (SIL) curve from measured data. This curve can be used to determine the loadability limit of the transmission line as well as to visually show at what point the line is operating at any given time. The curve is also useful as it provides insight into the additional reactive power needed for a certain active power transfer. The concept of drawing a SIL curve from actual measurements was first tested by means of simulation. The drawing of the proposed curve is also tested on actual measurements from a transmission line. This investigation posed many challenges. These challenges are discussed in detail in the dissertation. Some of these challenges have easily implementable solutions while others still leave room for further research. The results and findings are published in this document. / Dissertation (MEng (Electrical))--University of Pretoria, 2008. / Electrical, Electronic and Computer Engineering / MEng / unrestricted

Aim of this thesis is design and realization of serial communication monitor. The thesis describes creation of hardware device responsible for collecting data from analyzed communications and for distribution of these data by USB bus. Thesis also explains connection between serial monitor and software Wireshark by extcap interface. Visualization of data in readable format is done by decoding script, which is tested by selected protocol. The last part of the study is focused on evaluation of data permeability of hardware device according to data line fullness.

No description available.

Emerging "bandwidth hungry" applications such as high definition video distribution and ultra fast multimedia side-loading have extended the need for multi-gigabit wireless solutions beyond the reach of conventional WLAN technology or even more recently emerging UWB and MIMO systems. The availability of 7GHz of unlicensed bandwidth in the 60GHz spectrum, represents a unique opportunity to address such data-throughput requirements. The 60GHz Integrated CMOS digital radio chipset comprises of PHY and MAC layers, RF transceiver, High-Speed Digital Interface and an underlying Serial Communication Fabric. To have a complete communication solution compliant with the latest ECMA-369, ISO/DIS 13156 and IEEE 802.15.3c standards, we build a million gate digital implementation of MAC and PHY. The Serial Peripheral Interface (SPI) serves as the bridge between the higher layers in the communication stack (PAL-MAC) and the lower layers like PHY-RF Front End. The MAC module can setup the communication link on the fly by tuning parameters such as operating channel, channel bonding and bandwidth, data rates, error correction mechanisms, handshaking mechanisms, etc, by using the SPI to communicate with internal components. The SPI interface plays a crucial rule in not only this, but also during the testing and debug phase. Operation of each of the RF modules is monitored through the serial interface using local SPI slaves which are hooked up to the 4-wire serial bus running all through the chip. The SPI host controller emulates an embedded protocol analyzer. For calibration and fine tuning purposes, digital settings can also be loaded onto these modules through the SPI interface. R-2R DACs are used to convert these commands into analog voltages which then provide a tunable bias to the RF and mixed-signal modules. Other key functions of this serial communication and control interface are: Initialization of all of the RF and mixed signal modules, DC calibration of data converter, PLL and other mixed-signal modules, data acquisition, parametric tuning for digital modules such as linear equalizer, Gain Control loops (AGC, VGA), etc. Ultra high speed digital Input-Output buffers are used to provide an external data interface to the radio chipset. These high speed I/Os are also used in the gbps (gigabit-per-second) link for data transfer between the RF transceiver chip and the PHY-MAC baseband chip. The IOs are expected to comply with different signaling standards such as LVDS, SLVS200, SLVS400, etc. A robust system involves a meticulous pad ring design with proper power domains and power cuts. Full-chip integration of the digital PHY, MAC, peripheral logic and IO ring is done in a semi-custom fashion.

Detta examensarbete vänder sig till personer som är intresserade att använda nya miljövänligametoderna för elproduktion eller personer som redan använder små vindkraftverk ochsolpaneler med behovet av en extra energikälla i små stugor eller avlägsna platser där tillgångentill elnät är omöjligt. Syften i detta arbete är först och främst att bygga ett system förelproduktion med hjälp av en cykel. Sedan bestämma mängden av elektrisk energi en personkan alstra med systemet. Slutligen svara om detta system skulle kunna använda som ettstödsystem för elproduktion i småskalighet. Den första målsättningen är att utforma ett system med användning av kraftelektronik där denkraften som genereras matar lasterna. Den mekaniska delen kommer att konstrueras som en delav energikällan, därefter kommer det att utformas en kontroll för att styra effekten viaelektroniska komponenter, de elektriska belastningarna matas av systemet, kommer attsimuleras. För att veta den alstrade effekten till styrkrets kommer det att installeras en mätareoch en seriekommunikationsenhet för kommunikation med en dator. Det utfördes en forskning av andra system och produkter i svenska marknaden, för att svara omdetta system kan vara en reserv system för elproduktion i småskalighet. Uppförandet av ett pedalkraftssystem uppnås med användning av en tolv volt likströmsmotormed permanent magnet som energikälla. System har förmåga att visa i en LCD-skärm och sändagenom serieportarna, värde av den alstrade effekten. System kan vägleda denna effekt tillbelastningarna med hjälp av en mikrokontroll. Effekt som genereras i systemet visades att detär signifikant för att beaktas som en ytterligare energikälla, fristående eller integrerad till andra system. / This thesis is aimed at people who are interested in using the new environmentally friendlymethods of electricity generation or people who already use small wind turbines and solarpanels with the need for an additional energy source in small cabins or remote locations whereaccess to electricity networks is impossible. Aims of this work is first to build a system forgenerating electricity using a bicycle. Second is determining the amount of electrical energy aperson can generate with the system. Finally answer if this system could be used as a supportsystem for electricity generation in small scale. The first objective is to design a system using power control where the power generatedsupplied the loads. The mechanical part will be constructed as part of the energy source, thenwill be designed a control for controlling the power via electronic components, electrical loadssupplied by the system, will be simulated. To know the generated power to the control circuitwill install a meter and a serial communication device for communicating with a computer. It carries out a research on other systems and products in the Swedish market, to answer whetherthis system can be a backup system for electricity generation in small scale. The construction of a pedaling power system is achieved using a twelve volt direct currentmotor with permanent magnet as an energy source. System has the ability to show in an LCDdisplay and transmit through the serial ports, the value of the generated power. System canguide the power to the loads by using a microcontroller. Power generated by the system showedthat it is significant to be considered as an additional energy source, stand-alone or integratedwith other systems.

Orientador: Jozué Vieira Filho / Banca: Carlos Antonio Alves / Banca: Tony Inácio da Silva / Resumo: A automação de esteiras rolantes é algo comum e importante em sistemas industriais, mas problemas práticos ainda representam desafios. Um dos desses desafios é manter a precisão em sistemas que exigem paradas sistemáticas, pois folgas mecânicas tendem a provocar variações nas posições de paradas ao longo do tempo. A aplicação de motores de indução têm se tornado comum e soluções eficientes e de baixo custo têm sido pesquisadas. Neste trabalho foi desenvolvido e implementado um sistema de controle de posição e velocidade aplicado em esteiras transportadoras utilizando inversor de frequência, microcontrolador, encoder óptico incremental e sensor indutivo. O movimento da esteira transportadora é efetuado por um motor de indução trifásico, que é acionado pelo conjunto microcontrolador - inversor de frequência. Este conjunto impõe uma frequência no estator do motor através de uma troca de mensagens entre microcontrolador e inversor de frequência (Sistema Mestre-Escravo). Para o envio e recebimento das mensagens, utilizou-se o protocolo de comunicação serial USS® (Universal Serial Interface Protocol) através do padrão RS-485. Os controles de posição e velocidade de rotação do eixo do motor fundamentam-se no sinal gerado pelo encoder óptico incremental, responsável por informar a posição do eixo do motor ao longo da trajetória, e no sensor indutivo que determina uma referência externa importante para a esteira transportadora. Para o funcionamento automático da esteira, elaborou-se um software em linguagem de programação C. Como resultado obteve-se um sistema de controle de posição e velocidade do eixo do motor de indução trifásico que apresenta bons resultados / Abstract: Automated conveyors system have been largely used in industrial applications. However, there are still practical issues to be overcome. One of them is due to the system mechanical limitation which can lead to low accuracy for applications based on "stop-and-go" movements. Induction motors have been largely used in such applications and low costs solutions have been searched. In this work it was developed and implemented a system of positioning and velocity control applied to conveyors which is based on frequency inverter, microcontroller, optical incremental encoder and inductive sensor. The conveyor's movement is made by means of a three-phase induction motor, which is driven by the couple microcontroller-frequency inverter. There are messages exchange between the microcontroller and the frequency inverter (Master - Slave configuration) which is based on the communication serial protocol USS through the RS-485 standard. The position and velocity of the motor spindle are controlled using an optical incremental encoder, which is responsible to provide the position of the trajectory, and an inductive sensor which determines the initial reference to the conveyor. The software used to control the system was developed in C language. The results show a low cost system with good results / Mestre