A fotônica em silício é um campo de pesquisas emergente com grande potencial para contribuir com a resolução de alguns dos problemas tecnológicos da atualidade. O gargalo imposto por interconexões metálicas na expansão da taxa de transmissão de dados em sistemas de comunicação como os de computadores de alto desempenho talvez seja um dos maiores desafios a serem superados. A propagação de luz em baixas velocidades de grupo e com controle de dispersão é uma das linhas de pesquisa atuais nas quais se busca explorar de forma mais eficiente as propriedades ópticas do silício, e assim, aumentar a compatibilidade entre componentes fotônicos e a tecnologia CMOS (Complementary Metal- Oxide-Semiconductor) por meio da diminuição das dimensões e do consumo de energia de componentes ópticos ativos. Dessa forma, espera-se diminuir os custos de fabricação e viabilizar a produção em larga escala de dispositivos integrados optoeletrônicos, que poderiam ser utilizados em sistemas de comunicação de curtas distâncias e assim ampliar a largura de banda disponível. Investigações recentes têm demonstrado que a fabricação de dispositivos baseados em cristais fotônicos planares possui grande potencial para controlar simultaneamente a velocidade de grupo e a dispersão, além de permitir a redução do tamanho de elementos como curvas, divisores de potência e cavidades ressonantes devido ao efeito do confinamento dos campos através do bandgap fotônico. Dessa forma, esse trabalho aborda um estudo sobre a integração monolítica entre guias de onda, curvas de 60º e junções em Y que operam em baixas velocidades de grupo e com reduzida dispersão, construídos em cristais fotônicos planares formados por uma matriz periódica de furos em uma membrana de silício suspensa em ar. Essa investigação englobou atividades bastante intensivas, tanto de simulações por métodos numéricos, como de processos de fabricação dedicados à nanofotônica, assim como de caracterizações ópticas. Ao longo das discussões são identificados e analisados os mecanismos que afetaram de forma mais crítica a eficiência dos dispositivos propostos. Também foram avaliados os maiores problemas enfrentados nos processos de fabricação, e suas possíveis soluções foram apontadas. Os resultados demonstraram a possibilidade teórica de realizar tal integração de forma eficiente. O melhor entendimento sobre a relação entre a dispersão e os parâmetros geométricos dos guias de onda permitiram modelar curvas e divisores de potência que exibiram, respectivamente, larguras de banda em torno de 56 e 40 nm, cobrindo regiões do espectro com elevados índices de grupo. Foi possível fabricar cristais fotônicos com uma qualidade próxima das já reportadas na literatura sobre o tema e assim foram estabelecidas bases bastante sólidas para a fabricação de tais dispositivos localmente, sem a necessidade expressa de acessar centros de fabricação no exterior. / Silicon photonics is an emerging research field that has great potential to contribute to solving some of the technological problems nowadays. Maybe, one of the greatest challenges to be overcome is the bottleneck imposed by electrical interconnections in the expansion of the bandwidth of communication systems such as those of high performance computers. Slow light propagation in dispersionless media is a hot topic in the current research fields that seek to more efficiently explore the silicon optical properties, and thus, increase the compatibility between photonic components and CMOS technology by decreasing the footprint and power consumption of active optical components. This way, the manufacturing costs it is expected to be reduced by making the large-scale production of integrated optoelectronic devices feasible, and so, they could be used in short distance communication systems to expand the available bandwidth. Recent researches has also shown that photonic crystal slab waveguides are very promising to simultaneously control group velocity and devices dispersion, as well as in the reduction of the size of elements such as bends, power splitters and nanocavities due to the fields confinement through the photonic bandgap effect. Thus, this work addresses a study of the monolithic integration of slow light and dispersionless waveguides, 60º bends, and Y-junctions fabricated in air-bridge photonic crystal slabs formed by the drilling of a periodic array of air holes in a silicon membrane. The research was accomplished with intensive activities in numerical simulations, as well as in nanophotonic manufacturing processes, and optical characterizations. Throughout the discussions were identified and analyzed the mechanisms that more critically affected the devices efficiency. The major problems faced in the manufacturing processes were also evaluated, and their possible solutions were pointed out. The results demonstrated a theoretical possibility of performing such integration more efficiently. Having a better understandment about the relation between the photonic crystal waveguides geometrical parameters and their dispersion allowed the modeling of bends and power splitters which exhibited 3 dB bandwidths that covered, respectively, ranges around 56 and 40 nm, along spectral regions with very high group indices. It was possible to fabricate photonic crystals with a quality close to those already reported in the literature on this subject and thus, very solid bases were established for the manufacture of such devices locally, without the necessity of accessing manufacturing centers abroad.

The field of Information and Communication Technologies is witnessing a development speed unprecedented in history. Moore’s law proves that the processor speed and memory size are roughly doubling each 18 months, which is expected to continue in the next decade. If photonics is going to play a substantial role in the ICT market, it will have to follow the same dynamics. There are mainly two groups of components that need to be integrated. The active components, including light sources, electro-optic modulators, and detectors, are mostly fabricated in III-V semiconductors. The passive components, such as waveguides, resonators, couplers and splitters, need no power supply and can be realized in silicon-related semiconductors. The prospects of silicon photonics are particularly promising, the fabrication is mostly compatible with standard CMOS technology and the on-chip optical interconnects are expected to increase the speed of microprocessors to the next generation. This thesis starts with designs of various silicon-based devices using finite-difference time-domain simulations. Parallel computation is a powerful tool in the modeling of large-scale photonic circuits. High Q cavities and resonant channel drop filters are designed in photonic crystal platform. Different methods to couple light from a single mode fiber to silicon waveguides are studied by coupled-mode theory and verified using parallel simulations. The performance of waveguide grating coupler for vertical radiation is also studied. The fabrication of silicon-based photonic devices involves material deposition, E-beam or optical lithography for pattern defining, and plasma/wet-chemistry etching for pattern transfer. For nanometer-scaled structures, E-beam lithography is the most critical process. Depending on the structures of the devices, both positive resist (ZEP520A) and negative resist (maN2405) are used. The proximity and stitch issues are addressed by careful dose correction and patches exposure. Some examples are given including photonic crystal surface mode filter, micro-ring resonators and gold grating couplers. In particular, high Q (2.6×105), deep notch (40 dB) and resonance-splitting phenomenon are demonstrated for silicon ring resonators. It is challenging to couple light into photonic integrated circuits directly from a single-mode fiber. The butt-coupled light-injecting method usually causes large insertion loss due to small overlap of the mode profiles and large index mismatch. Practically it is not easy to cleave silicon sample with smooth facet where the waveguide exposes. By adding gold gratings to the waveguides, light can be injected and collected vertically from single-mode fiber. The coupling efficiency is much higher. There is no need to cleave the sample. The access waveguides are much shortened and the stitch problem in E-beam lithography is avoided. In summary, this thesis introduces parallel simulations for the design of modern large-scale photonic devices, addresses various issues with Si-based fabrication, and analyses the data from the characterization. Several novel devices using silicon nanowire waveguides and 2D photonic crystal structures have been demonstrated for the first time. / QC 20100923

Silicon-on-insulator (SOI) technology has become increasingly attractive because of the strong light confinement, which significantly reduces the footprint of the photonic components, and the possibility of monolithically integrating advanced photonic waveguide circuits with complex electronic circuits, which may reduce the cost of photonic integrated circuits by mass production. This thesis is dedicated to numerical simulation and experimental performance measurement of passive SOI waveguide devices. The thesis consists of two main parts. In the first part, SOI curved waveguide and corner turning mirror are studied. Propagation losses of the SOI waveguide devices are accurately measured using a Fabry-Perot interference method. Our measurements verify that the SOI corner turning mirror structures can not only significantly reduce the footprint size, but also reduce the access loss by replacing the curved sections in any SOI planar lightwave circuit systems. In the second part, an optical 90o hybrid based on 4 × 4 multimode interference (MMI) coupler is studied. Its quadrature phase behavior is verified by both numerical simulations and experimental measurements.

This thesis describes the fabrication and testing of electroluminescent diodes made from silicon subjected to plasma ion implantation. A silicon-compatible, electrically driven light source is desired to increase the speed and efficiency of short-range data transfer in the communications and computing industries. As it is an indirect band gap material, ordinary silicon is too inefficient a light source to be useful for these applications. Past experiments have demonstrated that modifying the structural properties of the crystal can enhance its luminescence properties, and that light ion implantation is capable of achieving this effect. This research investigates the relationship between the ion implantation processing parameters, the post-implantation annealing temperature, and the observable electroluminescence from the resulting silicon diodes.<p> Prior to the creation of electroluminescent devices, much work was done to improve the efficiency and reliability of the fabrication procedure. A numerical algorithm was devised to analyze Langmuir probe data in order to improve estimates of implanted ion fluence. A new sweeping power supply to drive current to the probe was designed, built, and tested. A custom software package was developed to improve the speed and reliability of plasma ion implantation experiments, and another piece of software was made to facilitate the viewing and analysis of spectra measured from the finished silicon LEDs.<p> Several dozen silicon diodes were produced from wafers implanted with hydrogen, helium, and deuterium, using a variety of implanted ion doses and post-implantation annealing conditions. One additional device was fabricated out of unimplanted, unannealed silicon. Most devices, including the unimplanted device, were electroluminescent at visible wavelengths to some degree. The intensity and spectrum of light emission from each device were measured. The results suggest that the observed luminescence originated from the native oxide layer on the surface of the ion-implanted silicon, but that the intensity of luminescence could be enhanced with a carefully chosen ion implantation and annealing procedure.</p>

This thesis describes the fabrication and testing of electroluminescent diodes made from silicon subjected to plasma ion implantation. A silicon-compatible, electrically driven light source is desired to increase the speed and efficiency of short-range data transfer in the communications and computing industries. As it is an indirect band gap material, ordinary silicon is too inefficient a light source to be useful for these applications. Past experiments have demonstrated that modifying the structural properties of the crystal can enhance its luminescence properties, and that light ion implantation is capable of achieving this effect. This research investigates the relationship between the ion implantation processing parameters, the post-implantation annealing temperature, and the observable electroluminescence from the resulting silicon diodes.<p> Prior to the creation of electroluminescent devices, much work was done to improve the efficiency and reliability of the fabrication procedure. A numerical algorithm was devised to analyze Langmuir probe data in order to improve estimates of implanted ion fluence. A new sweeping power supply to drive current to the probe was designed, built, and tested. A custom software package was developed to improve the speed and reliability of plasma ion implantation experiments, and another piece of software was made to facilitate the viewing and analysis of spectra measured from the finished silicon LEDs.<p> Several dozen silicon diodes were produced from wafers implanted with hydrogen, helium, and deuterium, using a variety of implanted ion doses and post-implantation annealing conditions. One additional device was fabricated out of unimplanted, unannealed silicon. Most devices, including the unimplanted device, were electroluminescent at visible wavelengths to some degree. The intensity and spectrum of light emission from each device were measured. The results suggest that the observed luminescence originated from the native oxide layer on the surface of the ion-implanted silicon, but that the intensity of luminescence could be enhanced with a carefully chosen ion implantation and annealing procedure.</p>

Silicon based on-chip optical phased arrays are an enabling technology to achieving agile and compact large angle beam steering. In this work, a single layer array is presented, and approaches to multilayer 3D photonic integration for achieving a 2D array are also discussed. Finally, two dimensional optical beam steering is achieved using both thermo-optic and wavelength tuning. Various structures are considered as an alternative to the conventionally used shallow etched surface gratings to achieve narrow beam widths in the far field along with low switching power. The corrugated waveguide interspersed with 2D photonic crystal for crosstalk suppression is presented as a novel structure for coupling to free space that can provide lithographically defined index contrast in a single fabrication step, along with the smallest beam widths presented to date, at 0.25°. In addition, a polysilicon overlay with an oxide etch stop layer on top of a silicon waveguide is also presented as a grating coupler that achieves narrow far field beam widths. With this structure, two dimensional steering of 20° X 15° is demonstrated with a 16 element optical phased array, with a beam width of 1.2° X 0.4° and maximum power consumption of 20mW per channel. / text

Optical trapping enables the non-contact manipulation of micro and nanoparticles with extremely high precision. Recent research on integrated optical trapping using the evanescent fields of photonic devices has opened up new opportunities for the manipulation of nano- and microparticles in lab-on-a-chip devices. Considerable interest has emerged for the use of optical microcavities as “sensors-on-a-chip”, due to the possibility for the label-free detection of nanoparticles and molecules with high sensitivity. This dissertation focuses on the demonstration of an on-chip optical manipulation system with multiple functionalities, including trapping, buffering, sorting, and sensing. We demonstrate the optically trapping of polystyrene particles with diameters from 110 nm to 5.6 \(\mu m\) using silicon microrings and photonic crystal cavities. By integrating multiple microrings with different resonant wavelengths, we show that tuning the laser wavelength to the resonance wavelengths of different rings enables trapped particles to be transferred back and forth between the rings in a controllable manner. We term this functionality “buffering”. We furthermore demonstrate an integrated microparticle passive sorting system based on the near-field optical forces exerted by a 3-dB optical power splitter that consists of a slot waveguide and a conventional channel waveguide. In related work, we demonstrate an ultra-compact polarization splitter design leveraging the giant birefringence of silicon-on-insulator slot waveguides to achieve a high extinction ratio over the entire C band. We demonstrate trapping-assisted particle sensing, using the shift in the microcavity resonance induced by the trapped particle. We show that this permits the sensing of proteins via a binding assay approach, in which the presence of green fluorescent protein causes the particles to bind. By detecting the size distribution of particles clusters using the microcavity, we quantitatively detect the GFP concentration. In a complementary approach, we demonstrate a reusable and reconfigurable surface-enhanced Raman scattering (SERS) sensing platform. We use a photonic crystal cavity to trap silver nanoparticles in a controllable manner, and measure SERS from molecules on their surfaces. We anticipate that the on-chip sensing approaches we introduce could lead to various applications in nanotechnology and the environmental and life sciences. / Engineering and Applied Sciences

Integrated optics as a platform for signal processing offers significant benefits such as large bandwidth, low loss, and a potentially high degree of reconfigurability. Silicon (Si) has unique advantages as a material platform for integration, as well as properties such as a strong thermo-optic mechanism that allows for the realization of highly reconfigurable photonic systems. Chapter 1 is devoted to the discussion of these advantages, and Chapter 2 provides the theoretical background for the analysis of integrated Si-photonic devices. The thermo-optic property of Si, while proving extremely useful in facilitating reconfiguration, can turn into a nuisance when there is a need for thermally stable devices on the photonic chip. Chapter 3 presents a technique for resolving this issue without relying on a dynamic temperature stabilization process. Temperature-insensitive (or “athermal”) Si microdisk resonators with low optical loss are realized by using a polymer overlayer whose thermo-optic property is opposite to that of Si, and TiO2 is introduced as an alternative to polymer to deal with potential CMOS-compatibility issues. Chapter 4 demonstrates an ultra-compact, low-loss, fully reconfigurable, and high-finesse integrated photonic filter implemented on a Si chip, which can be used for RF-photonic as well as purely optical signal processing purposes. A novel, thermally reconfigurable reflection suppressor is presented in Chapter 5 for on-chip feedback elimination which can be critical for mitigating spurious interferences and protecting lasers from disturbance. Chapter 6 demonstrates a novel device for on-chip control of optical fiber polarization. Chapter 7 deals with select issues in the implementation of Si integrated photonic circuits. Chapter 8 concludes the dissertation.

A fotônica em silício é um campo de pesquisas emergente com grande potencial para contribuir com a resolução de alguns dos problemas tecnológicos da atualidade. O gargalo imposto por interconexões metálicas na expansão da taxa de transmissão de dados em sistemas de comunicação como os de computadores de alto desempenho talvez seja um dos maiores desafios a serem superados. A propagação de luz em baixas velocidades de grupo e com controle de dispersão é uma das linhas de pesquisa atuais nas quais se busca explorar de forma mais eficiente as propriedades ópticas do silício, e assim, aumentar a compatibilidade entre componentes fotônicos e a tecnologia CMOS (Complementary Metal- Oxide-Semiconductor) por meio da diminuição das dimensões e do consumo de energia de componentes ópticos ativos. Dessa forma, espera-se diminuir os custos de fabricação e viabilizar a produção em larga escala de dispositivos integrados optoeletrônicos, que poderiam ser utilizados em sistemas de comunicação de curtas distâncias e assim ampliar a largura de banda disponível. Investigações recentes têm demonstrado que a fabricação de dispositivos baseados em cristais fotônicos planares possui grande potencial para controlar simultaneamente a velocidade de grupo e a dispersão, além de permitir a redução do tamanho de elementos como curvas, divisores de potência e cavidades ressonantes devido ao efeito do confinamento dos campos através do bandgap fotônico. Dessa forma, esse trabalho aborda um estudo sobre a integração monolítica entre guias de onda, curvas de 60º e junções em Y que operam em baixas velocidades de grupo e com reduzida dispersão, construídos em cristais fotônicos planares formados por uma matriz periódica de furos em uma membrana de silício suspensa em ar. Essa investigação englobou atividades bastante intensivas, tanto de simulações por métodos numéricos, como de processos de fabricação dedicados à nanofotônica, assim como de caracterizações ópticas. Ao longo das discussões são identificados e analisados os mecanismos que afetaram de forma mais crítica a eficiência dos dispositivos propostos. Também foram avaliados os maiores problemas enfrentados nos processos de fabricação, e suas possíveis soluções foram apontadas. Os resultados demonstraram a possibilidade teórica de realizar tal integração de forma eficiente. O melhor entendimento sobre a relação entre a dispersão e os parâmetros geométricos dos guias de onda permitiram modelar curvas e divisores de potência que exibiram, respectivamente, larguras de banda em torno de 56 e 40 nm, cobrindo regiões do espectro com elevados índices de grupo. Foi possível fabricar cristais fotônicos com uma qualidade próxima das já reportadas na literatura sobre o tema e assim foram estabelecidas bases bastante sólidas para a fabricação de tais dispositivos localmente, sem a necessidade expressa de acessar centros de fabricação no exterior. / Silicon photonics is an emerging research field that has great potential to contribute to solving some of the technological problems nowadays. Maybe, one of the greatest challenges to be overcome is the bottleneck imposed by electrical interconnections in the expansion of the bandwidth of communication systems such as those of high performance computers. Slow light propagation in dispersionless media is a hot topic in the current research fields that seek to more efficiently explore the silicon optical properties, and thus, increase the compatibility between photonic components and CMOS technology by decreasing the footprint and power consumption of active optical components. This way, the manufacturing costs it is expected to be reduced by making the large-scale production of integrated optoelectronic devices feasible, and so, they could be used in short distance communication systems to expand the available bandwidth. Recent researches has also shown that photonic crystal slab waveguides are very promising to simultaneously control group velocity and devices dispersion, as well as in the reduction of the size of elements such as bends, power splitters and nanocavities due to the fields confinement through the photonic bandgap effect. Thus, this work addresses a study of the monolithic integration of slow light and dispersionless waveguides, 60º bends, and Y-junctions fabricated in air-bridge photonic crystal slabs formed by the drilling of a periodic array of air holes in a silicon membrane. The research was accomplished with intensive activities in numerical simulations, as well as in nanophotonic manufacturing processes, and optical characterizations. Throughout the discussions were identified and analyzed the mechanisms that more critically affected the devices efficiency. The major problems faced in the manufacturing processes were also evaluated, and their possible solutions were pointed out. The results demonstrated a theoretical possibility of performing such integration more efficiently. Having a better understandment about the relation between the photonic crystal waveguides geometrical parameters and their dispersion allowed the modeling of bends and power splitters which exhibited 3 dB bandwidths that covered, respectively, ranges around 56 and 40 nm, along spectral regions with very high group indices. It was possible to fabricate photonic crystals with a quality close to those already reported in the literature on this subject and thus, very solid bases were established for the manufacture of such devices locally, without the necessity of accessing manufacturing centers abroad.

Les progrès dans la fabrication des systèmes de calcul reconfigurables de type « Field Programmable Gate Arrays » (FPGA) s’appuient sur la technologie CMOS, ce qui engendre une consommation des puces élevée. Des nouveaux paradigmes de calcul sont désormais nécessaires pour remplacer les architectures de calcul traditionnel ayant une faible performance et une haute consommation énergétique. En particulier, optique intégré pourrait offrir des solutions intéressantes. Beaucoup de travail sont déjà adressées à l’utilisation d’interconnexion optique pour relaxer les contraintes intrinsèques d’interconnexion électronique. Dans ce contexte, nous proposons une nouvelle architecture de calcul reconfigurable optique, la « optical lookup table » (OLUT), qui est une implémentation optique de la lookup table (LUT). Elle améliore significativement la latence et la consommation énergétique par rapport aux architectures de calcul d’optique actuelles tel que RDL (« reconfigurable directed logic »), en utilisant le spectre de la lumière au travers de la technologie WDM. Nous proposons une méthodologie de conception multi-niveaux permettant l'explorer l’espace de conception et ainsi de réduire la consommation énergétique tout en garantissant une fiabilité élevée des calculs (BER~10-18). Les résultats indiquent que l’OLUT permet une consommation inférieure à 100fJ/opération logique, ce qui répondait en partie aux besoins d’un FPGA tout-optique à l’avenir. / Advances in the design of high performance silicon chips for reconfigurable computing, i.e. Field Programmable Gate Arrays (FPGAs), rely on CMOS technology and are essentially limited by energy dissipation. New design paradigms are mandatory to replace traditional, slow and power consuming, electronic computing architectures. Integrated optics, in particular, could offer attractive solutions. Many related works already addressed the use of optical on-chip interconnects to help overcome the technology limitations of electrical interconnects. Integrated silicon photonics also has the potential for realizing high performance computing architectures. In this context, we present an energy-efficient on-chip reconfigurable photonic logic architecture, the so-called OLUT, which is an optical core implementation of a lookup table. It offers significant improvement in latency and power consumption with respect to optical directed logic architectures, through allowing the use of wavelength division multiplexing (WDM) for computation parallelism. We proposed a multi-level modeling approach based on the design space exploration that elucidates the optical device characteristics needed to produce a computing architecture with high computation reliability (BER~10-18) and low energy dissipation. Analytical results demonstrate the potential of the resulting OLUT implementation to reach <100 fJ/bit per logic operation, which may meet future demands for on-chip optical FPGAs.