Neste trabalho estudamos problemas relacionados com a busca de pontos e segmentos em janelas retangulares com os lados paralelos aos eixos. É dado um conjunto de segmentos (ou pontos) no plano. Em uma primeira fase estes segmentos são organizados em estruturas de dados de tal forma a tornar buscas por aqueles que estão contidos em janelas retangulares mais eficiente. Na segunda fase são dadas as janelas de maneira online. Várias destas estruturas de dados são baseadas em árvores balanceadas, tais como, árvore limite, árvore de busca com prioridade, árvore de intervalos e árvore de segmentos. Na dissertação mostramos detalhadamente estas estruturas de dados e os algoritmos para resolver este problema para conjuntos de pontos (versão unidimensional do problema) e para segmentos no plano, tanto horizontais e verticais como com qualquer orientação (sem cruzamentos). Os algoritmos são analisados de forma rigorosa quanto ao seu uso de espaço e de tempo. Implementamos também os vários algoritmos estudados, construindo uma biblioteca destas estruturas de dados. Apresentamos, finalmente os resultados de experimentos computacionais com instâncias do problema. / In this work we study problems about point and segment query in rectangular windows whose edges are parallel to the axis. Given a set of segments (or points) in the plane. In a first phase these segments are organized in data structures such that queries for segments in windows are done more efficiently. In the second phase windows are given online. The data structures are balanced trees as range tree, priority search tree, interval tree and segment tree. In this master\'s thesis we show in details data structures and algorithms for solving windowing queries to sets of points (unidimensional version of the problem) and of segments in the plane, as horizontal and vertical as any orientation (without crossings). The algorithms are analysed rigorously regarding their space and time used. We implement the algorithms studied, building a library of these data structures. Finally, we present, the results of computational experiments with instances of the problem.

In order to debug and tune stand-alone FPGA image processing configurations, it is necessary for a developer to also create the required debug tools and to implement them on the FPGA. This process takes both time and effort that could be better spent on improving the image processing algorithms. The Gate Array Terminal Operating System (GateOS) is proposed to relieve the developer of the need to construct many of these debugging tools. In GateOS we separate the image processing algorithms from the rest of the operating system. GateOS is presented to the developer as a Handel-C library, which can be customised at compile-time, to facilitate the creation of windows and widgets. Several types of widgets are described that can manipulate the parameters of image processing algorithms and enable the end-user to dynamically rearrange the position of a window on the VDU. An end user is able to interact with GateOS with both a keyboard and a mouse.

Signal detection from Adverse Event Reports (AERs) is important for identifying and analysing drug safety concern after a drug has been released into the market. A safety signal is defined as a possible causal relation between an adverse event and a drug. There are a number of safety signal detection algorithms available for detecting drug safety concern. They compare the ratio of observed count to expected count to find instances of disproportionate reportings of an event for a drug or combination of events for a drug. In this thesis, we present an algorithm to mine the AERs to identify drugs which show sudden and large changes in patterns of reporting of adverse events. Unlike other algorithms, the proposed algorithm creates time series for each drug and use it to identify start of a potential safety problem. A novel vectorized timeseries utilizing multiple attributes has been proposed here. First a time series with a small time period was created; then to remove local variations of the number of reports in a time period, a time-window based averaging was done. This method helped to keep a relatively long time-series, but eliminated local variations. The steps in the algorithm include partitioning the counts on attribute values, creating a vector out of the partitioned counts for each time period, use of a sliding time window, normalizing the vectors and computing vector differences to find the changes in reporting over time. Weights have been assigned to attributes to highlight changes in the more significant attributes. The algorithm was tested with Adverse Event Reporting System (AERS) datasets from Food and Drug Administation (FDA). From AERS datasets the proposed algorithm identified five drugs that may have safety concern. After searching literature and the Internet it was found that the five drugs the algorithm identified, two were recalled, one was suspended, one had to undergo label change and the other one has a lawsuit pending against it.

Neste trabalho estudamos problemas relacionados com a busca de pontos e segmentos em janelas retangulares com os lados paralelos aos eixos. É dado um conjunto de segmentos (ou pontos) no plano. Em uma primeira fase estes segmentos são organizados em estruturas de dados de tal forma a tornar buscas por aqueles que estão contidos em janelas retangulares mais eficiente. Na segunda fase são dadas as janelas de maneira online. Várias destas estruturas de dados são baseadas em árvores balanceadas, tais como, árvore limite, árvore de busca com prioridade, árvore de intervalos e árvore de segmentos. Na dissertação mostramos detalhadamente estas estruturas de dados e os algoritmos para resolver este problema para conjuntos de pontos (versão unidimensional do problema) e para segmentos no plano, tanto horizontais e verticais como com qualquer orientação (sem cruzamentos). Os algoritmos são analisados de forma rigorosa quanto ao seu uso de espaço e de tempo. Implementamos também os vários algoritmos estudados, construindo uma biblioteca destas estruturas de dados. Apresentamos, finalmente os resultados de experimentos computacionais com instâncias do problema. / In this work we study problems about point and segment query in rectangular windows whose edges are parallel to the axis. Given a set of segments (or points) in the plane. In a first phase these segments are organized in data structures such that queries for segments in windows are done more efficiently. In the second phase windows are given online. The data structures are balanced trees as range tree, priority search tree, interval tree and segment tree. In this master\'s thesis we show in details data structures and algorithms for solving windowing queries to sets of points (unidimensional version of the problem) and of segments in the plane, as horizontal and vertical as any orientation (without crossings). The algorithms are analysed rigorously regarding their space and time used. We implement the algorithms studied, building a library of these data structures. Finally, we present, the results of computational experiments with instances of the problem.

英語動詞take有許多不同的語意，而這些語意之間則存有密切的關聯性。藉著分析take的各種語意，可以讓我們更深入地瞭解多義詞現象。本論文藉助認知語言學派的語意架構理論和構造語法理論，深入分析了take出現在不同句法結構中所產生的不同語意及這些語意彼此之間的關聯性。研究結果發現︰當take出現在及物結構中(Caused-Affected Construction)時，透過語言使用者在觀點上不同的選擇(Windowing of Attention)，會衍生出四個基本語意，分別為選擇、拿取、消耗、及狀態改變。此外，take可以與七類型的介詞片語共同表達出七種不同的語意功能。最後，take還可以與介詞組合成片語動詞，產生特殊的語意，為使動結構的邊緣衍生用法。 / The English verb take attests a wide range of meanings and provides rich resources for the exploration of polysemy. Attempting to examine how the various senses of take are related to one another, this thesis investigates the meaning relatedness under the framework of Frame Semantics, which postulates that a conceptual representation is required to fully capture verb semantics (Fillmore and Atkins 1992, 2000), and Construction Grammar, which holds that constructions found in language are the basic units of language and that verb semantics interacts with constructions, thus yielding different meanings (Goldberg 1995, Jackendoff 1997). A careful examination of data reveals that take derives a variety of senses both from its interaction with the semantics of other components in the constructions and from different windowings of take’s conceptual frame. When integrated with the Caused-Affected Construction, the take construction acquires the senses of choosing, grabbing, consuming, and changing. When integrated with the Caused-Motion Construction, the take construction is found to be prototypically followed by prepositional phrases exhibiting seven semantic functions. When occurring in less prototypical cases of the Caused-Motion Construction, the meaning of the take construction blends into the meaning of the preposition following right behind it.

The Decimator, an SED Systems Ltd. product, is a PCI slot card that performs both time and frequency domain measurements of given input signals. It is essentially a more economical version of a bench spectrum analyzer or oscilloscope, with a PC interface. Several issues limit the speed and accuracy of the results of the Decimator, and the study of these issues is the focus of this thesis. These issues, including but not limited to, are as follows: 1) Imbalances between the received In-phase and Quadrature-phase channels; 2) The FFT and Windowing functions are performed by a microcontroller, but it is desired that they be migrated to an FPGA. While solutions to improve the first issue is being implemented and verified, the second issue is not one of simply reducing a source of error. The second issue requires a cost-benefit analysis on the migration of these signal processing algorithms from an ARM microcontroller to a Xilinx FPGA.

This Master’s Thesis is an evaluation of the software Xilinx System Generator (XSG) and blockset for Matlab. XSG is a module to simulink developed by Xilinx in order to generate VHDL code directly from functions implemented in Matlab. The evaluation was made at Saab Avionics AB in Järfälla, north of Stockholm. In order to investigate the performance of this new module XSG to simulink, a model of a frequency estimator often used in digital radar receivers were implemented in Matlab using XSG. Engineers working at SAAB Avionics implemented the same application directly in VHDL, without using Matlab and the XSG. After generating code the results were synthesised, analysed and compared. The frequency estimator basically contains an FFT, a windowing function and a sorting algorithm used to enable analyse of two real signals simultaneously. There were however problems during generation of the VHDL code and the model had to be broken into smaller parts containing only a 16-point FFT. The results of comparison in this report are based on models containing only this 16-point FFT and they show a small advantage for the System Generator according to the resource usage report generated during synthesis. Designing models for generation using Xilinx Blockset can create a lot of wiring between components. The reason for this is that the System Generator and Xilinx Blockset today is a new tool, not completely developed. There are many components found in simulink, Matlab that could not be found in Xilinx Blockset, this is however being improved. Another problem is long time for simulation and errors during generation. My opinion is that when used for smaller systems and with further development the System Generator can be a useful facility in designing digital electronics.

The Decimator, an SED Systems Ltd. product, is a PCI slot card that performs both time and frequency domain measurements of given input signals. It is essentially a more economical version of a bench spectrum analyzer or oscilloscope, with a PC interface. Several issues limit the speed and accuracy of the results of the Decimator, and the study of these issues is the focus of this thesis. These issues, including but not limited to, are as follows: 1) Imbalances between the received In-phase and Quadrature-phase channels; 2) The FFT and Windowing functions are performed by a microcontroller, but it is desired that they be migrated to an FPGA. While solutions to improve the first issue is being implemented and verified, the second issue is not one of simply reducing a source of error. The second issue requires a cost-benefit analysis on the migration of these signal processing algorithms from an ARM microcontroller to a Xilinx FPGA.

In OFDM systems carrier frequency offset is observed due to Doppler shift and transmitter-receiver frequency mismatches. This offset induces ICI (Intercarrier Interference). In this thesis, repeated data methods and pilot-aided carrier frequency offset(CFO) estimation methods and windowing techniques are used to mitigate the frequency offset problem and a performance comparison is made between these ICI cancellation techniques. Repeated data methods use only half of the bandwidth for information transmission to eliminate the ICI at the receiver. We have implemented repeated data methods including Self cancellation scheme and Symmetric Symbol Repetition (SSR) schemes to overcome ICI problem. We have also implemented Adjacent Conjugate Symbol Repetiton (ACSR) and Symmetric Conjugate Symbol Repetiton (SCSR) methods to mitigate both phase rotations and ICI. CFO estimation and correction methods generally use pilot sequences. We implemented the &ldquo / Conventional Pilots&rdquo / and &ldquo / Clustered Pilots&rdquo / pilot-aided CFO estimation techniques for ICI cancellation. Furthermore, we also implemented a new scheme by using the odd symmetry between pilot symbols. Nyquist windowing techniques apply windowing at the receiver side. We have implemented second order polynomial class of Nyquist windows and Nyquist window with Franks pulse used to mitigate ICI. These ICI cancellation methods are compared in AWGN and multipath Rayleigh fading channel models in terms of BER and carrier to interference ratio. It is shown that repeated data methods shows better performances than pilot-aided CFO estimation methods with a cost of increased bandwidth usage especially in high SNR&rsquo / s.

<p>This Master’s Thesis is an evaluation of the software Xilinx System Generator (XSG) and blockset for Matlab. XSG is a module to simulink developed by Xilinx in order to generate VHDL code directly from functions implemented in Matlab. The evaluation was made at Saab Avionics AB in Järfälla, north of Stockholm. </p><p>In order to investigate the performance of this new module XSG to simulink, a model of a frequency estimator often used in digital radar receivers were implemented in Matlab using XSG. Engineers working at SAAB Avionics implemented the same application directly in VHDL, without using Matlab and the XSG. After generating code the results were synthesised, analysed and compared. </p><p>The frequency estimator basically contains an FFT, a windowing function and a sorting algorithm used to enable analyse of two real signals simultaneously. There were however problems during generation of the VHDL code and the model had to be broken into smaller parts containing only a 16-point FFT. The results of comparison in this report are based on models containing only this 16-point FFT and they show a small advantage for the System Generator according to the resource usage report generated during synthesis. </p><p>Designing models for generation using Xilinx Blockset can create a lot of wiring between components. The reason for this is that the System Generator and Xilinx Blockset today is a new tool, not completely developed. There are many components found in simulink, Matlab that could not be found in Xilinx Blockset, this is however being improved. Another problem is long time for simulation and errors during generation. </p><p>My opinion is that when used for smaller systems and with further development the System Generator can be a useful facility in designing digital electronics.</p>