Among many which are placed on modern embedded systems is also the need of storing multiple system boot image versions and the ability to select from them upon boot time, depending on a function which they provide. This thesis describes the development of a system update application for Xilinx Zynq-7000 devices. The application includes a simple embedded HTTP server for a remote file transfer. A client is allowed to upload the boot image file with the system update from either command line application or using the web page developed for this purpose.

This diploma thesis focuses on the High-level synthesis (HLS). The first part deals with theoretical details and methods that are used in HLS tools. This is followed by a description of the synthesis tool Vivado HLS which will be used for implementation of an application. In the second part is briefly introduced high dynamic range images (HDR) and tone mapping. The third part is dedicated to design and implementation of the aplication which implements tone mapping methods in HDR images. This methods are implemented in Vivado HLS and language C++. This application is based on platform Xilinx Zynq and it uses multiexposure camera for capturing HDR images. Images are transmitted to FPGA for tone mapping processing.

Edge detection is one of the most important application in image processing. Field-Programmable Gate Arrays (FPGAs) have become popular computing platforms for signal and image processing. The Zynq-7000 System on Chip (SOC) is a dual-processor platform with shared memory. The thesis describes a novel and fast implementation of Sobel edge detection using the Zynq-7000 SoC. Our implementation is a combination of software and hardware using the Vivado HLS and Zynq (SoC). As a result our implementation is fast. We make a comparison with other conventional edge detection techniques and show that the speed of operation of this design is much faster.

Embedded system designers require deterministic, real-time operating system (RTOS) support for the commonly available processing hardware. The Xilinx Zynq Extensible Processing Platform (EPP) offers software, hardware, and input/output (I/O) programmability on a single chip. The Xilinx Zynq EPP features a Dual ARM Cortex-A9 MPCore, Advanced Microcontroller Bus Architecture (AMBA) Advanced eXtensible Interface 4 (AXI4) interconnect, and Xilinx Kintex-7 series Programmable Logic (PL) which provide the requisite capabilities for the increasing demands of embedded processing applications. The AMBA AXI4 interconnect provides high speed point to point interconnections between the ARM processor cores and the Field Programmable Gate Array (FPGA) structure allowing for rapid data transmission to optimize system performance. The incorporation of an RTOS ensures predictable execution times of applications. Benchmarks, such as the Rhealstone, were developed to provide designers with a method of evaluating and comparing these multitasking RTOSs running on various hardware platforms. This thesis research performs Rhealstone benchmarking and evaluates the AMBA AXI4 interconnect performance while executing FreeRTOS on the ARM core of the Zynq EPP device. / Electrical and Computer Engineering

Traditional hardware radios provide very rigid solutions to radio problems. Intelligent software defined radios, also known as cognitive radios, provide flexibility and agility compared to hardware radio systems. Cognitive radios are well suited for radio applications in a changing radio frequency environment, such as dynamic spectrum access. In this thesis, a cognitive radio is demonstrated where the system self reconfigures to demodulate a detected waveform. The GNU Radio framework is used to provide basic software defined radio building blocks and is supplemented with FPGA accelerators. The use of GNU Radio compliant hardware interfaces allows for seamless hardware/software radio deployments. Dynamic resource mapping allows radio designers to operate at a layer of abstraction above the physical radio implementation. By establishing lower level abstraction layers, future researchers can focus on larger picture concepts such as learning algorithms and behavioral models for the cognitive engine. / Master of Science

L’équipe Physique des Galaxies du Laboratoire d’Astrophysique de Marseille a développé un nouveau type d'interféromètre de Fabry-Perot, équipé de trois actionneurs piézoélectriques amplifiés et de trois capteurs capacitifs permettant le contrôle de l'espacement et du parallélisme des lames de verres de l'ordre de 200 µm avec une précision de positionnement du nm.L'objectif visé de ce manuscrit, composé de 3 parties, est le pilotage de cet interféromètre. La première partie, composée des chapitres 1 et 2, présente les généralités sur l'interférométrie de Fabry-Perot puis décrit les instruments 3DNTT et BTFI où seront installés l'interféromètre de nouvelle génération et son contrôleur associé. La conception et la réalisation d'un amplificateur hybride en vue de la réduction des non-linéarités des actionneurs piézoélectriques mettent fin à cette partie.La deuxième partie, chapitres 3 et 4, décrit le développement et la réalisation du contrôleur. Pour cela, une démarche basée sur le concept du Co-design a été adoptée.Le contrôleur ainsi réalisé est composé d'une carte de développement Microzed dont le cœur est un système sur puce de la série Zynq 7000 EPP et d'une carte d'interfaçage comportant des convertisseurs 3 ADC et 3 DAC et des circuits d'alimentation. La troisième et dernière partie, chapitres 5 et 6, traite de la modélisation d'état de l’interféromètre de Fabry-Perot et de son contrôle : un contrôle classique basé sur la régulation PID et un contrôle robuste et optimal basé sur le filtrage de KALMAN. Cette dernière partie conclut sur les perspectives pouvant découler des contributions de ce travail sur le contrôle et la commande Fabry-Perot. / The Physics of Galaxies Team of Laboratoire d'Astrophysique de Marseille (LAM) has developed a new type of Fabry-Perot, with three amplified piezoelectric actuators and three capacitive sensors to control the spacing and parallelism of mirror plates of approximately 200 µm with a positioning accuracy of 3 nm.The purpose of this manuscript, consisting of 3 parts is the control of this interferometer.The first part, consisting of Chapters 1 and 2 presents the general interferometry Fabry-Perot and then describes 3DNTT and BTFI instruments which will be installed the next generation interferometer and its associated controller. The design and implementation of a hybrid amplifier to reduce non-linearities of the piezoelectric actuators (hysteresis and creep) end this first part.The second part, Chapters 3 and 4, describes the development and implementation of the controller.For this, an approach based on codesign concept was adopted. The thus achieved controller consists of a Microzed development board whose heart is a system on chip of the 7000 series Zynq EPP (FPGA + Dual-Core ARM Cortex A9) and an interface card with converters (3 ADC and 3 DAC) and power supply circuits.For the finalization of the controller, two steps are necessary: hardware design in Xilinx Vivado and software design in Xilinx SDK.The third and final section, chapters 5 and 6 deals with the Fabry-Perot space-state modeling and its control: a classic control based on PID control and a robust and optimal control based on KALMAN filtering. This last part concludes the outlook may result from contributions of this work on the monitoring and control of the Fabry-Perot.

The project is about embedded systems in self-driving vehicles which is a growing andcurrent area. This is important as the automation of vehicles can make different sectorssuch as the mining and logistics industry more effective. This work relates to the topicas it aims to improve part of the self-driving software stack by replacing Ubuntu with aless resource-intensive Linux based system. The main goal of this work is to implementand document improvements. The work contains a research part where advantages anddisadvantages are compared against each other, followed by an implementation thatiteratively solved one problem at a time.The result became instructions and documentation describing the choices madefor a less resource demanding Linux based system. It also includes instructions anddocumentation for two different application that are part of the software stack. / Projektet handlar om inbyggda system i självkörande fordon vilket är ett växande ochaktuellt område. Det är viktigt då automatiseringen av fordon kan effektivisera mångaolika sektorer som till exempel gruv- och logistikindustrin. Detta arbete relaterar tillämnet då det har som mål att effektivisera en del av den självkörande mjukvarustackengenom att byta ut Ubuntu till ett mindre resurskrävande Linux-system. Huvudmålet meddetta arbete är att implementera och dokumentera förbättringar. Arbetet innehåller en ut-redningsdel där för- och nackdelar jämförs mot varandra följt av en implementationsdelsom iterativt hanterar ett problem i taget.Resultatet blev instruktioner och dokumentation över de val som tagits för ett mindreresurskrävande Linux-system samt instruktioner och dokumentation över två applikatio-ner som är en del av mjukvarustacken.

Runway detection in long wavelength infrared (LWIR) video could potentially increase the number of successful landings by increasing the situational awareness of pilots and verifying a correct approach. A method for detecting runways in LWIR video was therefore proposed and evaluated for robustness, speed and FPGA acceleration. The proposed algorithm improves the detection probability by making assumptions of the runway appearance during approach, as well as by using a modified Hough line transform and a symmetric search of peaks in the accumulator that is returned by the Hough line transform. A video chain was implemented on a Xilinx ZC702 Development card with input and output via HDMI through an expansion card. The video frames were buffered to RAM, and the detection algorithm ran on the CPU, which however did not meet the real-time requirement. Strategies were proposed that would improve the processing speed by either acceleration in hardware or algorithmic changes.

This work describes using High-Level Synthesis in image processing application. The application is for Xilinx ZYNQ platform. The source code of components for FPGA is written in C++ programming language. For High-Level Synthesis is used Xilinx Vivado HLS tool. In the application are designed and implemented Sobel filter, Median filter, Bilateral filter and architecture for AdaBoost classificator. The extension of this work is implemented the component for network traffic. The component finds the begin of the packet.

This thesis contains introduction to PMS motor control using development board ZedBoard with Xilinx Zynq-7000 SoC. After that, there is a description of development environment Vivado and other modules. Finally, it contains description or created modules in Vivado environment which were combined together with peripheral drivers to demonstrate field oriented motor control algorithm of small PMS motor.