Thesis (Ph. D.)--University of Washington, 1998. / Includes bibliographical references (leaves [152]-159).

Thesis (M.S.)--University of Wisconsin--Madison, 1969. / eContent provider-neutral record in process. Description based on print version record.

The thesis is concerned with techniques for realizing optimum control that are suited for analogue computers. The first half of the thesis develops an iterative scheme for the solution of the two point boundary value problem. The theory of the iterative scheme is covered in detail and the scheme is implemented on an analogue computer. Studies of the scheme have also been made using a digital computer. The iterative scheme can be modified to cope with constraints on the control law. These modifications have been tested on a digital computer. The latter half of the thesis is concerned with approximation techniques which produce, very simple controllers. These techniques require a large digital computer, such as the IBM 7040, to do the design calculations. The first approximation technique developed from the calculus of variations is covered in detail including a complete controller designed and simulated. The second approximation technique based on dynamic programming is discussed and a few points are made about the features of the controller. / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate

No description available.

Thesis (B.S.)--Massachusetts Institute of Technology, Dept. of Mechanical Engineering, 1978. / MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING. / Includes bibliographical references. / by Robert L. Maresca. / B.S.

Orientador: Paulo José Amaral Serni / Coorientador: Átila Madureira Bueno / Banca: Diego Colon / Banca: Wesley Angelino de Souza / Banca: Everson Martins / Banca: Maria Gloria Cano de Andrade / Resumo: Este trabalho apresenta o desenvolvimento de um sistema integrado de co-simulação aplicado a duas plantas: uma planta de controle de nível que se comunica com um controlador baseado na técnica LQG/LTR e um sistema de viga flexível controlado por um observador de estados. A planta de nível é composta por um modelo digital e um modelo analógico. A primeira é simulada via um computador digital e a segunda é projetada e montada em um circuito eletrônico usando a técnica de simulação analógica, com um sistema de aquisição de dados QPID da QuanserTM. A comunicação entre a planta e o controlador é feita via um protocolo de comunicação industrial que permite a troca das informações de controle. O principal objetivo do sistema é demonstrar as funcionalidades da integração dos subsistemas para controlar o nível do tanque central e a diferença de níveis entre os tanques da direita e da esquerda. Antes de realizar a co-simulação, o sistema foi estudado usando-se um módulo para substitui-lo, mantendo-se também o mesmo protocolo de comunicação. Esse módulo possui a mesma função do computador analógico, ou seja, com ganhos, somadores e integradores, com a diferença de ser implementada em um computador digital. Assim, foi possível criar um banco de dados inicial para comparar e validar a função do circuito eletrônico do computador analógico. Como estudo de caso da comunicação OPC, foi realizado um experimento para controlar um sistema de viga flexível FlexgageTM. Para tanto, este sistema foi... (Resumo completo, clicar acesso eletrônico abaixo) / Abstract: This work presents the development of an integrated system of co-simulation applied to: a level test bench that communicates with a controller based in LQG/LTR technique, and a system with a flexible link with a state observer controller. The level bench is composed of a digital model and an analog model of the co-simulation system. The first model is simulated on a digital computer and the second is designed and implemented in an electronic circuit using the analog computing technique. A QPID data acquisition system by QuanserTM perform the data exchange between the plant and the controller by means of an industrial protocol. The main objective of this system is to demonstrate the functionality of the integration of the subsystems to regulate the central tank level and the level difference between the right and the left tanks. Before performing the co-simulation with the electronic circuit, the system was tested using digital model with industrial protocol communication also. The digital model performed the same function as the analog computer, with gains, summers and integrators, allowing to create an initial data bank to compare and to validate the function analog model. A case study using OPC communication was done with an experiment to control a flexible link system FlexgageTM. This system was simulated in a LabVIEWTM and controlled by a state observer controller implemented by an algorithm in the SciLabTM application. In this situation, the process variable and control ... (Complete abstract click electronic access below) / Doutor

With the introduction of the floating-gate transistor into reconfigurable architectures, great advances have been made in the field. Recently, Hall et. al. have proposed the first truly large-scale field programmable analog array (FPAA). As an outgrowth of this work, a new class of FPAAs based on translinear elements has begun to be developed. The use of translinear elements, multiple input translinear elements (MITEs) specifically, allows for extreme versatility in the functions implemented by the system while keeping the computational elements of the FPAA regular. In addition, synthesis procedures have been developed for translinear elements. This facilitates the implementation of large-scale systems on the FPAA because the circuit design can be extracted using the synthesis procedures based on equations entered by the user. Two architectures are proposed for the new FPAA. The first architecture uses fine grain reconfigurability, every gate capacitor and the drain of each MITE can be connected arbitrarily, in order to create reconfigurable MITE networks. Circuits including a squaring circuit, a square root circuit, a translinear loop, a vector magnitude circuit, and a 1st-order log-domain filter were implemented using this architecture and results are presented. In addition, examples are shown to illustrate the compilation of the circuits onto the FPAA. The second proposed architecture uses a mix of fine and medium granularity in order to simplify the implementation of larger systems. Examples are given and again the compilation of the circuits onto the FPAA is shown.

Thesis (Ph.D)--Electrical and Computer Engineering, Georgia Institute of Technology, 2009. / Committee Chair: Hasler, Paul; Committee Member: Anderson, David; Committee Member: Degertekin, F.; Committee Member: Ghovanloo, Maysam; Committee Member: Minch, Bradley. Part of the SMARTech Electronic Thesis and Dissertation Collection.

No description available.

Thesis(M.S.)--Auburn University, 2006. / Abstract. Vita. Includes bibliographic references.