International Telemetering Conference Proceedings / October 28-31, 1996 / Town and Country Hotel and Convention Center, San Diego, California / Hierarchical Data Format (HDF) is a public domain standard for file formats which is documented and maintained by the National Center for Super Computing Applications. HDF is the standard adopted by the F-22 program to increase efficiency of avionics data processing and utility of the data. This paper will discuss how the data processing Integrated Product Team (IPT) on the F-22 program plans to use HDF for file format standardization. The history of the IPT choosing HDF, the efficiencies gained by choosing HDF, and the ease of data transfer will be explained.

ITC/USA 2011 Conference Proceedings / The Forty-Seventh Annual International Telemetering Conference and Technical Exhibition / October 24-27, 2011 / Bally's Las Vegas, Las Vegas, Nevada / The higher bandwidth capacities available with the adoption of Ethernet technology for networked FTI data acquisition systems enable more data to be acquired by the Data Acquisition Unit (DAU) from high-speed data busses, with higher channel densities, faster sampling rates, and sample resolution. Ethernet offers increased flexibility, interoperability, and simplicity in terms of the FTI system topology. However, the adoption of Ethernet has numerous implications for the design and operation of the DAU in terms of supporting network protocols for synchronization, configuration, and the transmission of the acquired data. This paper explores these issues and discusses the merits of adopting Ethernet.

The satellite avionics platform has been developed in cooperation with Airbus and is called „Future Low-cost Platform“ (FLP). It is based on an Onboard Computer (OBC) with redundant processor boards based on SPARC V8 microchips of type Cobham Aeroflex UT699. At the University of Stuttgart a test bench with a real hardware OBC and a fully simulated satellite is available for testing real flight scenarios with the Onboard Software (OBSW) running on representative hardware. The test bench as later the real flying satellite "Flying Laptop" – is commanded from a real Ground Control Centre (GCC). The main challenges in the FLP project were - Onboard computer design, - Software design and - Interfaces between platform and payloads In the course of industrialization of this FLP platform technology for later use in satellite constellations, Airbus has started to set up an in-house test bench where all the technologies shall be developed. The initial plan is to get first core elements of the FLP OBSW ported to the new dual-core processor and the new Space Wire(SpW) routing network. The plan also has an inclusion of new Mission Control Software with which one can command the OBC. The new OBC has a dual core processor Cobham Gaisler GR712 and hence, all the payload and related functionality are to be implemented only in a second core which involves a lot of low-level task distribution. The consequent SpW router network application and dual-core platform/payload OBSW sharing are entirely new in the field of satellite engineering.

<div>In 21st century, interoperability in remote locations has always been a matter of contention. Interoperability is very closely related to internet and an efficient process saves a lot of time and money. With the advent of Wireless Sensor Networks (WSN), Native Internet Protocol (NIP) is considered as one of the most pragmatic solutions in market to address interoperability challenges and is gaining more attention in research. However, challenges like reliability, security of data, power consumption, range and maintenance, and accessibility of such internet in remote locations still remain a matter of concern, creating further barriers for interoperability. This research aims at proposing a viable solution to interoperability issues at remote locations, irrespective of its network or payload size, by integrating more advanced Wireless Sensor Protocols like Thread Protocol with a proposed Over The Air (OTA) file transfer functionality, into UAVs. Furthermore, this study analyzes power consumption, reliability, latency and scope of the proposed system and their applications in health care and industries.</div>

With more functionality added to safety-critical avionics systems, new platforms are required to offer the computational capacity needed. Multi-core platforms offer a potential that is now being explored, but they pose significant challenges with respect to predictability due to shared resources (such as memory) being accessed from several cores in parallel. Multi-core processors also suffer from higher sensitivity to permanent and transient faults due to shrinking transistor sizes. This thesis addresses several of these challenges. First, we review major contributions that assess the impact of fault tolerance on worst-case execution time of processes running on a multi-core platform. In particular, works that evaluate the timing effects using fault injection methods. We conclude that there are few works that address the intricate timing effects that appear when inter-core interferences due to simultaneous accesses of shared resources are combined with the fault tolerance techniques. We assess the applicability of the methods to COTS multi-core processors used in avionics. We identify dark spots on the research map of the joint problem of hardware reliability and timing predictability for multi-core avionics systems. Next, we argue that the memory requests issued by the real-time operating systems (RTOS) must be considered in resource-monitoring systems to ensure proper execution on all cores. We also adapt and extend an existing method for worst-case response time analysis to fulfill the specific requirements of avionics systems. We relax the requirement of private memory banks to also allow cores to share memory banks.

This thesis presents work done towards a Personal Remote Sensing (PRS) system: small Unmanned Aerial Vehicles (UAVs) with electronic, control, and sensing subsystems. Based on papers presented to conferences (AutoTestCon2008 and MESA2009), as well as other work on PRS, multiple levels of engineering are detailed: complex multi-UAV data flow; attitude estimation filters; real-time microprocessor functionality; and small, mobile power systems. Wherever possible, Open-Source tools and designs have been used, modified, or studied, providing excellent cost to performance ratios in most cases. First, the overall PRS UAV architecture, AggieAir, is presented with a motivating examples (GhostEye and EagleEye camera payloads). Then, AggieNav, an inertial navigation system for small UAVs, is detailed, along with information about a Kalman filter for estimation of UAV navigation, position, and attitude. Finally the Spatial Environment Autonomous Logger (SEAL), a general-purpose wireless datalogger for small UAV applications, is presented, with application examples with and without small UAVs. This work represents designs based on two years of organic small UAV system growth, and provides integrated solutions to many problems of small UAV communication, sensing, and control.

Uppdragsgivaren Saab Electronic Defence Systems i Jönköping erbjuder ett flertal produkter främst inom avioniksystem. För att kunna utvärdera och kontrollera produktens design i ett tidigt skede så kan en simulering av systemets beteende och att felsöka så tidigt som möjligt vara ett möjligt alternativ. En systemsimulering kan innebära att mjukvaruutveckling och felsökning kan påbörjas långt innan hårdvaruprototypen är tillgänglig, med samma storlek och komplexitet som systemet. Andra fördelar med simulering är att det går enklare att fastställa orsaken till systemkrasch, hitta de längsta exekveringstiderna och göra felinjiceringar. Syftet med detta examensarbete är att testa och utvärdera hur simulatorer och emulatorer är som utvecklings- och testverktyg. Rapporten innehåller en marknadsundersökning där tio stycken emulatorer och simulatorer hittades. Av dessa valdes två stycken ut, Wind River Simics och Imperas OVPSim. Tester utfördes för användarvänlighet, debugging, samt jämförande tester mellan riktig hårdvara och simulerad miljö. Resultatet visar att simulatorer kan hjälpa till vid produktutveckling, men att de ännu inte är så optimala för att utvärdera hårdvara i. Detta för att avvikelser kan förekomma i exekveringstider mellan riktig och simulerad hårdvaruarkitektur. / This thesis has been carried out in cooperation with Saab Electronic Defence Systems in Jönköping which has a wide range of products, mainly for Avionic applications. In order to evaluate and verify their design it is often required to simulate behaviour and debug as early as possible. System simulation can enable software development and debug to commence long before a hardware prototype is available and also scale with the size and complexity of the system. Another benefit of simulation is to more easily determine root causes to system crashes, establish worst case execution time cases and making fault injection. Therefore this thesis will focus on evaluating simulators and emulators, as development- and testing tools. This report contains a marketing research, where ten emulators and simulators were found. Of these, two simulators were chosen for further investigation; WindRiver Simics and Imperas OVPSim. The evaluations considered both usability and debugging features as well as comparative tests between real hardware and the simulated environment. The results show that simulators can help in product development, but they are not yet optimal for evaluating hardware. This is because deviations may occur in execution times between real and simulated hardware architectures.

The development and testing for a UAV testbed to be used in academic research and undergraduate education is proposed in this thesis. Analysis on commercial off-the-shelf UAV systems and autopilots lead to the development of a custom, open-architecture and modular UAV testbed. The main focus is to support research in UAV control field and education of the undergraduate students. The integration and use of commercial-off-the-shelf avionics and air vehicle are described in detail. System performance is examined both in flight and on the ground. Results of the system tests show that the developed system is a functional UAV testbed to be used in research of different flight control algorithms.

<p>Embedded microcomputers are used in a wide range of applications nowadays. Avionics is one of these areas and requires extra attention regarding reliability and determinism. Thus, these issues should also be born in mind in addition to performance when evaluating embedded microcomputers.</p><p>This master thesis suggests a framework for performance evaluation of two members of the PowerPC microprocessor family, namely the MPC5554 from Freescale and PPC440EPx from AMCC, and analyzes the results within and between these processors. The framework can be generalized to be used in any microprocessor family, if required.</p><p>Apart from performance evaluation, this thesis also suggests also a new terminology by introducing the concept of determinism levels to be able to estimate determinism issues in avionics applications more clearly, which is crucial regarding the requirements and working conditions of this very application. Such estimation does not include any practical results as in performance evaluation, but rather remains theoretical. Similar to Automark™ used by AutoBench™ in the EEMBC Benchmark Suite, we introduce a new performance metric score that we call ”Aviomark” and we carry out a detailed comparison of Aviomark with the traditional Automark™ score to be able to see how Aviomark differs from Automark™ in behavior.</p><p>Finally, we have developed a graphical user interface (GUI) which works in parallel with the Green Hills MULTI Integrated Development Environment (IDE) in order to simplify and automate the evaluation process. By the help of the GUI, the users will be able to easily evaluate their specific PowerPC processors by starting the debugging from MULTI IDE.</p>

The primary objective of this thesis was to study, implement, and test low-cost electronic flight control systems (FCS) in remotely piloted subscale research aircraft with relaxed static longitudinal stability. Even though this implementation was carried out in small, simplified test-bed aircraft, it was designed with the aim of being installed later in more complex demonstrator aircraft such as the Generic Future Fighter concept demonstrator project. The recent boom of the unmanned aircraft market has led to the appearance of numerous electronic FCS designed for small-scale vehicles and even hobbyist-type model aircraft. Therefore, the purpose was not to develop a new FCS from scratch, but rather to take advantage of the available technology and to examine the performance of different commercial off-the-shelf (COTS) low-cost systems in statically unstable aircraft models. Two different systems were integrated, calibrated and tested: a simple, gyroscope-based, single-axis controller, and an advanced flight controller with a complete suite of sensors, including a specifically manufactured angle-of-attack transducer. A flight testing methodology and appropriate flight-test data analysis tools were also developed. The satisfactory results are discussed for different flight control laws, and the controller tuning procedure is described. On the other hand, the different test-bed aircraft were analysed from a theoretical point of view by using common aircraft-design methods and conventional preliminary-design tools. The theoretical models were integrated into a flight dynamics simulator, which was compared with flight-test data obtaining a reasonable qualitative correlation. Possible FCS modifications are discussed and some future implementations are proposed, such as the integration of the angle-of-attack in the control laws.